JPH06230750A - Matrix display device - Google Patents

Abstract

PURPOSE:To assure a specified writing rate even if the temperature changes by changing a frame frequency according to an ambient temp. CONSTITUTION:A temp. sensor 30 measures the ambient temp. and outputs the measured temp. as a voltage value. A controller 40 generates a control data according to a voltage value and controls the frequency of the timing signal generated by a timing generation circuit 5. As a result, the frame frequency is changed over according to the ambient temp. Then, the frame frequency drops as the ambient temp. drops and, therefore, the lowering of the writing rate is suppressed. On the other hand, the frame frequency rises as the ambient temp. rises and, therefore, the flicker in FRC system is minimized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix display device, and more particularly to a device which secures a writing rate of a matrix display panel by changing a frame frequency according to a change in electron mobility due to temperature.

Further, the present invention relates to a multi-gradation display device which realizes multi-gradation display while ensuring both a writing rate and suppression of flicker in an active matrix display device.

[0003]

2. Description of the Related Art Publication "Flat panel display 1991" (Nikkei BP, published November 26, 1990)
According to the description on pages 173 to 180, in an active matrix display device, for example, Thin Film Transi
The writing rate of the stor (TFT) liquid crystal panel is inversely proportional to the frame frequency, and if the frame frequency is the same, the writing rate decreases as the electron mobility μ decreases.

Further, in order to reduce the flicker in the FRC system, it is sufficient to increase the frame frequency, but it is limited to the writing rate, and it is described that the limit is 70 Hz to 80 Hz at present. .

In addition, another publication, "IEEE TRANSACTIONS
ON ELECTRON DEVICES, VOL.36 "(December 1989 issue)
According to the description on page 2957, the mobility is proportional to temperature, and it is necessary to consider the worst value (generally 0 ° C.) when designing a TFT liquid crystal panel.

That is, since the lower the temperature is, the smaller the mobility is, the frame frequency must be lowered or the number of pixels must be reduced in order to secure the writing rate.

[0007]

In the above prior art,
When the frame frequency is increased in order to reduce flicker when multi-gradation display is performed by FRC, there is a problem that the writing rate is reduced.

When designing a matrix display panel for displaying a signal having a fixed frame frequency such as a TV signal, the number of pixels is the worst value of the mobility (0 ° C.) in order to secure the writing rate. There is a problem that the matrix display panel having a lower resolution or a smaller screen size can be obtained as compared with the normal temperature condition.

[0009]

To achieve the above object, in the present invention, a temperature sensor is provided to measure the ambient temperature of the matrix display panel, and the read clock frequency of the frame memory is arbitrarily controlled according to the result. .

[0010]

The temperature sensor measures the temperature, and if the temperature rises, the frequency of the read clock of the frame memory is increased to increase the frame frequency, so that flicker when FRC is applied can be suppressed. Further, since the electron mobility μ increases, the writing rate does not decrease.

On the other hand, if the temperature decreases, the frequency of the read clock of the frame memory is lowered and the frame frequency is lowered, so that the writing rate does not decrease. Since the response speed of the active matrix display panel is low at low temperatures, flicker is less likely to occur even when FRC is applied at low frame frequencies than at high temperatures.

Further, since a temperature sensor is provided to measure the ambient temperature of the matrix display panel and the read clock frequency of the frame memory is arbitrarily controlled, a high write rate is maintained according to the ambient temperature while maintaining a constant write rate. A fine or large-screen matrix display panel can be obtained.

[0013]

1 is a block diagram showing a first embodiment of the present invention. In the figure, 10 is a matrix display panel, 20 is a frame memory, 30 is a temperature sensor, 40 is a controller, and 50 is a timing generation circuit for generating a timing signal for operating the matrix display panel 10 and the frame memory 20.

The frame memory 20 operates according to the write and read timing signals from the timing generation circuit 50, temporarily stores the input signal to be displayed, and reads it at a frequency different (or the same) as that of the write.

The temperature sensor 30 can measure the ambient temperature and take it out as a voltage value, for example. Typical temperature sensors include thermocouples, resistance temperature detectors, thermistors, and IC temperature sensors. However, any of the above temperature sensors may be used in the present invention.

The controller 40 controls the frequency of the read clock of the frame memory 20 generated by the timing generation circuit 50 based on the output voltage from the temperature sensor 30.

FIG. 2 shows a specific configuration example of the controller 40. 401 is an A / D converter, 402 is Re
This is an ad only memory (ROM).

The voltage output from the temperature sensor is converted into a digital signal by the A / D converter 401 and then RO
Input to M402. A predetermined conversion table is stored in the ROM 402, and data corresponding to each input signal is selected from the table and output. The conversion table is determined according to the characteristics of the matrix display panel used.

FIG. 3 shows a structural example of a main part of the timing generating circuit. 501 is a phase comparator, 502 is a loop filter, 503 is a voltage controlled oscillator (VCO), 504,
506 and 508 are programmable dividers, 505 and
Reference numerals 507 and 509 denote control terminals of the programmable dividers. This circuit is generally
It is called a lock loop (PLL), and its operation will be briefly described below.

The phase comparator 501 has horizontal synchronizing signals HD and V.
The phase of CO is compared and the error signal is output. The loop filter 502 integrates the error signal and controls the frequency of the VCO 503 as a control voltage. At this time, in order to lock the VCO 503 at a frequency that is N (N is an integer) times the HD signal, the programmable divider 504 has the VCO 50
Divide the output of 3. This frequency division is
The ROM 402 is connected to the control terminal of the divider 504.
Determined by the control signal given by That is, the frequency of the output signal of the VCO can be changed by the data of the output signal of the controller 40 according to the output voltage of the temperature sensor 30. This output signal is used as the read clock of the frame memory 20 and the dot clock of the matrix display panel 10.

Further, the programmable divider 506 divides the output of the VCO, and the matrix display panel 10 is divided.
To generate a horizontal sync signal. Similarly, the programmable divider 508 generates a vertical synchronizing signal applied to the matrix display panel 10 and a read reset signal for the frame memory 20. The frequency division number of the two programmable dividers is also determined by the control signal generated by the ROM 42 depending on the temperature. Therefore, the frame frequency of the input signal can be changed according to the temperature.

4 and 5 show examples of the relationship between temperature and frame frequency according to this embodiment. 4 and 5, the horizontal axis represents temperature and the vertical axis represents frame frequency. FIG. 4 shows that the temperature and the frame frequency are directly proportional to each other, and FIG. 5 shows that the frame frequency is set to a predetermined number of stages (a, b, ...) With respect to the temperature. Both can be realized only by setting the data in the ROM 402.

Now, the effect of this embodiment will be described by taking the case of changing the frame frequency as shown in FIG. 5 as an example.
FIG. 6 shows the relationship between the frame frequency and the writing rate. The horizontal axis represents the frame frequency, and the vertical axis represents the writing rate. As shown in the figure, the relationship between the frame frequency and the writing rate changes depending on the temperature. As described above, the frame frequency is switched to a, b, c, d according to this temperature. That is, when the temperature is 0 ° C. or less, the frame frequency is switched to a, b at −10 ° C., c at −20 ° C., and d at −30. As a result, even if the temperature changes, it is possible to always secure a writing rate above a certain level.

As described above, according to the present embodiment, the temperature is measured by the temperature sensor, and the frame frequency is switched according to the output voltage, so that the writing rate can be always maintained above a certain level even if the temperature changes.

In this embodiment, the temperature sensor is used to automatically change the frame frequency, but the display user may switch the frame frequency according to the ambient temperature.

FIG. 7 shows a block diagram of the second embodiment of the present invention. Reference numeral 60 denotes an FRC circuit, which is a circuit for performing a signal operation for realizing the FRC method described later. Reference numeral 51 denotes a timing generation circuit, which is the function of the timing generation circuit 50 of FIG. 1 added with a function of giving a signal for discriminating a frame to the FRC circuit. The rest of the circuit configuration and the operation of each block are the same as those in the first embodiment, and therefore their repetitive description is omitted.

FIG. 8 shows the principle of the FRC system. 101 is the minimum unit of image display on the matrix display panel 1
Indicates a pixel. FRC is one of the most common multi-gradation methods, and is a method of visually displaying a halftone by switching and displaying two different gradations for each frame.
For example, in FIG. 8, (a) shows that when the display gradation of one pixel 101 is set to a certain level (tentatively called a white level) in the first frame, the white level is maintained in the second and third frames. In this case, the display gradation is the white level. Further, (b) shows a case where the display gradation of one pixel 101 is set to another certain level (tentatively called a black level) in the first frame, and the black level is maintained in the second frame and the third frame. Therefore, the display gradation is the black level. In this case, the display gradation is only two gradations of white and black.

However, according to the FRC system, if the display gradation of one pixel 101 is a white level in the first frame, as shown in (b), in the second frame,
This is switched to the black level and further switched to the white level in the third frame, and thereafter, this is repeated every other frame. As a result, the display gradation can visually produce a gray level (halftone) between white and black. In other words, by originally adopting the FRC method for displaying two gradations of white and black, it is possible to display three gradations with the addition of halftones.

However, in general, when the FRC method is implemented, flicker occurs on the screen. That is, since the brightness of one pixel changes for each frame, the difference in brightness appears as flicker. Therefore, FRC
When the frame frequency is low, the flicker becomes more noticeable as the frame frequency is lower and the luminance change cycle of one pixel is longer.

Also in this embodiment, as shown in the first embodiment, the temperature is measured by the temperature sensor 30, and the controller 40 controls the timing generation circuit according to the temperature to change the frame frequency. That is, as shown in FIG. 6, the frame is displayed at the highest possible frame frequency without decreasing the writing rate according to the temperature. Therefore, flicker is minimized.

As described above, according to the present embodiment, it is possible to suppress flicker when performing multi-gradation display by the FRC system, simply by adding a simple circuit such as a temperature sensor and a controller.

FIG. 9 shows a block diagram of a third embodiment of the present invention. Reference numeral 41 is a controller, 70 is a switching circuit, 80 is a TV video signal input terminal, 81 is a computer image input terminal from a personal computer (PC), and 90 is a changeover switch. Since the configuration and operation of each of the other blocks are the same as those in the first embodiment, repetitive description will be omitted.

A TV video signal is input to the input terminal 80, and a computer image is input to the input terminal 81. One of the two input signals is selected and displayed by the changeover switch 90. The controller 41 generates a data signal corresponding to the selected input signal by the input voltage from the temperature sensor 30 and changes the frame frequency. The changeover circuit 70 changes over the changeover switch and the controller 41 in cooperation with each other.

FIG. 10 shows an example of the configuration of the controller 41 shown in FIG. 403 is a comparator, 40
Reference numeral 4 is a voltage source, and 405 to 407 are resistors, which together with 403 constitute a hysteresis comparator. Reference numeral 408 is a changeover switch, and 409 is an input terminal from the temperature sensor.

The changeover switch 408 is the changeover circuit 70.
Is controlled by the switching signal from. First, when a computer image is selected, the changeover switch 408 is set to A / D.
Select the converter 401 side. Therefore, the temperature sensor 3
The output voltage of 0 is A / D converted and then input to the ROM 402. That is, the configuration and operation of this portion are the same as those of the first embodiment, and the relationship between temperature and frame frequency is shown in FIG.
Alternatively, it becomes as shown in FIG.

Next, when the TV image is selected, the changeover switch 408 selects the hysteresis / comparator side. FIG. 11 shows the relationship between the temperature, the output of the hysteresis comparator and the frame frequency. As shown in the figure, the output voltage of the hysteresis comparator switches from Low level to High level when the temperature rises to b. On the contrary, when the temperature decreases, it becomes L level when it decreases to a. The width of a and b is hysteresis, which is determined by the values of the voltage source 404 and the resistors 406 and 407.

Next, the relationship between temperature and frame frequency will be described. In general, a computer image is a still image, whereas a TV image is a moving image, so the display content changes for each frame. Therefore, in order to obtain a natural moving image display,
When changing the frame frequency, it is desirable to change in frame units.

Therefore, the ROM 402 sets the frame frequency to 60 Hz when the output of the hysteresis comparator is at the L level, and when the output of the hysteresis comparator is at the H level, it is 12 times as large as that at the L level.
The data signal is output so as to be 0 Hz.

As described above, according to the present embodiment, even when the TV image and the computer image are switched and displayed, it is possible to secure the writing rate above a certain level regardless of the temperature change. In addition, since the hysteresis is provided, the frame frequency does not change finely even if the temperature repeatedly changes up and down across a or b, so that the moving image on the TV does not become unnatural.

In the present embodiment, an example in which the frame frequency is doubled has been shown. However, since one frame of a TV signal is composed of two fields, it may be set to 1.5 times 90 Hz.

FIG. 12 shows a block diagram of the fourth embodiment of the present invention. 71 is a changeover switch that can be arbitrarily changed from the outside. The configuration and operation of each of the other blocks are the same as those in the first embodiment, and thus their repetitive description will be omitted.

In the first embodiment, the frame frequency is automatically changed according to the ambient temperature to keep the writing rate constant, whereas in this embodiment, the user selects the changeover switch 7.
The timing generation circuit is controlled by 1 and the display screen size is changed by changing only the dot clock frequency while the frame frequency is constant. That is, the frequency division number of the programmable divider 504 of the timing generation circuit 50 is switched.

FIG. 13 shows an example of the structure of the main part of the timing generation circuit in this embodiment. In this configuration, only the PLL circuit of the timing generation circuit of the first embodiment shown in FIG. 3 is taken out. Since the operation of each block is the same as that of the first embodiment, the repetitive description will be omitted.

In the present embodiment, the control signal from the changeover switch is input to the control terminal 505 of the programmable divider 504, and the output signal of the VCO 503, that is, the read clock of the frame memory 20 and the matrix display panel 10 is input in accordance with the control signal. The dot clock frequency changes. On the other hand, horizontal / vertical sync signals (HD / VD)
The read reset signal of the frame memory 20 is output as it is without being controlled by the temperature. Therefore, the frame frequency is constant even if the temperature changes, and only the dot clock frequency changes.

FIG. 14 shows a display example of the matrix display panel according to this embodiment. Reference numeral 100 is a display screen of the matrix display panel. As described above, when designing a matrix display panel, the worst value (0 ° C.) is taken, and therefore, trying to guarantee the writing rate results in the smallest display screen size shown by the broken line. However, the matrix display panel of this embodiment is designed at room temperature (temporarily 25 ° C.) and has a larger screen size than that at 0 ° C. Normally, the environment in which the matrix display panel is used is room temperature, so that it can be displayed on the entire screen of the matrix display panel as shown in FIG. That is, a larger screen display than the current matrix display panel becomes possible. Even if the temperature drops, if the clock frequency is controlled by the changeover switch and the screen size is reduced and used, a display of the same size as the current matrix display panel can be obtained while maintaining the writing rate.

As described above, according to this embodiment, the maximum size display screen (or the number of pixels) can be obtained in accordance with the temperature while maintaining the writing rate.

In the present embodiment, the case where the screen size is switched from the outside has been described as an example, but the screen size may be automatically switched by the temperature sensor as in the first embodiment.

Further, in the present embodiment, an example in which the screen size is changed by one matrix display panel has been shown, but several matrix display panels having different screen sizes or different numbers of pixels may be replaced depending on the temperature.

FIG. 15 shows a block diagram of the fifth embodiment of the present invention. A CPU (central processing unit) 82 outputs a computer image to the frame memory 20 and controls a timing generation circuit to switch the frame frequency. Since the configuration and operation of the other blocks are the same as those of the fourth embodiment, their repetitive description will be omitted.

As described above, according to this embodiment, since the frame frequency can be switched by the CPU, it is possible to realize a laptop computer capable of displaying at a sufficient writing rate regardless of temperature.

In the present embodiment, the case where the switching is performed by the control of the CPU has been described as an example, but it may be automatically switched by the temperature sensor as in the first embodiment.

[0052]

According to the present invention, since the frame frequency of the display signal is changed according to the ambient temperature, the writing rate is kept constant regardless of the temperature.

Further, according to the present invention, by increasing the frame frequency as much as possible in accordance with the ambient temperature, it is possible to minimize flicker during multi-gradation display by the FRC system.

Further, according to the present invention, it is possible to obtain a matrix display panel having a resolution as high as possible or as large as possible within a range in which the writing rate does not decrease with temperature.

[Brief description of drawings]

FIG. 1 is a block diagram of a first embodiment of the present invention.

FIG. 2 is a diagram showing a configuration example of a controller of the first embodiment shown in FIG.

FIG. 3 is a diagram showing a configuration example of a timing generation circuit of the first embodiment shown in FIG.

FIG. 4 is a diagram showing an example of the relationship between temperature and frame frequency in the first embodiment shown in FIG.

FIG. 5 is a diagram showing another example of the relationship between temperature and frame frequency in the first embodiment shown in FIG.

FIG. 6 is a graph showing a relationship between a frame frequency and a writing rate.

FIG. 7 is a block diagram of a second embodiment of the present invention.

FIG. 8 is a principle diagram of an FRC method.

FIG. 9 is a block diagram of a third embodiment of the present invention.

FIG. 10 is a diagram showing a configuration example of a controller of the third embodiment shown in FIG. 9.

11 is a diagram showing an example of the relationship between temperature and frame frequency of the third embodiment shown in FIG. 9.

FIG. 12 is a block diagram of a fourth embodiment of the present invention.

FIG. 13 is a diagram showing a configuration example of a timing generation circuit of the fourth exemplary embodiment shown in FIG. 13.

FIG. 14 is a principle diagram of a fourth embodiment of the present invention.

FIG. 15 is a block diagram of a fifth embodiment of the present invention.

[Explanation of symbols]

 10 ... Matrix display panel, 20 ... Frame memory, 30 ... Temperature sensor, 40, 41 ... Controller, 50, 51 ... Timing generation circuit, 60 ... FRC circuit, 70 ... Switching circuit, 401 ... A / D converter, 402 ... ROM , 82 ... CPU.

Claims (5)

[Claims] 1. An input signal to be displayed in a matrix display device comprising a matrix display panel in which pixels, which are the minimum units for image display, are arranged in a matrix, and horizontal and vertical scanning circuits for driving the matrix display panel. Of the matrix display device, a frame (field) memory that reads and outputs the image data at an arbitrary frequency, a timing signal generation circuit that generates a timing signal for operating the matrix display device and the frame memory, A temperature sensor that senses an ambient temperature; and a controller that controls a frequency of a read clock of the frame memory that is generated by the timing signal generation circuit according to temperature information sensed by the temperature sensor. Matrix display device. 2. A matrix display panel in which pixels, which are the minimum units of image display, are arranged in a matrix, and an input to be displayed from among a plurality of levels of voltages preset in each pixel of the matrix display panel. A grayscale number n which is composed of horizontal and vertical scanning circuits for outputting a voltage of a level selected according to signal data to drive the matrix display panel, and which is determined by the preset voltages of a plurality of levels.
In a matrix display device that displays an image with (where n is an integer), the input signal to be displayed is captured and stored as image data, and the frame (field) memory that reads and outputs at an arbitrary frequency and the read from the frame memory. The outputted image data is taken in, and a certain gray scale in the gray scale number n and another (or the same) gray scale in the gray scale number n are alternately arranged in pixel units for each frame. A frame rate control (FRC) circuit for switching and outputting to the horizontal scanning circuit, and visually generating on the matrix display panel halftones of the gradation determined by the voltage of the preset multiple levels in pixel units; , The matrix display device, the frame memory and the FRC
A timing signal generating circuit for generating a timing signal for operating the circuit; a temperature sensor for sensing the ambient temperature of the matrix display device; and the frame generated by the timing signal generating circuit according to the temperature information sensed by the temperature sensor. A matrix display device comprising: a controller that controls a frequency of a read clock of the memory. 3. An input signal to be displayed in a matrix display device comprising a matrix display panel in which pixels, which are the minimum units for image display, are arranged in a matrix, and horizontal and vertical scanning circuits for driving the matrix display panel. A frame (field) memory for loading and storing as image data, reading and outputting at an arbitrary frequency, a selector switch for switching between capturing a video signal as the input signal and capturing a personal computer information signal, and the matrix display device. And a timing signal generating circuit for generating a timing signal for operating the frame memory, a temperature sensor for sensing the ambient temperature of the matrix display device, and the timing signal generating circuit for generating the timing signal according to the temperature information sensed by the temperature sensor. The frequency of the read clock of the frame memory A matrix display device comprising: a controller for controlling a wave number; and a switching circuit for controlling switching of the changeover switch and switching control operation of the controller according to the controller. 4. An input signal to be displayed in a matrix display device comprising a matrix display panel in which pixels, which are the minimum units for image display, are arranged in a matrix, and horizontal and vertical scanning circuits for driving the matrix display panel. A frame (field) memory that captures and stores the image data as image data, and reads and outputs the image data at an arbitrary frequency, a timing signal generation circuit that generates a timing signal for operating the matrix display device and the frame memory, and the timing signal generation circuit. A matrix display device comprising: a changeover switch for controlling a frequency of a generated clock and changing a display size of a matrix display panel. 5. An input signal to be displayed in a matrix display device comprising a matrix display panel in which pixels, which are the minimum units for image display, are arranged in a matrix, and horizontal and vertical scanning circuits for driving the matrix display panel. The frame (field) memory that captures and stores the image data as image data and reads and outputs it at an arbitrary frequency, the timing signal generation circuit that generates the timing signal that operates the matrix display device and the frame memory, and the image to the frame memory A computer device with a matrix display device, comprising: a CPU that controls data supply and the timing signal generation circuit.