JPH06105253A - Television receiver - Google Patents

Abstract

PURPOSE:To demodulate a signal in which a peak value of a synchronizing signal is less than a peak value of a television signal and applying proper AGC to the signal independently of the content of a signal such as a pattern. CONSTITUTION:The television receiver is provided with demodulation means 2, 3 receiving and demodulating a signal in which a peak value of a synchronizing signal is less than a peak value of a television signal and with a peak hold means 22 extracting a stable DC level in the demodulated television signal when a specific television signal is received, and also with a level shift means 22 level-shifting the DC level to generate a proper signal level to obtain a peak value to the television signal and latching the level, a switch means 24 adding a latched signal as a pseudo synchronizing signal to the television signal from the demodulation means, a pseudo synchronizing signal timing generating circuit 23 generating a timing signal for the purpose, and AGC circuits 7, 8 controlling automatically the gain of RF and IF amplifiers of the demodulation means based on the peak value of the pseudo synchronizing signal.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver, and more particularly, to an AGC circuit for determining the gains of RF and IF amplifiers according to the peak value of a synchronizing signal of a television signal. The present invention relates to a television receiver capable of stably applying AGC even when receiving and demodulating a signal having a peak value (maximum value or minimum value) of a television signal.

[0002]

2. Description of the Related Art FIG. 4 shows a block diagram of a video detection circuit in a conventional television receiver.

In FIG. 4, a television signal converted into an intermediate frequency signal (hereinafter referred to as an IF signal) by a tuner (not shown) is input to an input terminal 1, and this IF signal is amplified by an IF amplifier circuit 2. , Is input to the detection circuit 3 and the carrier extraction circuit 5 for performing synchronous detection. The signal detected by the detection circuit 3 is output to the output terminal 4, and at the same time, is input to the lock control circuit 6 for controlling the pull-in of the carrier extraction circuit 5 and also to the IF AGC circuit 7. The AGC voltage from the IF AGC circuit 7 controls the gain of the IF amplifier circuit 2. IF
The AGC voltage in the AGC circuit 7 is the RF AGC circuit 8
The AGC voltage obtained at the output terminal 9 thereof is controlled by the gain of a tuner (not shown).

The IF AGC circuit 7 detects a change in the amplitude of the sync signal and uses it as the AGC voltage. The peak value (sync tip level) of the sync signal is the peak value (here, the peak value) of the television signal. The video detection signal having the minimum value (NTSC video signal as shown in FIG. 5) operates normally, and the detection circuit 3 has the characteristics as shown in FIG. 7 (video detection if the IF input level increases). Since the output level decreases and the IF input level becomes smaller than a predetermined value, the video detection output level becomes constant), so that the sync tip level of the video detection signal in FIG. 5 becomes a predetermined DC level. The gain of the IF amplifier circuit 2 and the gain of a tuner (not shown) are controlled by the RF AGC circuit 8.

By the way, the IF AGC circuit 5 is
Utilizing the fact that the sync tip level shows the lowest voltage in the video detection signal and is stable,
The IF AGC circuit 5 is for controlling
When a signal whose sync tip level does not reach the minimum voltage, for example, a video signal as shown in FIG. 6, is input, the AGC is applied to the IF amplifier circuit 2 by the average value of the minimum voltage of the audio signal, the color signal, or the luminance signal in FIG. Therefore, the gain varies depending on, for example, a picture, and stable operation cannot be expected. Although FIG. 6 shows an example of a muse (MUSE) signal, the same situation occurs when video scrambling is applied to an NTSC television signal.

Therefore, conventionally, in the case of the signal of FIG. 6, a portion where the voltage is stable in the video signal is set by a clamp,
A key signal for extracting this is created, a pseudo synchronization signal adding circuit 10 as shown in FIG. 8 is provided, and between the output end of the detection circuit 3 and the IF AGC circuit 7 of FIG. 4 (a portion indicated by a dotted frame 10). It is located in.

The pseudo sync signal adding circuit 10 shown in FIG.
Between the DC power source Vcc and the reference potential point, a PNP transistor T
A first emitter follower circuit composed of r1 and an emitter resistor R1, an NPN transistor Tr2 and an emitter resistor R2.
The second emitter follower circuit is connected in cascade,
The video signal from the detection circuit 3 is input to the base of the transistor Tr1 of the transistor Tr1, and the resistor R3, the variable resistor R4, and the collector-emitter path of the transistor Tr3 are connected in series between the emitter of the second transistor Tr2 and the reference potential point. A key signal is input to the base of the transistor Tr3, a video signal output is obtained from the connection point of the resistors R3 and R4, and the video signal output is supplied to the IF AGC circuit 7.

According to the configuration in which the pseudo sync signal adding circuit of FIG. 8 is added to the circuit of FIG. 4 as described above, the peak value of the sync signal of the video signal from the detection circuit 3 is the minimum value of the video signal. Even if it is a special television signal as shown in Fig. 9 (a), the part where the voltage level is stable (clamp level) is set in the video signal, and Fig. 9 (b) synchronized with this clamp part is set. The transistor Tr3 is turned on by the key signal shown in, and the video signal voltage during that period is changed to the resistance R.
A video signal as shown in FIG. 9 (c) having a provisional sync signal (pseudo sync signal) which becomes a minimum value by lowering to a voltage determined by the base-emitter voltage VBE of 3, R4 and the transistor Tr3. You can get the output.

However, according to the above-mentioned conventional method, ideally, the output shown in FIG. 9 (c) should be obtained as the video signal output of FIG. 8, but as shown in the signal example of FIG. If the signal spacing is field spacing, A
As shown in FIG. 9 (d), sag occurs in the video signal output during the operation of the GC circuit. This can be alleviated by adjusting the loop gain of the AGC circuit, but this causes a problem that the response speed is lowered, the error is large, the convergence takes a long time, and it is not practical. Therefore, if another AGC system suitable for the video signal shown in FIG. 6 is used, there is a possibility that the normal NTSC system video signal shown in FIG. 5 cannot be shared with the receiver.

[0010]

As described above, according to the conventional method of adding the pseudo sync signal, when the video signal whose peak value of the sync signal is not the minimum value (or the maximum value) is received, the key signal is received. If the interval is a field interval, a sag occurs in the video signal output during the operation of the AGC circuit, so it is necessary to mitigate it by adjusting the loop gain of the AGC circuit, but this reduces the response speed, There is a problem that the error is large and it takes a long time to converge and is not practical. Therefore, if another AGC method is used, there is a problem that it cannot be shared with a receiver that receives a normal video signal such that the synchronization signal has a minimum value.

Therefore, the present invention uses a video detection circuit to demodulate a special television signal such that the peak value of the synchronizing signal does not reach the minimum voltage, and applies an appropriate AGC that does not depend on the contents of the signal such as picture. It is an object of the present invention to provide a television receiver that can be used.

[0012]

A television receiver according to the present invention as set forth in claim 1 is capable of receiving and demodulating a signal in which the peak value level of the synchronizing signal is less than the peak value of the television signal. Demodulation means, an extraction means for extracting a stable DC level in the television signal demodulated by the demodulation means when the demodulation means receives a special television signal, and the extraction means for extracting the DC level. Signal holding means for creating and holding an appropriate synchronizing signal level such that the direct current level is level-shifted to have a peak value with respect to the television signal, and the holding signal created by this signal holding means is used as a pseudo synchronizing signal. A signal adding means for adding to the television signal from the demodulating means, and a timing signal for generating a timing signal for adding the pseudo sync signal by the signal adding means. And a AGC circuit for automatically controlling the gains of the RF and IF amplifiers of the demodulating means with reference to the peak value of the pseudo sync signal in the television signal output from the signal adding means. It is characterized by having done.

According to a second aspect of the present invention, there is provided a television receiver according to the first aspect of the invention, wherein the signal adding means comprises switching means and the demodulating means receives a special television signal. When the switching means, the switching means, the television signal demodulated by the demodulating means and the holding signal created by the signal holding means,
The demodulating means outputs the data by selectively switching it according to the synchronization timing signal from the timing generating means and outputting it.
When the SC television signal is received, the switching means is controlled so as to always select the demodulated signal from the demodulating means as an output.

[0014]

The AGC circuit 5 requires a synchronizing signal that does not change depending on the content of the signal indicating the peak value (for example, a picture).

When a special video signal in which the peak value of the sync signal does not reach the peak value is received in the pseudo sync signal adding circuit, the invariant signal in the video signal (for example, clamp level in the case of muse signal) is changed to the key signal. According to the above, the signal voltage is held and further level-shifted so that it becomes a peak voltage as compared with other signals, and then the signal is added to the original special video signal at a constant timing, so that a pseudo N
A video signal of TSC system was created and input to the AGC circuit.

Thus, both the video signal having the sync signal level of the NTSC system and the video signal having the special sync signal level can be demodulated by the same detection circuit, and an appropriate AGC irrelevant to the picture can be applied. . Further, by setting the addition timing of the pseudo synchronization signal to the horizontal synchronization timing of NTSC, for example, the sag, which is a conventional defect, can be suppressed.

[0017]

EXAMPLES Examples will be described with reference to the drawings. FIG. 1 is a block diagram showing a television receiver according to an embodiment of the present invention.

In FIG. 1, a tuner (not shown) I
The television signal converted into the F signal is input to the input terminal 1, the IF signal is amplified by the IF amplification circuit 2, and then input to the detection circuit 3 and the carrier extraction circuit 5.
The signal detected by the detection circuit 3 is output to the output terminal 4, and at the same time, input to the lock control circuit 6 for controlling the pull-in of the carrier extraction circuit 5 via the pseudo sync signal adding circuit 10A, and It is input to the IF AGC circuit 7. The AGC voltage from the IF AGC circuit 7 controls the gain of the IF amplifier circuit 2. In addition, the IF AGC circuit 7
The AGC voltage at is input to the RF AGC circuit 8,
The AGC voltage output from the output terminal 9 controls the gain of a tuner (not shown).

The IF AGC circuit 7 detects a change in the amplitude of the sync signal and uses it as the AGC voltage. The peak value (sync tip level) of the sync signal is the peak value of the entire signal (here, the minimum value). Value) (the NTSC video signal as shown in FIG. 5)
To operate normally. The detection circuit 3 has a characteristic as shown in FIG. 7 (a characteristic in which the video detection output level decreases as the IF input level increases and the video detection output level becomes constant as the IF input level becomes lower than a predetermined value). Therefore, the gain of the IF amplifier circuit 2 and the gain of a tuner (not shown) are controlled by the RF AGC circuit 8 so that the sync chip level of the video detection signal of FIG. 5 becomes a predetermined DC level.

The sync addition circuit 10A receives a key signal and clamps the peak value to a predetermined control voltage, and a video detection output from the detection circuit 3 based on the control voltage of the clamp circuit 21. Of the invariant voltage (clamp level), and the peak hold and level shift circuit 22 for level-shifting and outputting the detected clamp level by a predetermined value, and the peak hold and level shift circuit 22 at one input terminal L. Is supplied, the video detection output of the detection circuit 3 is supplied to the other input terminal H, and the input terminals L and H are supplied with timing pulses.
To selectively switch between the analog switch 24 for outputting the video signal to which the pseudo sync signal is added as an output and supplying it to the IF AGC circuit 7 and the input terminals L and H of the analog switch 24. And a pseudo sync signal timing generation circuit 23 for generating a timing pulse of 1 horizontal cycle.

Next, the operation of the pseudo sync signal adding circuit 10A in FIG. 1 will be described with reference to the timing chart of FIG. 2 (in the case of a muse signal). As a key signal input, a signal indicating a period (for example, a clamp level 30 period in the case of the muse signal shown in FIG. 2A) that does not change depending on the signal content of the video signal shown in FIG. b)
(Reference) is input. The key signal input to the clamp circuit 21 is converted into a control voltage of the peak hold and level shift circuit 22, and the peak hold and level shift circuit 22 detects the clamp level 30 from the video signal input of FIG. 2 (a). At the same time, although the clamp level 30 has a constant voltage value in the video signal, but is not the minimum voltage, the clamp level 30 is shifted by a predetermined amount by the level shift to create and hold a proper level. The level shift amount is always constant, and even when the clamp level 30 before being pulled in by the AGC is unstable, a constant difference is held and output.

In the pseudo sync signal timing generation circuit 23, a pulse as shown in FIG. 2 (c) is created, and the analog switch 24 is switched as follows by this timing pulse. While the timing pulse is at the low level (L), the peak hold and hold output of the level shift circuit 22 is output, and while the timing pulse is at the high level (H), the video signal from the detection circuit 3 is directly output. As a result, the video signal output from the analog switch 24 is a video signal (pseudo NTSC signal) to which a pseudo sync signal is added as shown in FIG. 2 (d).

FIG. 3 shows an actual circuit example of the pseudo sync signal adding circuit. In the case of the muse signal, the key signal indicating the period of the clamp level 30 is detected by the MUSE decoder. This is input to the clamp circuit 21 as a key signal. The key signal is the resistance 51, 53, 54, 56, 57,
58, 60, 62, 63, 64, 65, capacitor 5
It is converted into a control voltage for the peak hold and level shift circuit 22 by a clamp circuit 21 composed of 2, 59 and transistors 55, 61, 66.

Peak hold and level shift circuit 22
Are resistors 70, 71, 74, 75, 78, 81, 82,
It is composed of a capacitor 72, an analog switch 76, buffer amplifiers 73, 77, 80, and an operational amplifier 83. The video signal from the detection circuit 3 is input to the peak hold and level shift circuit 22, and the analog switch 76 is switched according to the key signal, so that the voltage of the video signal during the clamp level 30 is the buffer amplifier 77, It is held in the capacitor 79 via the resistor 78. The voltage held in the capacitor 79 is supplied to a subtraction circuit including an operational amplifier 83 and resistors 75, 74, 82, and 81 via a buffer amplifier 80, where the voltage subtraction (level shift) set by the resistors 71 and 70 is performed. Is output to the input terminal L of the analog switch 24. The level-shifted output is held at a value (level) smaller than the minimum value of the input video detection signal. That is, the holding voltage that is the peak value of the pseudo sync signal is supplied to the input terminal L of the analog switch 24. The video signal from the detection circuit 3 is supplied to the input terminal H of the analog switch 24.

The holding voltage, which is the peak value of the pseudo sync signal thus created, and the video signal from the detection circuit 3 are alternately switched by the analog switch 24 and output. The analog switch 24 is alternately switched by the pseudo sync signal timing generation circuit 23 described below.

The pseudo sync signal timing generation circuit 23
An oscillator circuit composed of inverters 87, 88, a crystal 89, a resistor 90 and capacitors 91, 92, and a frequency divider 86.
, A mono-multivibrator 93, a time constant circuit of a resistor 94 and a capacitor 95, and an output amplifier including resistors 96, 97 and 99 and a transistor 98. In this circuit 23, the cycle of the oscillation signal by the inverters 87, 88, the crystal 89, the resistor 90, and the capacitors 91, 92 is adjusted to an appropriate cycle by the frequency divider 86, and the duty ratio is adjusted by the mono-multivibrator 93. , A horizontal cycle pseudo sync signal is output as a timing signal.

In the circuit of FIG. 1, a normal NTS is used.
When the C signal (see FIG. 5) is received, the pseudo sync signal adding circuit 10A can be bypassed by fixing the analog switch 24 to the H side.

Although the positive polarity video signal in which the peak value of the sync signal has the minimum value has been described according to the above-described embodiment, the present invention has the peak value of the sync signal having the maximum value. Of course, it can be applied to a certain negative video signal.

[0029]

As described above, according to the present invention, in a television receiver for receiving and demodulating a television signal such that the sync signal has a peak value (minimum value or maximum value), It is possible to receive and demodulate a signal whose peak value of the synchronization signal is not the peak value, and to apply AGC that does not make the operation unstable due to a picture or the like.

[Brief description of drawings]

FIG. 1 is a block diagram showing a video detection circuit in a television receiver according to an embodiment of the present invention.

FIG. 2 is a timing diagram illustrating the operation of the pseudo sync signal adding circuit in FIG.

3 is a circuit diagram showing a specific example of a pseudo sync signal adding circuit in FIG.

FIG. 4 is a block diagram showing a video detection circuit in a conventional television receiver.

FIG. 5 is a waveform chart showing an example of a video signal.

FIG. 6 is a waveform chart showing another example of a video signal.

FIG. 7 is a characteristic diagram showing input / output characteristics of a detection circuit.

FIG. 8 is a circuit diagram showing a conventional pseudo sync signal adding circuit.

9 is a timing chart for explaining the operation of the pseudo sync signal adding circuit in FIG.

Claims (2)

[Claims] 1. A demodulation means capable of receiving and demodulating a signal whose peak value level of a synchronizing signal is less than a peak value of a television signal, and the demodulation means receives a special television signal. In this case, extraction means for extracting a stable DC level in the television signal demodulated by the demodulation means, and the DC level from this extraction means are level-shifted to become a peak value for the television signal. A signal holding means for creating and holding such an appropriate signal level, and a signal adding means for adding the holding signal created by the signal holding means to the television signal from the demodulating means as a pseudo synchronization signal, Timing generating means for generating a timing signal for adding a pseudo synchronization signal by the signal adding means, and a television signal output from the signal adding means. Based on the peak value of the pseudo sync signal in, R in the demodulating means
A television receiver comprising an AGC circuit for automatically controlling the gains of F and IF amplifiers. 2. The signal adding means is composed of switching means, and when the demodulating means receives a special television signal, the switching means is a television signal demodulated by the demodulating means. And the holding signal created by the signal holding means is selectively switched by the synchronizing timing signal from the timing generating means and output, and the demodulating means receives a normal NTSC television signal. Is the switching means,
The television receiver according to claim 1, wherein the television receiver is controlled so that the demodulated signal from the demodulating means is always selected as an output.