JPH0588646A - Matrix driving method for plane type display device - Google Patents

Abstract

PURPOSE:To prevent a flicker and improve the picture quality of the plane type display device which makes a multi-gradation display by an equal division frame period shortened scanning method as to a plane type display device which has the bistability of ferroelectric crystal. CONSTITUTION:When a 2N-gradation display is made, a frame period Tf is divided equally into N fields and writing to all scanning lines in each field is performed. Further, all the scanning lines are divided into plural groups, resetting is performed in each group a time, corresponding to the 2N (n: 0, l, ..., N-1) gradations, after the wiring to the respective fields, and an interlaced scan on the respective groups is performed so that the periods of the same gradations in the respective groups do not overlap with one another in terms of time.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a matrix driving method for displaying multi-gradation by using a bistable flat display device such as a ferroelectric liquid crystal.

[0002]

2. Description of the Related Art Ferroelectric liquid crystals and other flat display devices having high-speed switching characteristics and bistability (memory property) are known. Various driving methods utilizing the characteristic of the bistability have also been proposed.

For example, in the two-field method, one frame is divided into two.
It consists of two consecutive fields, a first field that draws black and holds white pixels, and a second field that draws white pixels and holds black pixels. This method requires two separate fields to write black and white, which increases the time (frame period) T _f required to write one frame. That is, if the pulse width (selection time) required for writing white or black is 2τ, this method requires a writing time of 4τ. For this reason, a liquid crystal capable of extremely shortening the selection time 2τ or the pulse width τ is inevitably required. However, it is very difficult to obtain such a high-speed response. Also, since the pulse width τ cannot be shortened,
The frame period T _f becomes long and flicker is likely to occur.

The equal division scanning method is also known. In this method, as shown in the explanatory diagram of FIG. 12, when one frame period T _{f is set} to n + 1 gradations (n = 15 in the figure), it is equally divided into n and all the scanning lines ( The number Y is set to, for example, 480), and writing is performed while the writing timing is set for each scanning line. RS in the drawing is a simplified representation of the timing of the write scan corresponding to each scan line. In this method, the number of blocks to be written in black or white is changed from 0 to 15 according to the gradation to be drawn. That is, for example, in gradation 1, black or white is written only for the time of block 1, and in gradation 10, blocks 1 to 1 are written.
Write for 10 hours.

However, this method has a problem that the writing pulse width τ for white or black becomes very short. That is, τ = T _f / (Y × n × 2) = T _f / 480 × 15 × 2 = T _f / 14400, which also requires a liquid crystal having extremely high responsiveness.

A uniform division frame period shortening scanning method is also known (for example, Japanese Patent Laid-Open No. 62-56936). The method as shown in Example 16 (= 2 ⁴⁾ gradations in FIG. 13, 2 ⁴ each have a frame period T _f 4 equal parts when the tone block 1
To 4 are respectively associated with gradations of 8, 4, 2, and 1, and desired gradations are drawn by using blocks 1 to 4 as needed. Here, in each of the blocks 1 to 4, writing is performed at the timing shown by RS in the figure, while the block 2,
In 3 and 4, 4 from writing of this RS,
After a time corresponding to 2 and 1 gradation, the reset indicated by R is performed, and all the pixels on the scanning line are forcibly reset. As a result, each of the blocks 2, 3, 4 is changed to 4, 2, 1
Corresponding to the gradation of.

According to this method, the pulse width τ can be made sufficiently long as τ = T _f / (480 × 4 × 2) = T _f / 3840. However, according to this method, there is a problem that flicker, that is, flickering of the screen is likely to occur. ..

In this flicker, the blinking of adjacent pixels is 1
This occurs when synchronizing with each other within the frame period T _f or when approaching in time, and in FIG. 13, adjacent pixels on adjacent scanning lines blink in synchronism with each other.

[0009]

SUMMARY OF THE INVENTION The present invention has been made in view of such circumstances, and in the conventional equal division frame period shortening scanning method shown in FIG. It is an object of the present invention to provide a matrix driving method for the flat display device.

[0010]

According to the present invention, an object of the present invention is to form a pixel having bistability in an intersection region of a scanning electrode and a display electrode, and set each pixel to be bright or dark to display a 2 ^N gray scale. In the matrix driving method for a flat panel display device, the frame period T _f is equally divided into N fields, and writing is performed for all scanning lines in each field, while all scanning is performed. The line is divided into a plurality of groups, and within each of these groups, 2 from the writing of each field.
ⁿ (n is 0, 1, ..., N-1) is reset after a time corresponding to the gradations, and the groups are interlaced so that the periods of the same gradation in each group do not overlap in time. It is achieved by a matrix driving method of a flat panel display device characterized by scanning.

For the same purpose, the frame period T _f is equally divided into N fields, and writing is performed for all scanning lines in each field, while the scanning is performed for each scanning line. From the writing of each field, 2 ^N (n is 0, 1, ..., N
It is also achieved by a matrix driving method of a flat-panel display device, which is reset after a time corresponding to the gradation of -1) so that the periods of the same gradation of adjacent scanning lines do not overlap in time. It

The scanning lines adjacent to each other have a phase of about 180.
It is desirable to shift the angle by 90 °, but if this is not possible, it is better to make the phase difference as close to 180 ° as possible.

[0013]

EXAMPLE FIG. 1 is a conceptual diagram showing an electrode arrangement of a liquid crystal display panel,
FIG. 2 is a sectional view taken along the line II-II. Reference numeral 1 in these figures
Reference numeral 0 is an upper substrate made of a transparent glass plate, and 12 is a lower substrate. Reference numerals 14 and 16 denote transparent strip-shaped data electrodes and scanning electrodes formed on the surfaces of the upper and lower substrates 10 and 12 facing each other. These electrodes 14 and 16 are orthogonal to each other.

These electrodes 14 and 16 are covered with alignment films 18 and 20, respectively, and are arranged so as to face each other, and a liquid crystal 22 is sandwiched between the electrodes. 24 is this liquid crystal 2
It is a spacer for keeping the gap of 2 constant. As a result, the region sandwiched between the electrodes 14 and 16 (for example, region A shown in FIG. 1) becomes a pixel region in which the amount of transmitted light changes depending on the voltage between the electrodes 14 and 16.

As the liquid crystal 22, for example, a ferroelectric liquid crystal is suitable. The ferroelectric liquid crystal 22 is a group of smectic liquid crystal materials exhibiting spontaneous polarization represented by a liquid crystal of a chiral smectic C phase, and exhibits a fast switching phenomenon and a memory phenomenon called bistability. That is, the molecular alignment state in which the orientation directions of the spontaneous polarization formed by the application of the electric field are uniformly aligned has the property of being stored as it is even when the electric field is cut off. The liquid crystal plate thus manufactured is placed between two polarizing plates (not shown) and controls the amount of transmitted light from the illumination device placed behind it.

[0016]

[Scanning Chart] A scanning chart used in the following description will be described. The signals supplied to the scanning electrode 16 (see FIGS. 1 and 2) and the data electrode 14, that is, the scanning signal v _c and the data signal v _I are composed of pulses having the waveforms shown in FIG.

The scanning signal v _c is made by combining three kinds of signals of reset, selected and non-selected. The selection signal S has a class-like waveform having a potential of 0 and a potential of V _s each having a time width of τ. The time 2τ is a period in which the pixels on the scan electrode 16 are oriented in “bright” or “dark”, and is called a selection period. The non-selection signal N has a waveform of potentials 3V _s / 4 and V _s / 4 each having a time width of τ, and the time width 2τ is a period for scanning another scan electrode 16.

The reset signal R, and R ₁ which between the potential of 2τ is V _s, with two waveforms of R ₂ to between the potential of 2τ is zero. These three types of signals S, N and R are combined as described below and supplied to each scanning electrode 16. Data electrode 1
The data signal v _I supplied to 4 is 2 as shown in FIG.
It has two kinds of signals of ON and OFF having a time width of τ.

In the pixel area where the scan signal v _c on the scan electrode 16 and the data signal v _I on the data electrode 14 intersect,
As shown in FIG. 4, both signals v _c and v _I are combined to add the pixel voltage (v _c −v _I ). That is, when the scan signal v _c is the reset signal R, R ₁ and R ₂
Corresponding to the on / off state of the data signal v _I with respect to each time 2τ, four different pixel voltages [v _c −v _I ] _R are obtained. Here, it is the last voltage portion, that is, the shaded portion, that contributes to the change in the brightness of the pixel, and the area τ × V _S of this shaded portion is always a certain value or more, so that the pixel is forced to be “dark”. .. That is, the data signal v _I
It always "resets" to "dark" regardless of whether it is off.

When the scanning signal v _c is the selection signal S,
Data signal v 2 kinds of pixel voltage corresponding to the _I ON and OFF shown in FIG. 4 [v _c -v _{I] S} is obtained. Data signal v
_{When I} is on, the pixel voltage becomes V _S and the pixel is “bright”.
To When the data signal v _I is off, the pixel voltage is V _s
It becomes / 2 and the brightness of the pixel is not changed. When the scanning signal v _c is the non-selection signal N, the pixel voltage [v _c −v _I ] _N for changing the brightness of the pixel cannot be obtained regardless of whether the data signal v _I is on or off. Brightness does not change.

The scanning signal v _c is a combination of the selection signal S, the non-selection signal N, and the reset signal R, as shown in FIG. Here, the scanning signals v _c1 , v _c2 , v _c3 ...
6 is applied. A reset signal R is added immediately before the selection signal S, and writing is performed with these signals (R ₁ R ₂ S) as a set. This write signal is indicated by RS.

As described above, the scanning signal v _c is composed of the write signal RS, the non-selection signal N and the reset signal R. Therefore, FIG. 5A is simplified and as shown in FIG. As shown in (C) of the figure, the timing of writing scan is indicated by a straight line RS and the reset timing is indicated by a broken line R.

[0023]

[Embodiment with 8 gradations] FIG. 6 is a scanning chart of an embodiment applied when 2 ^N = 2 ³ = 8 gradations. In this embodiment, the frame period T _f is divided into 3 (= N) fields F ₁ , F ₂ , F ₃ at equal intervals. The actual straight line RS indicates the timing of writing to all the scanning lines (480 lines) in each field. All scanning lines are equally divided into a group Y _{1 in} which the _first half of writing is performed and a group Y _{2 in} which the second half of writing is performed. Therefore, each group Y ₁ and Y ₂ has 240 scanning lines.

[0024] In each of these groups Y _1, Y _2, each Fi - to field F ₁ ~F _3, (integer of n from 0 to N-1) 2 ⁿ from the write timing RS i.e. 2 ⁰ =
The reset is performed after a time corresponding to the gradation of 1,2 ¹ = 2, 2 ² = 4. The timing is shown by a broken straight line R. Here, in each of the groups Y ₁ and Y ₂ , the reset timing R is set so that the periods of the same gradation do not overlap in time. In this embodiment, the n-th scanning line (Y ₁ -n) and (Y ₂ -n) of each group Y ₁ and Y ₂ has a phase of 180.
Degrees are out of phase. The same applies to the second and subsequent scanning lines.

When scanning, the two groups Y ₁ and Y ₂ are interlaced for scanning. That is, each group Y ₁ , Y ₂
The n-th scanning line (Y ₁ -n) and (Y ₂ -n) are alternately arranged (see FIG. 7) for scanning. Scan lines of each group (Y ₁ −
n) and (Y ₂ −n) are always periods of different gradations at all times. In particular, the nth scanning lines of the _two groups Y ₁ and Y ₂ are 180 ° out of phase with each other and are in opposite phase.

Therefore, the blinking timing is 1 for both scanning lines.
The lightness and darkness are shifted by 80 °, as shown by I in FIG. 7. It is understood that I in this figure indicates the lightness when the gradation is "2", and the changing period thereof is _Tf / 2, which is half of the frame period _Tf (spatial integration effect). Therefore, flicker can be prevented.

In the interlaced scanning, each group Y ₁ ,
The scanning lines of Y ₂ may be arranged and scanned at predetermined intervals such as every two scanning lines. Further, after the field of _one group Y ₁ is displayed and the field of the other group Y ₂ is displayed, both fields may be alternately scanned to form one screen. A method of scanning in accordance with the arrangement order of the scanning lines may be used.

[0028]

[Embodiment 1 with 16 gradations] FIG. 8 is a scanning chart of an embodiment with 2 ^N = 2 ⁴ = 16 gradations, FIG. 9 is a diagram showing the scanning line arrangement, and FIG. It is an explanatory view of blinking timing for ". In this embodiment, the frame period T _f is N (=
4) number of Fi - equally divided into field F ₁ to F _4, each frame - performing writing over the entire scan line within the beam F ₁ to F ₄ (write timing RS). Then, the scanning lines are divided into two groups Y ₁ , Y ₂
In order to prevent overlapping of periods of the same gradation in each group. Especially adjacent scan lines (Y ₁ -n) and (Y ₂ -n)
Since the phase is shifted by 180 °, it is understood that the blinking cycle is T _f / 2, as shown in FIG.

[0029]

[Embodiment 2 of 16 gradations] FIG. 11 is a scanning chart of another embodiment for 16 gradations. In this embodiment,
The period T _f is equally divided into N (= 4) fields F _{1 to} F ₄ , while writing is performed over all the scanning lines in each field F _{1 to} F ₄ . The timing is indicated by RS. Then, the odd-numbered scanning lines are reset at the timing shown by R ₁ , and the even-numbered scanning lines are reset by R ₂
Reset at the timing shown in.

In the scanning lines adjacent to each other, the reset timings R ₁ and R ₁ are set so that the periods of the same gradation do not overlap.
₂ is set. In particular, in this embodiment, the phases of the odd-numbered scan lines and the even-numbered scan lines are set to be 180 ° apart from each other, so that the blinking period becomes T _f / 2, and the effect of preventing flicker becomes greater.

In each of the above embodiments, the phases of adjacent scanning lines are shifted by 180 °, but the present invention is not limited to this. That is, it is sufficient if the same gradation periods are not overlapped. Further, in each of the above embodiments, the scanning lines are divided into _two groups Y ₁ and Y ₂ , but the present invention may be divided into three or more groups. In this case, it is desirable that the phases of the adjacent scanning lines be as close to the opposite phase as possible.

Although the above-described embodiments use the ferroelectric liquid crystal, the present invention maintains the state in which the light or dark is written until the rewrite signal RS or the reset signal R is input (bistability (memory property). The present invention can be applied not only to liquid crystals but also to other display devices such as a plasma display as long as it is a flat display device having the above.

[0033]

As described above, the invention of claim 1 sets the number of gradations to 2 ^N and equally divides the frame period T _f into N fields, and performs full scanning within each field. While writing to a line, all scanning lines are divided into a plurality of groups, and reset in each group after a time corresponding to a gradation of 2 ⁿ (n = 0, 1, ..., N-1) from the writing. In addition, since the interlace scanning is performed so that the periods of the same gradation in each group do not overlap in time, blinking between adjacent pixels on adjacent scanning lines is not synchronized, and spatial integration is performed. There is also an effect and flicker can be effectively prevented. In this case, the number of scanning lines is 2 or more, for example, 2
Divided into two groups and the phase of adjacent scanning lines is approximately 180 °
In the case of staggering, the effect of preventing flicker becomes more remarkable due to the spatial integration effect (claims 2 and 3). Further, when the scanning lines are divided into groups of three or more and the interlace scanning is performed so that the scanning lines of each group are adjacent to each other, the blinking cycle is 1/3, 1/4 ... The effect of preventing flicker may be further enhanced (claim 4). According to the invention of claim 5, the reset timing is changed for the odd-numbered scan lines and the even-numbered scan lines so that the periods of the same gradation of the adjacent scan lines do not overlap in time. The same effect as that of the invention can be obtained. The effect is further enhanced by shifting the phases of the scanning lines adjacent to each other by approximately 180 ° (claim 6).

[Brief description of drawings]

FIG. 1 is a conceptual diagram showing an electrode arrangement of a liquid crystal display panel.

FIG. 2 is a sectional view taken along line II-II.

FIG. 3 is a waveform diagram of pulses of a scanning signal and a data signal.

FIG. 4 is a waveform diagram of a pixel voltage

FIG. 5 is an explanatory diagram of a scanning chart.

FIG. 6 is a scanning chart diagram of an example of 8 gradations.

FIG. 7 is an explanatory diagram of the blinking timing.

FIG. 8 is a scan chart diagram of Example 1 with 16 gradations.

FIG. 9 is an explanatory diagram of the scanning line arrangement.

FIG. 10 is an explanatory diagram of the blinking timing.

FIG. 11 is a scanning chart of Example 2 with 16 gradations.

FIG. 12 is an explanatory diagram of a conventional equal division scanning method.

FIG. 13 is an explanatory diagram of a conventional equal division frame period shortening scanning method.

[Explanation of symbols]

10 Upper Substrate 12 Lower Substrate 14 Data Electrode 16 Scanning Electrode 22 Liquid Crystal _Tf Frame Period F ₁ , F ₂ ... Field Y ₁ , Y ₂ ... Group RS Write Signal R Reset Signal

Claims (6)

[Claims] 1. A matrix drive of a flat display device for forming a 2 ^N gray scale display by forming pixels having bistability in an intersection region of scan electrodes and display electrodes and setting each pixel to be bright or dark. In the method, the frame period T
_{While f} is equally divided into N fields and writing is performed on all the scanning lines in each field, all the scanning lines are divided into a plurality of groups, and in each of these groups, From the writing of the fields, 2 ⁿ (n is 0, 1, ..., N-)
1) A flat display device characterized by being reset after a time corresponding to the gradation and performing interlaced scanning on each group so that periods of the same gradation within each group do not overlap in time. Matrix driving method. 2. The matrix driving method for a flat panel display device according to claim 1, wherein the scanning lines are divided into even groups, and the phases of the adjacent scanning lines interlaced are shifted by approximately 180 °. 3. The matrix driving method for a flat panel display device according to claim 2, wherein N is 3 and the scanning lines are divided into two groups. 4. The matrix driving method for a flat panel display device according to claim 1, wherein the scanning lines are divided into three or more groups, and the interlace scanning is performed so that the scanning lines of different groups are adjacent to each other. 5. A matrix drive of a flat display device for forming 2 ^N gray scales by forming pixels having bistability in an intersection region of scan electrodes and display electrodes and setting each pixel to be bright or dark. In the method, the frame period T
_{While f} is equally divided into N fields and writing is performed for all scanning lines in each field, 2 ^N (n is 0, n is 0, for each scanning line) from the writing of each field. 1,
, N-1) is reset after a time corresponding to the gray scale of N-1) so that the periods of the same gray scale of the adjacent scanning lines do not temporally overlap with each other. 6. The method for driving a matrix of a flat panel display device according to claim 5, wherein N is an even number and the phases of adjacent scanning lines are shifted by 180 °.