JPH0587850B2 - - Google Patents

Description

[Detailed description of the invention] [Technical field to which the invention pertains] The present invention relates to an interrupt function diagnosis method in a computer system using a data way, and in particular,
This is suitable for simulating a process control system using a data way.

[Prior art and its problems]

Conventionally, as an interrupt function diagnosis method, an interrupt function diagnosis method for a computer system shown in FIG. 1 has been proposed.

That is, computers 2 and 3 and channels 4 and 5 are connected to a loop-shaped data way 1. An interrupt test switch A is connected to each channel 4, 5.

Therefore, by generating the interrupt command WC for the computers 2 and 3 with the interrupt test switch A of each channel 4 and 5, whether or not the interrupt command WC is normally transmitted to the computers 2 and 3. The interrupt function is diagnosed by checking this.

However, in such a conventional interrupt function diagnosis method, when performing an interrupt function diagnosis, an interrupt test switch A is required, and the designation of computers 2 and 3 to which an interrupt is to be made can be made by operating the switch. This is troublesome and time consuming, and requires the tester to go to the remote channel location connected by data way 1 in order to perform the diagnosis. There is a risk of erroneously operating interrupt test switch A.
There were problems such as extra time required for communication with the computer that performs the diagnosis.

In addition, unless test hardware such as an interrupt test switch is prepared on the channel side, there is a problem in that the computer cannot unilaterally diagnose the interrupt function of the program.

In addition, computer systems that require real-time processing already use a program-based interrupt generation mechanism, but this is done for the purpose of starting a program with a higher priority level than the program currently being executed in the computer. Therefore, it could not be used to diagnose the interrupt function.

[Purpose of the invention]

This invention was made by focusing on the problems of the conventional method, and its purpose is to interrupt the computer from all interrupt control channels connected to the data way by an interrupt request command from the computer side. By generating interrupts, it is possible to diagnose the interrupt function of a computer program at a time when the test hardware is not ready, and when performing simulations assuming an actual system, it is possible to An object of the present invention is to provide an interrupt function diagnosis method in a computer system that can generate interrupt commands and realize this extremely easily.

[Key points of the invention]

This invention provides a computer system in which computers and channels are connected via a dataway.
providing the channel with an interrupt control means for generating an interrupt command in response to an interrupt request command transmitted from the computer via the data way;
A computer system characterized in that the interrupt function of the channel for the computer is diagnosed in the computer by sending the interrupt command to the computer when the interrupt request command is received from the interrupt control means. This relates to an interrupt function diagnosis method.

[Embodiments of the invention]

Embodiments of the present invention will be described below based on the drawings.

FIG. 2 is a block diagram showing one embodiment of the present invention, and FIG. 3 is a block diagram showing an example of the interrupt control channel.

In this invention, channels 4 and 5 connected to data way 1 are each configured as shown in FIG.

That is, channels 4 and 5 are connected to data way 1.
When the interrupt request command QC sent from computers 2 and 3 connected to is received, the interrupt command
A command processing device 6 that sends WC to the data way 1, an interrupt activation register 7 accessed by this command processing device 6, and an interrupt command and an external interrupt line from this interrupt activation register 7. OR gate 9 to which an external interrupt control signal from 8 is supplied, and interrupt cause register 1 to which the output signal of this OR gate 9 is written as an interrupt command WC.
0. Here, the command processing device 6, the interrupt activation register 7, and the OR gate 9 constitute an interrupt control means 11.

Here, the command processing device 6 has an internal computer number storage table 6a, and receives an interrupt request command QC from the computer 2 via the data way 1.
When QC is sent, by analyzing the command, the interrupt activation register 7 is accessed to generate an interrupt control signal corresponding to the interrupt request command QC, and the signal is written to the interrupt cause register 10. reads the interrupt control signal sent from the computer 2 and is stored in advance, and diagnoses the computer number storage table 6a shown in FIG. and sends an interrupt command WC via data way 1. The processing procedure of this command processing device will be explained using FIGS. 5 and 6. When the interrupt request command QC is received via the data way 1, the processing shown in FIG. 5 is executed. That is, the interrupt request command QC received at step is resolved. Then,
Proceeding to step, a flag is set at the bit position of the interrupt activation register 7 corresponding to the interrupt request command QC, and this flag is sent as an interrupt control signal. Further, when an interrupt control signal is written to the interrupt cause register 10 via the OR gate 9, the processing shown in FIG. 6 is executed. That is, the contents of the interrupt cause register 10 are read in step, and then the process moves to step. In this step, the computer number storage table is referred to in accordance with the bit in the interrupt cause register 10, and the computer number corresponding to that bit is selected. Next, the process moves to step 1 and an interrupt command WC containing the computer identification code is sent.
is created and sent to data way 1.

Next, the effect will be explained. For example, suppose that computer 2 stores a program for debugging the program of computer 3.
In this state, when the computer 2 sends an interrupt request command QC to the interrupt control channel 5 according to an operator's instruction, the command processing device 6 receives the interrupt request command QC.

Therefore, the command processing device 6 analyzes the interrupt request command QC, accesses the interrupt activation register 7, and outputs the interrupt control signal corresponding to the interrupt request command QC from the interrupt activation register 7. to occur.

This interrupt control signal is supplied to the interrupt cause register 10 via the OR gate 9 and written therein. Therefore, the command processing device 6 reads the contents of the interrupt cause register 10, refers to the computer number storage table 6a, selects the computer number (computer 2, 3) to which the interrupt is to be applied, and executes the interrupt accordingly. Create a command WC and send it to data way 1.

In this way, interrupt command is sent to data way 1.
When WC is sent, the interrupt in this case is sent to computer 2.
Since this is a debugging process for the program of computer 3, it can be confirmed that the program of computer 2 was interrupted and that the interrupt command WC was sent from channel 5 in computer 2. At the same time, if a debugging interrupt is caused to the computer 3, the computer 3 starts the program to be debugged by this debugging interrupt. For this reason, calculator 2
It is possible to check whether the program to be debugged on the computer 3 operates normally without preparing any special hardware, and the debugging process can be performed extremely easily.

Furthermore, when an external interrupt signal is supplied from the external interrupt line 8 to each channel 4, 5, it is written to the interrupt cause register 10 via the OR gate 9, so that the command processing device 6 handles the external interrupt signal. Interrupt command WC according to the signal is sent to data way 1
It is possible to send an interrupt to predetermined computers 2 and 3.

In the above embodiment, the case where the computer 2 executes the debugging process of the program of the computer 3 has been explained, but the invention is not limited to this. By sending an interrupt request command to channels 4 and 5 via data way 1,
It becomes possible to interrupt the computers 2 and 3 from each channel 4 and 5, and it is possible to simulate the operation of an actual computer system.
From 3 onwards, even when it is necessary for an operator to interrupt the online system, the computer side (for example, the operator console installed in the computer) can be used without changing the hardware at all.
By sending an interrupt request command QC from
It is possible to realize the same operation as if operating an interrupt activation switch.

Also, computers 2 and 3 connected to data way 1
The numbers of channels 4 and 5 are not limited to those in the above embodiments, and can be any number greater than or equal to 1 for both the computer and the channels.

〔Effect of the invention〕

As explained above, according to the present invention, an interrupt request command sent via a data way is analyzed to a channel connected to the data way, and a corresponding interrupt command is sent to the data way. By providing an interrupt processing means, the interrupt function between channels and computers can be diagnosed simply by sending an interrupt request command from the computer side that performs the interrupt function diagnosis. Since there is no need to provide a switch for interrupt testing, interrupt function diagnosis can be performed extremely easily.
The effect of simplifying the operation for that purpose can be obtained.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing a conventional example, Fig. 2 is a block diagram showing an example of a computer system to which the present invention can be applied, Fig. 3 is a block diagram showing an interrupt control means, and Fig. 4 is a block diagram showing an example of a computer system to which the present invention can be applied. , 5 and 6 are flowcharts illustrating the processing procedure of the command processing device. 1... Data way, 2, 3... Calculator, 4,
5... Channel, 6... Command processing device, 6a
... Computer number storage table, 7 ... Interrupt activation register, 8 ... External interrupt line, 9 ... OR gate, 10 ... Interrupt cause register, 11 ... Interrupt control means.

Claims (1)

[Claims] 1. In a computer system in which a computer and a channel are connected via a dataway, an interrupt control means for generating an interrupt command to the channel in response to an interrupt request command transmitted from the computer via the dataway. and sending the interrupt command to the computer when receiving the interrupt request command from the interrupt control means,
An interrupt function diagnosis method in a computer system, characterized in that an interrupt function of the channel for the computer is diagnosed in the computer.