JPH04307637A - Pseudo channel device - Google Patents

Abstract

PURPOSE:To quickly perform all processing operations of a test program by a least and necessary system constitution by setting previously the expected date at a pseudo channel part for each input/output instruction with a setting instruction end sending the answer data through the pseudo channel part in response to the input/output instruction. CONSTITUTION:A CPU 11 carries out a program set in a main storage 12 and sets a condition code at a pseudo channel part 13 for the answer to be given to an input/output instruction. Thus the part 13 receives a setting instruction and writes the setting data received by an input/output control processor 18 into a store means 21. Then a test program 16 is carried out. Under such conditions, the processor 18 analyzes the input/output instruction received by the part 13 and decides the type of the input/output instruction. Then an answer condition code is read out of the means 21 in response to the input/output instruction end then given in reply to the CPU 11.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pseudo channel device used when testing a program containing input/output instructions in a computer system.

0002

2. Description of the Related Art In computer systems, a central processing unit, a main storage device, and various types of input/output devices are often mounted on a system bus. Furthermore, programs for controlling such input/output devices become more complex as the types of input/output devices increase. As a result, testing methods for programs containing input/output instructions have become difficult.

Conventionally, the program was tested by actually connecting the input/output device to be controlled and executing the program to send input/output commands to the input/output device. FIG. 2 shows the configuration of a conventional test system. The illustrated test system includes a central processing unit (CPU) 1, a main memory 2, channels 3, 4, and 5, input/output devices 6, 7, and 8, and a bus 9. The central processing unit 1 is a processor that executes various types of processing, and the main storage device 2 includes a random access memory and the like, and is a memory that stores various programs and data. Channels 3, 4 and 5 are connected to bus 9, respectively, and are for connecting input/output devices 6, 7 and 8 to bus 9. In addition, input/output devices 6, 7, 8
show examples of magnetic disks, floppy disks, and printers, respectively.

[0004] In a computer test system having such a configuration, when the central processing unit 1 executes an input/output command of a program on the main storage device 2, each channel 3, 4
, 5, the input/output operation is activated. Channels 3, 4, and 5 that have received the command respond as a condition code in response to the activation according to the additional information of the command and the internal state of the channels 3, 4, 5 themselves or the input/output devices 6, 7, and 8. After that, channels 3, 4, and 5 control input/output operations performed between input/output devices 6, 7, and 8 and main storage device 2, and when the operation is completed, the completion status is notified to central processing unit 1 by an interrupt. do.

[0005] A program for controlling the input/output operation of the protocol as described above sends an input/output command, analyzes a condition code, waits for an interrupt if it is normal, and uses this interrupt to analyze the completion status. Perform processing such as Additionally, many programs perform different processing depending on the condition code or exit status.

[0006] When testing such a program, the test is easy because the normal status can be obtained by operating the normal input/output devices 6, 7, and 8 normally. However, in order to generate an abnormal status and test the abnormality processing section of the program, it is necessary to cause the input/output devices 6, 7, and 8 to operate abnormally, or to rewrite the normal condition code to an abnormal condition code and then restart the program from the middle. I was running it and doing things like that.

[0007]

[Problem to be Solved by the Invention] However, in the above test method, channel failures occur even during program testing due to the complicated protocols between channels 3, 4, and 5 and input/output devices 6, 7, and 8. Then, the program running the test is incorrect, or the channel 3
There was a problem in that the range of suspicion was widened to determine if the 4th and 5th sides were abnormal.

[0008] In addition, in a program, there is not only normal processing but also abnormal processing, and within the abnormal processing, there are branches into a large number of abnormality types. Therefore, in order to test all processing, it is necessary to generate an error in channels 3, 4, and 5, or if this is not possible, rewrite the status in main memory 2 and test the branch route. It required effort.

Furthermore, as a matter of course, channels 3 and 4
, 5 are not connected to the input/output devices 6, 7, and 8, the program cannot be tested.

The present invention has been made in order to solve the above-mentioned conventional problems, and provides a pseudo channel that allows all test program processing to be performed quickly and program testing to be performed with the minimum required system configuration. The purpose is to provide equipment.

[0011]

[Means for Solving the Problems] The pseudo channel device of the present invention is a pseudo channel device that replaces the functions of various input/output devices connected when performing an input/output instruction program test in a computer system. a pseudo channel section connected to a connection section of an input/output device; a response data setting means for presetting arbitrary response data to the input/output command program of the test in the pseudo channel section; and a storage for storing the response data. and response means for reading the response data and responding when the pseudo channel section receives the input/output command.

0012

In the pseudo channel device of the present invention, when an input/output instruction program test is performed in a computer system, the response data setting means sets arbitrary response data to the input/output instruction in the pseudo channel section in advance. This response data is stored in the storage means, and when the pseudo channel section receives an input/output command, the response means reads out the response data and responds. Therefore, all the processing of the test program can be quickly performed in a test environment with a small range of doubts, and the program test can be performed with the minimum necessary system configuration.

[0013]

Embodiments Hereinafter, embodiments of the present invention will be explained in detail with reference to the drawings. FIG. 3 is a block diagram showing a system configuration of a program test to which the pseudo channel device of the present invention is applied. The illustrated device includes a central processing unit (CPU) 11, a main memory 12, a pseudo channel section 13, and a bus 14. The central processing unit 11 is a processor that performs various processes, and the main storage device 12 is a memory that stores various programs and data. Further, the pseudo channel section 13 is
It replaces the functions of channels 3, 4, and 5 to which conventional input/output devices 6, 7, and 8 are connected during program testing.

FIG. 1 is a block diagram specifically showing the system shown in FIG. 3. As shown in FIG. That is, the central processing unit 11 has a response data setting means 15, and a test program 16 and a setting program 17 are stored in the main storage device 12. Further, the pseudo channel unit 13 includes an input/output control processor 18, a control storage unit 19, and a setting information storage unit 20. The response data setting means 15 includes:
This is means for executing the setting program 17 in the main storage device 12 and setting it in the pseudo channel section 13. Further, the setting program 17 is a program for setting response status data of the pseudo channel unit 13 when the test program 16 is executed. Input/output control processor (IOP) 1
8 is a processor having a response means 19, which reads and operates a microprogram stored in a control memory (CM) 20, and performs processing such as reading/writing of the storage means 21. Further, the control storage unit 20 includes a read-only memory, a random access memory, and the like. Furthermore, the storage means 21 comprises a random access memory or the like;
This is a setting information storage unit that stores setting data received by the input/output control processor 18.

Next, the operation of a system equipped with such a pseudo channel device during a program test will be explained. First, the central processing unit 11 sets a condition code for a response to an input/output command in the pseudo channel unit 13. This setting method simply involves executing the setting program 17 in the main storage device 12. Further, this setting program 17 has only one instruction that sends settings to the pseudo channel section 13 together with response code data in the command format of the setting command. That is, the pseudo channel section 13 is operating by the input/output control processor 18 reading out the microprogram from the control storage section 20, and is in a state of waiting to receive an instruction. Therefore, when the pseudo channel section 13 receives the setting command, the input/output control processor 18 writes the received setting data into the storage means 21. The above operation completes the setting of the condition code.

Thereafter, the test program 16 is executed. In this case, when the pseudo channel unit 13 receives an input/output command, the input/output control processor 18 analyzes this command and determines the type of the input/output command. Thereafter, a response condition code corresponding to this command is read from the storage means 21 and sent as a response to the central processing unit 11. Therefore, when the test program 16 is executed, there is no need to actually connect input/output devices to the channel section as in the conventional case.

Next, the status at the end of the input/output operation will be explained. Regarding this status, as well as the condition code mentioned above, setting program 1
7. That is, upon receiving the setting command, the pseudo channel section 13 writes the setting data into the end status storage area of the storage means 21. Thereafter, the pseudo channel unit 13 sends an interrupt signal to the central processing unit 11 and reports the set end status to the central processing unit 11.

Furthermore, in order for the pseudo channel section 13 to separately store the condition code and termination status for each input/output instruction in the storage means 21, the setting instruction stores the setting information storage section storage address and the setting data in the pseudo channel section. 13
Send to. In the storage means 21, setting information is mapped differently for each address. FIG. 4 shows the relationship between the setting command and the storage means 21. That is, the instruction format consists of an instruction code, a setting information storage unit address, and setting data for each input/output instruction, and
The memory map consists of condition codes corresponding to each input/output command and end status data in the end status storage area.

In this way, by simply changing the setting data of the setting command to the condition code or status to be tested, it becomes possible to test the program in all conditions, including normal processing and abnormal processing.

In the above embodiment, the pseudo channel section 13
In contrast, the status at the end is set at the end of the input/output operation separately from when setting the condition code, but the setting method is not limited to this, and the status can be configured to be set at the same time as the condition code. It's okay. Further, in the above embodiment, the pseudo channel section 13
is configured with the input/output control processor 18, the setting information storage section 20, and the storage means 21, but it is not limited to this configuration. For example, using conventional channels 3, 4, and 5,
In place of the input/output devices 6, 7, and 8, a structure having the functions of the response means 19 and the storage means 21 may be added to the structure so as to have the same function as the pseudo channel section 13.

[0021]

As explained above, according to the pseudo channel device of the present invention, expected data is set in advance for each input/output command in the pseudo channel section by a setting instruction, and data input by the pseudo channel section is set in advance. Since the response data corresponding to the output command is sent out, all the processing of the test program can be easily performed in a test environment with a small scope of doubt without much effort. Furthermore, even if there is no actual channel or input/output device, a response is returned in the same way as an actual channel, so program testing can be performed with the minimum necessary system configuration.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a pseudo channel device of the present invention.

FIG. 2 is a block diagram showing a conventional computer system program testing system.

FIG. 3 is a block diagram showing the configuration of a program testing system to which the pseudo channel device of the present invention is applied.

FIG. 4 is an explanatory diagram showing a response data storage state of the pseudo channel device of the present invention.

[Explanation of symbols]

13 Pseudo channel section 15 Response data setting means 16 Test program 17 Setting program 19 Response means 21 Storage means

Claims (1)

[Claims] 1. In a computer system, when performing an input/output command program test, a pseudo channel device that replaces the functions of various input/output devices connected, the pseudo channel device being connected to a connection part of the input/output device. Department and
response data setting means for presetting arbitrary response data to the input/output command program for the test in the pseudo channel section; storage means for storing the response data; and response means for reading the response data and responding.