JPH0553334B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a data transmission method comprising a transmission path for transmitting information and a plurality of data transmission devices connected to the transmission path for exchanging the information. This invention relates to the loading of software, and particularly to the procedure when accessing a data transmission device on which firmware is not loaded.

[Conventional technology]

Conventionally, in this type of data transmission system, when a certain transmission device accesses a data transmission device that is not loaded with the required firmware, the data transmission device to which the access is sent may malfunction or the access may be interrupted. It was ignored without any report being sent to the data transmission device of the sender.

[Problem that the invention seeks to solve]

With the conventional method described above, the data transmission device at the destination of the access may malfunction because the required firmware is not loaded, or the data transmission device at the destination of the access may ignore it without any report. In addition, since the data transmission device that is the source of the access is ignored without any report, the data transmission device that is the source of the access can only be determined as a non-response (detection due to timeout). , it appears to be a kind of hardware failure.
Another drawback is that it takes time to find the cause.

[Means for solving problems]

The present invention aims to eliminate the above-mentioned drawbacks.According to the present invention, in a transmission system having a transmission path for transmitting information and a plurality of data transmission devices connected to this transmission path for sending and receiving the information, Each of the plurality of data transmission devices is loaded with firmware or software required as a data transmission device when accessed by another one of the plurality of data transmission devices to exchange the information. If not, in response to the access, the other one of the plurality of data transmission devices is notified for each type of firmware or software that the firmware or software is not loaded. A data transmission method is obtained, which is characterized in that it includes means for notifying the user.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 2 is a diagram showing an example of a data transmission method to which the present invention is applied. In FIG. 2, 1 to 4 are data transmission devices, and 11 to 14 are loop-shaped transmission lines between the data transmission devices 1 to 4. The data transmission system is comprised of a plurality of data transmission devices 1-4 and loop-shaped transmission lines 11-14.

FIG. 1 is a block diagram showing one embodiment of the present invention.

In FIG. 1, the same reference numerals as in FIG. 2 indicate corresponding parts. The data transmission device 1 includes a transmission path control circuit 21, a processor 22 that controls the transmission path control circuit 21 and sends and receives various information (controls firmware), a ROM unit 27 that stores the firmware, and a ROM. an address line 81 indicating an address for accessing the section 27;
It has a data line 82 for reading firmware from the ROM section 27. Furthermore, data transmission device 1
has a data bus 51, a signal line group 52 for transmitting control signals for controlling the transmission line control circuit 21, and an interrupt line 53 for transmitting interrupt signals to the processor 22. The data transmission device 1 also includes a firmware storage section (i.e., a read/write control section) into which firmware necessary for the data transmission device is written.
23, a signal line group 61 for control signals and address signals for accessing the firmware storage section 23, a data bus 71 connecting the firmware storage section 23 and the processor 22, state information of the firmware of the data transmission device itself; It has a control storage section 24 for storing therein, and a signal line group 62 for control signals and address signals for accessing the control storage section 24. In addition, the data transmission device 1 includes a timer 25 for time monitoring, a control line group 54 for controlling the timer 25, an interrupt line 55 indicating an interrupt from the timer 25 to the processor 22, and other lines other than the loop-shaped transmission line. I/O port 2 for controlling the device
6. Control line group 56 for accessing the I/O port 26, from the I/O port 26 to the processor 22
It consists of an interrupt line 57 that indicates an interrupt to the I/O port 26, and an interface line 15 that indicates an interface between the I/O port 26 and other devices.

Note that each of the data transmission devices 12, 13, and 14 also has substantially the same circuit configuration as the data transmission device 1 of FIG.

FIG. 3 is a block diagram showing an example of a configuration in which a portion related to the transmission line control circuit 21 in the embodiment of FIG. 1 is extracted.

In FIG. 3, the same reference numerals as in FIGS. 1 and 2 indicate corresponding parts. Transmission line control circuit 21
is a frame detection circuit 3 that detects frames.
1. A frame receiving circuit 32 that receives frames based on a frame reception instruction signal 41 generated from a frame detection circuit 31 and an FCSOK signal 42 that reports the validity of frame reception; a frame transmitting circuit 33 that transmits frames; The reception circuit 32 includes a data line 43 for passing frames unless the frame is addressed to itself.

FIG. 4 is an explanatory diagram showing a general frame format applied to the present invention.

A typical frame flowing through transmission lines 11 to 14 (see Figure 2) has a flag pattern F indicating "01111110" and a destination address indicating the destination address.
DA, source address indicating the address of the source
It consists of SA, control information C, data information I, and a check bit FCS that performs a cyclic redundancy check using a frame check sequence. Note that the data information I may be omitted as part of the frame structure.

FIG. 5 shows the format of the firmware status information written in the control storage section 24 of FIG.
FIG.

Q, R, S and T indicate the type of firmware, and when P=0 and at least one of Q, R, S and T has a value of 1, it is necessary to load the firmware, Q at P=1,
When at least one of R, S, and T has a value of 1, it indicates that the firmware is stored in the firmware storage section 23 of FIG. 1.

Next, the operation of the embodiment shown in Fig. 1 is explained in Figs. 2 and 3.
This will be explained with reference to FIGS. 4 and 5.

Suppose now that data transmission device 1 goes to check the status of data transmission devices 2 to 4 at regular time intervals.

In the data transmission device 1, the processor 22 connects the ROM 2 through an address line 81 and a data line 82.
I am running the basic firmware stored in 7. Initially, the processor 22 sets m (m is an arbitrary value) to the timer 25 through the control line group 54 and the data bus 51 and starts the timer 25.
After "m×n" (n is an arbitrary value in the counting cycle) time, an interrupt occurs to the processor 22 through the interrupt line 55. This interrupt causes the processor 22 to write a frame into the transmission buffer in the transmission circuit 33 through the control line group 52 and the data bus 51 in the format shown in FIG. The control information C at this time is a command to read firmware status information from the control storage unit 24 (hereinafter referred to as read command frame A), and the destination address DA is the data transmission device 2,
The source address SA is the data transmission device 1.
Next, when the processor 22 activates transmission through the control line group 52, the frame transmission circuit 33 outputs the frame to the transmission line 11. Eventually, the frame detection circuit 31 of the data transmission device 2 detects that the frame coming in from the transmission path 11 is addressed to its own station, and the frame reception instruction 41 activates the frame reception circuit 32, and the frame reception circuit 32 starts receiving the frame. Write to Batshua. The frame receiving circuit 32 receives the FCSOK signal 42
When the signal is output, it is assumed that the data has entered the reception buffer normally, and an interrupt is generated to the processor 22 of the data transmission device 2 through the interrupt line 53. When the processor 22 reads the reception buffer in the frame reception circuit 32 by an interrupt, it finds that it is a read command frame A, and writes it to the transmission buffer in the frame transmission circuit 33 in the format according to FIG. The control information C at this time is a response command for reading from the control storage unit 24 (hereinafter referred to as response command frame A), the destination address DA is the address of the data transmission device 1, and the source address SA is the data transmission device Address No. 2 and data information I are firmware status information read from the control storage unit 24 by the processor 22 through the signal line group 62 and the data bus 51, and the value of P shown in FIG. 5 is 0 and the value of Q is 1. , R, S, and T indicate 0. Further, the processor 22 in the data transmission device 2 activates the frame transmission circuit 33 through the control line group 52 and sends the frame to the transmission line 12. Data transmission device 1
The response command frame A addressed to data transmission device 1
The data is written into the reception buffer in the frame reception circuit 32 of the frame reception circuit 32, and is notified to the processor 22 of the data transmission device 1 through the interrupt line 53. Therefore, the processor 22 in the data transmission device 1 is the frame receiving circuit 3.
By reading the reception buffer in the firmware storage section 23, it is found that the data transmission device 2 requests loading of the firmware Q, and the firmware Q already written in the firmware storage section 23 is transferred to the signal line 61. It is read out through the data bus 71 and written into the transmission buffer in the frame transmission circuit 33 according to the format shown in FIG. Control information C at this time
indicates the firmware load (hereinafter referred to as load command frame B), the destination address DA is the address of the data transmission device 2, the source address SA is the address of the data transmission device 1, and the data information I is the firmware Q. shows. Next, the processor 22 of the data transmission device 1 activates the frame transmission circuit 33 through the control line group 52, and
Send to 1. The load command frame B addressed to the data transmission device 2 is written to the reception buffer in the frame reception circuit 32 of the data transmission device 2, and is notified to the processor 22 of the data transmission device 2 through the interrupt line 53. Therefore, the processor 22 of the data transmission device 2 reads the reception buffer in the frame reception circuit 32, learns that the firmware Q has been transferred, and reads the reception buffer in the frame reception circuit 32.
Control line group 52, data bus 51, signal line group 6
1. Store the firmware Q through the data bus 71. Thereafter, the processor 22 of the data transmission device 2 sets the value of P in the firmware status information in the control storage section 24 from 0 to 1.

On the other hand, after the data transmission device 1 sends the load command frame B to the data transmission device 2, the data transmission device 3 and the data transmission device 4 perform the same operations as the data transmission device 2.

In the above example, the contents of the response command frame A sent to the data transmission device 1 are such that the value of P is 1, the values of Q, R, and S are 0, and the values of Q, R, and S are 0, according to the format shown in FIG.
If the value of T is 1, when the data transmission device 1 receives the frame, the processor 22 in the data transmission device 1 reads the reception buffer in the frame reception circuit 32, so that the data transmission device 2 Since the value of is 1 and the value of T is 1, it can be seen that the firmware T has already been loaded and there is no request to load new firmware, so monitoring to the next data transmission device 3 is performed without doing anything. Go to action.

As described above, when the data transmission device 1 completes a series of operations from the data transmission device 2 to the data transmission device 4, the processor 22 in the data transmission device 1 transmits the data to the timer 25 through the control line group 54 and the data bus 51.
When m (m is an arbitrary value) is set for , and the timer 25 is started, an interrupt is generated to the processor 22 through the interrupt line 55 after "m x n" (n is an arbitrary value in the counting cycle) time. . The processor 22 of the data transmission device 1 performs monitoring by transmitting the read command frame A from the data transmission device 2 to the data transmission device 4 in the same manner as in the above example in response to an interrupt from the timer 25, and loads the firmware. Load command frame B is transferred if necessary. In this way, the data transmission device 1 monitors each data transmission device at regular intervals.

Next, an explanation will be given of the operation when access is made from another data transmission device when the required firmware has not yet been loaded into the data transmission device.

Data transmission device 4 is I/O of data transmission device 2
The data is transferred to the fourth port 26 to access the device connected through the interface 15.
When the data is transmitted according to the format shown in the figure, it is stored in the reception buffer in the frame reception circuit 32 of the data transmission device 2, and sent to the interrupt line 53 in the processor 22.
Generates an interrupt according to. Then, the processor 22 of the data transmission device 2 reads the contents of the reception buffer in the frame reception circuit 32 and performs I/O processing.
Knowing that data is to be sent to the device connected to the port 26, I went to read the firmware status information written in the control unit 24 and found that the value of P in the firmware status information was 0 and the value of Q was 0. Knowing that the firmware Q necessary for accessing the device connected to the I/O port 26 has not been loaded since the value is 1, the frame transmitting circuit 33 executes the process according to the firmware shown in FIG. Write to the sending buffer. Control information C at this time indicates that the necessary firmware has not been loaded (hereinafter referred to as command frame D).
The destination address DA is the address of the data transmission device 4, the source address SA is the address of the data transmission device 2, and the data information I is firmware status information (content read from the control storage unit 24 by the processor 22 in the data transmission device 2). ) is shown. Next, the processor 22 in the data transmission device 2 activates the frame sending circuit 33 through the control line group 52, and
Send to 2. The command frame D addressed to the data transmission device 4 is written to the reception buffer in the frame reception circuit 32 of the data transmission device 4, and is notified to the processor 22 of the data transmission device 4 through the interrupt line 53. Therefore, the processor 22 of the data transmission device 4
By reading the reception buffer in the frame reception circuit 32, the controller learns that the firmware Q has not been loaded into the data transmission device 2 yet. Therefore, the data transmission device 4 is connected to the I/O of the data transmission device 2.
The reason why the device connected to the O port 26 cannot be accessed can be found, and error handling can be handled efficiently and quickly. As an example of error handling in this case, the data transmission device 1 can notify the data transmission device 2 to load the firmware Q. In this case, the processor 22 of the data transmission device 4 writes into the transmission buffer in the frame transmission circuit 33 according to the format shown in FIG. The control information C at this time indicates a request to load firmware to a certain device according to the data information I (hereinafter referred to as command frame E), and the destination address DA is the address of the data transmission device 1.
The source address SA is the address of the data transmission device 4, and the data information I indicates the transmission status information in the format shown in FIG. In the format shown in Figure 6, the destination address is the address of the destination to load the firmware, and the firmware status information is the 5th address.
This is the format of the figure. Next, data transmission device 4
The processor 22 in the frame activates the frame sending circuit 33 through the control line group 52 and sends the frame to the transmission line 14. The command frame E addressed to the data transmission device 1 is written to the reception buffer in the frame reception circuit 32 of the data transmission device 1, and is notified to the processor 22 of the data transmission device 1 through the interrupt line 53. Therefore, by reading the reception buffer in the frame receiving circuit 32, the processor 22 of the data transmission device 1 knows that the firmware Q has not been loaded into the data transmission device 2 yet. Next, the processor 22 of the data transmission device 1 sends the load command frame B to the data transmission device 2. The method of generating and processing this load command frame B is exactly the same as the method of generating and processing the load command frame B when the data transmission device 1 monitors the data transmission device 2 shown in the previous example.

In the above explanation, the explanation was given under the condition that the firmware to be sent to another data transmission apparatus is already stored in the firmware storage unit 23 of the data transmission apparatus 1. To explain briefly using a diagram, when the data transmission device 1 is started up, the processor 22 of the data transmission device 1 accesses the I/O port 26 through the control line group 56 and the data bus 51, and then accesses the I/O port 26 through the interface 15. The firmware Q, R, S, and T are read by accessing the floppy disk device 5, and the firmware Q, R, S, and T are written into the firmware storage section 23 through the signal line group 61 and the data bus 71. It will be done. At this time, the values of P, Q, R, S, and T of the firmware status information are set to I and written into the control storage section 24. Therefore, when load command frame B is sent to each data transmission device, firmware Q,
This means that R, S and T have been written in the firmware storage section 23.

As described above, when transmitting the load command frame B from the data transmission device 1, the firmware was read from the firmware storage section 23, but by directly accessing the floppy disk device 5, the load command frame B may be generated.

In addition, a DIP switch (which can be manually set to a value of 0 or 1 for each bit) is provided inside the processor 22 to initialize the firmware status information written to the control storage unit 24 of each data transmission device.
This can be easily realized by reading the contents of the DIP switch only when the processor 22 is started up and writing it into the control storage section 24 as firmware status information.

If the data transmission device 1 as explained above is configured to monitor the information every predetermined time unit, it will not affect the order in which the transmission lines are started up, even if the data transmission device 1 is started up last. It is possible to reliably load the necessary firmware to each data transmission device.

In the above example, the case was explained using a data transmission device via a loop-shaped transmission path.
The present invention is not limited to this, but for example, as shown in FIG.
As shown in FIG.
A method for data transmission device 111 to transmit information to data transmission device 112 via transmission path 611;
As shown in FIG.
(The processing of the data transmission device in the middle of command transfer is the same as the above example except for the processing of converting the command), but all of these are included in the present invention. .

Note that 113 and 114 in FIG. 9 above each indicate a data transmission device, and 121 to 12 in FIG.
8, 713, and 722-723 indicate data transmission devices, respectively.

Furthermore, in the above example, when firmware was loaded from another data transmission device, the value of P in the firmware status information was changed from 0 to 1, but as in the configuration example shown in FIG. When the firmware required for data transmission device 1 is loaded, the value of firmware status information P is set to 0.
It goes without saying that even if it is reduced from 1 to 1, it is within the scope of the claims of the present invention.

Further, in the above description, loading of firmware has been described, but it goes without saying that loading of software is also included within the scope of the claims of the present invention, just by changing the terminology.

〔Effect of the invention〕

As explained above, the present invention provides status information that allows it to be determined whether or not the necessary firmware (or software) is loaded on each data transmission device. When accessing a data transmission device on which the required firmware (or software) has not been loaded, it is possible to detect the reason why the data transmission device that is the source of the access cannot be accessed by notifying that the required firmware (or software) has not been loaded yet. This has the effect of making it possible to handle errors efficiently and quickly.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention;
FIG. 2 is a block diagram showing an example of a data transmission system to which the present invention is applied, FIG. 3 is a block diagram showing an example of a configuration in which the portion related to the transmission line control circuit of FIG. 1 is extracted, and FIG. FIG. 5 is an explanatory diagram showing the format of firmware status information; FIG. 6 is an explanatory diagram showing the format of transmission status information; FIG. 7 is an explanatory diagram showing the format of the transmission status information. FIG. 1 is a block diagram including devices connected to the I/O port, and FIGS. 8, 9, and 10 are block diagrams showing other examples of data transmission systems to which the present invention is applied. 1-5, 101, 102, 111-114, 1
21-127, 711-713, 721-723
...Data transmission device, 11-13,511,61
1... Transmission line, 21... Transmission line control circuit, 22...
...Processor, 23... Firmware storage section,
24... Control storage unit, 25... Timer, 26...
I/O port section, 27...ROM section, 31...Frame detection circuit, 32...Frame reception circuit, 3
3... Frame transmission circuit, 41-43... Signal line, 53, 55, 57... Interrupt line, 61, 61...
...Control and address lines, 51, 71...Data bus, 82...Data lines, 52, 54, 56...
Control line group, 81...address line, 15...interface.

Claims (1)

[Claims] 1. In a transmission method having a transmission path for transmitting information and a plurality of data transmission devices connected to this transmission path for sending and receiving the information, each of the plurality of data transmission devices is connected to the plurality of data transmission devices. If the firmware or software necessary for the data transmission device is not loaded when the other one of the plurality of data transmission devices is accessed for sending and receiving the information, the other one of the plurality of data transmission devices One of the data transmission methods is characterized in that the data transmission method includes means for notifying each type of firmware or software that the firmware or software is not loaded as a response to the access. .