JPH0546461A - Memory card device - Google Patents

Abstract

PURPOSE:To rewrite stored contents of an EEPROM with one page as the unit even in the case that they can be erased only with one block as the unit. CONSTITUTION:The memory card device provided with an EEPROM 17 where packet data and packet header data with one page as the unit as management information of this packet data are written with one block as the unit and data can be written with one page as the unit and can be erased with one block as the unit is provided with a control means 13 which retrieves an idle storage area, where packet header data and packet data managing this packet header data can be written, at the time of request of rewrite of packet header data and writes new packet header data in this idle storage area with one page as the unit and successively copies packet data with one page as the unit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory card device using an EEPROM (Electrically Erasable and Programmable Read Only Memory) as a semiconductor memory, and more particularly to a digital image of an optical image of a photographed subject. The present invention relates to a device suitable for use in an electronic still camera device or the like that converts data and records it in a semiconductor memory.

[0002]

2. Description of the Related Art As is well known, an electronic still which converts an optical image of a photographed object into an electric image signal by using a solid-state image pickup device, converts the image signal into digital image data, and records the digital image data in a semiconductor memory. Camera devices have been developed.
In this type of electronic still camera device, a memory card in which a semiconductor memory is built in a card-shaped case is configured to be detachable from the camera body so that it can be used as a film in a normal camera. Equivalent handling can be done.

The memory card of the electronic still camera device is currently being standardized, and the built-in semiconductor memory is required to have a large storage capacity for recording a plurality of digital image data. For example, SR
AM (Static Random Access Memory),
A mask ROM and an EEPROM capable of electrically writing and erasing data have been considered, and a memory card using an SRAM has already been commercialized.

By the way, the memory card using the SRAM has an advantage that it can correspond to a data structure of any format and has a high data writing speed and a high data reading speed, but holds the written data. Since it is necessary to store a backup battery in the memory card for this purpose, the storage capacity is reduced by the amount of the battery storage space and SR
There is a problem that the cost of AM itself is high and causes an economic disadvantage.

Therefore, in order to solve the problems of the SRAM, the EEPROM is now attracting attention as a semiconductor memory used for a memory card. This EEP
The ROM has been attracting attention as a recording medium that replaces the magnetic disk, and it does not require a backup battery for holding data and can reduce the cost of the chip itself, which is a unique advantage that SRAM does not have. Therefore, development for use as a memory card has been actively carried out.

Here, FIG. 3 shows the lengths of a memory card using an SRAM (SRAM card) and a memory card using an EEPROM (EEPROM card) in comparison. First, regarding the backup battery and the cost of the comparison items 1 and 2, the SRAM card needs the backup battery and the cost is high as described above, while the EEPROM card does not need the backup battery and the cost is high. Also has the advantage that it can be lowered.

Regarding the write speed and read speed of comparison items 3 and 4, random access common to SRAM and EEPROM is performed for writing and reading data to or from a byte or bit arbitrarily designated by an address. A mode and a page mode peculiar to the EEPROM, in which data is written and read collectively in page units by designating a page made up of a plurality of consecutive bytes (several hundred bytes), can be considered.

In the random access mode,
The SRAM has a high writing speed and a high reading speed, and the EEPROM has a low writing speed and a low reading speed. In addition, EEPROM
In the page mode, since a large amount of data for one page is written and read all at once, the data write speed and the data read speed are faster than in the random access mode.

Further, the erase (erase) mode of the comparison item 5 is a mode peculiar to the EEPROM, which is the SRAM.
Is a mode that does not exist in. That is, the EEPROM
When writing new data to the area where data has already been written, new data cannot be written unless the previously written data is erased. Therefore, when writing data, this erase mode Is to be executed. The erase mode includes a chip erase for collectively erasing all the stored contents of the EEPROM and a block erase for erasing the stored contents in units of blocks (several Kbytes) made up of a plurality of pages.

Further, the write verify of the comparison item 6 is also a mode peculiar to the EEPROM and is not present in the SRAM. That is, the EEPROM is
When writing data, complete writing is not normally performed in one writing operation. Therefore, EEP
EEP every time one write operation is performed to ROM
It is necessary to read the written contents of the ROM and check whether or not they are correctly written, and this is the write verify.

Specifically, the data to be written in the EEPROM is recorded in the buffer memory, the data is transferred from the buffer memory to the EEPROM and written, and then,
The contents written in the EEPROM are read out and compared with the contents in the buffer memory to determine whether they match. Then, when it is determined as a result of the write verify that there is a mismatch (error), the operation of writing the contents of the buffer memory to the EEPROM again is repeated.

As is clear from the above comparison results, EE
The PROM does not require a backup battery, is low in cost, and is capable of writing and reading data in page units. It has unique advantages not found in SRAM, but on the other hand, it does not store data in the random access mode. There is also a disadvantage that the writing speed and the reading speed are slow and that a mode such as an erase mode and a write verify which is not in the SRAM is required.

Therefore, as the semiconductor memory used for the memory card, the EE is used instead of the currently used SRAM.
Considering the use of PROM, the problems of data write speed and read speed, the problem of needing erase mode and write verify, etc. can be solved, and it can be handled in the same manner as a memory card with built-in SRAM. As described above, that is, it is important to make various improvements in detail so that it can be used in an SRAM card-like manner.

In this case, the EEP is particularly problematic.
When data is rewritten to the ROM, it is necessary to erase it.
The minimum unit of OM data writing is a page of several hundred bytes, and the minimum unit of erase is a number K that is larger than the page.
That is, it is a block unit of bytes. That is, digital image (including audio) data is mainly recorded in the EEPROM used for the memory card of the electronic still camera device, and such data is called packet data and is shown in FIG. Like E
It is written in block units in the storage area of the EPROM.

Then, one page of packet header data which is management information (date, title, etc.) peculiar to the packet data is added to each packet data. For this reason, for example, when changing the title of a packet, the packet header data is once erased and rewritten to new data. However, since the minimum unit of erase is a block, when trying to erase the packet header data Since not only the packet header data but also the required packet data is erased, there is a problem that only the packet header data cannot be rewritten.

[0016]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
A conventional memory card having a built-in ROM has a problem that it is impossible to rewrite data in page units smaller than a block because the minimum erase unit is a block.

Therefore, the present invention has been made in consideration of the above circumstances, and provides an extremely good memory card device capable of rewriting the stored contents of the EEPROM in page units even if only erase in block units can be performed. The purpose is to do.

[0018]

In a memory card device according to the present invention, packet data and packet header data in page units, which is management information of the packet data, are written in block units, and data is written in page units. And EEP that can erase data in block units
It is intended for those with a ROM. Then, in a state in which the rewriting of the packet header data is requested, a free storage area in which the packet header data and the packet data managed by the packet header data can be written is searched for, and new packet header data is written in this free storage area. Is written in page units, and a control means for sequentially writing packet data in page units is provided.

[0019]

According to the above-mentioned structure, when the rewriting of the packet header data is requested, a free area is searched from the storage area for rewriting the packet header data of the EEPROM, and a new packet is written in this free area. Since the header data is written in page units and the original packet data is transferred in page units following the previously written new packet header data, even if the EEPROM can only erase in block units, It is possible to rewrite the packet header data.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the present invention is applied to an electronic still camera device will be described in detail below with reference to the drawings. In FIG. 1, 11 is a memory card main body, which is connected to an electronic still camera main body (not shown) via a connector 12 installed at one end thereof. The connector 12 is provided with digital data DA to be written in the memory card body 11 from the electronic still camera body side and address data AD indicating the writing location.
And are supplied. The digital data DA and the address data AD are supplied to the data input / output control circuit 13 via the bus lines D0 to D7.

Further, from the electronic still camera main body, to the connector 12, a card enable signal CE which becomes H (high) level when the memory card main body 11 is selected.
And an address / data switching signal A / D which becomes L (low) level when the data supplied to the bus lines D0 to D7 is address data AD and becomes H level when the data is digital data DA, and a data write request to an EEPROM described later. The read / write switching signal R / W which becomes L level at the time of and becomes H level at the time of data read request, and the bus clock BCK synchronized with the address data AD
It is being supplied.

These card enable signal CE, address / data switching signal A / D, read / write switching signal R
/ W and the bus clock BCK are also supplied to the data input / output control circuit 13. Further, from the electronic still camera body, a command for requesting data erase to the EEPROM is also supplied to the data input / output control circuit 13 via the connector 12. Further, from the data input / output control circuit 13, when the input of the digital data DA from the electronic still camera main body is permitted, it becomes H level,
Ready / busy switching signal R which becomes L level when input is rejected
DY / BSY is generated.

Here, a schematic operation will be described. The digital data DA supplied to the connector 12 is described.
Under the control of the data input / output control circuit 13, is temporarily stored in the buffer memory 14 and recorded. At this time, the fetch timing of the digital data DA of the buffer memory 14 is controlled by the address data output from the address generation circuit 15. The address generation circuit 15 also counts the clock CK selected by the selector 16 to generate address data for the buffer memory 14. The selector 16 includes the bus clock BCK and the data input / output control circuit 1
The clock YCK output from the circuit 3 is supplied.

Then, when the digital data DA of the buffer memory 14 is fetched, the selector 16 selects the bus clock BCK by the select signal SEL output from the data input / output control circuit 13 and outputs it to the address generation circuit 15 as the clock CK. is doing. Therefore, the digital data DA sent from the electronic still camera body to the connector 12 is stored in the buffer memory 1 according to the address data generated based on the bus clock BCK.
4 will be written.

After that, when the writing of the digital data DA into the buffer memory 14 is completed, the data input / output control circuit 13 controls the select signal SEL so that the clock YCK generated by itself is led to the address generation circuit 15. The selector 16 is switched as follows. Therefore, the buffer memory 1 is generated by the address data generated by the address generation circuit 15 based on the clock YCK.
The digital data DA is read from 4.

At this time, the data input / output control circuit 13 is
Chip enable signal CEN for EEPROM 17
Also, the write enable signal WE is output, the address data AD is output, and the digital data DA read from the buffer memory 14 is controlled to be written in the EEPROM 17 page by page. And EEP
With the digital data DA written in the ROM 17, the data input / output control circuit 13 outputs to the EEPROM 17 the out enable data OE and the address data AD that previously specifies the writing of data, and E
The write verify is executed to read the written digital data DA from the EPROM 17 and determine whether the digital data DA matches the digital data DA recorded in the buffer memory 14.

If the digital data DA read from the EEPROM 17 and the digital data DA recorded in the buffer memory 14 do not match, the data input / output control circuit 13 again reads from the buffer memory 14 E.
The digital data DA is transferred to and written in the EPROM 17, and this operation is repeated until the digital data DA read from the EEPROM 17 and the digital data DA recorded in the buffer memory 14 completely match. DA EEPROM 17
Is written to.

In addition, from the electronic still camera body to the EEPR
When an instruction to erase the data recorded in the OM 17 is generated, the data input / output control circuit 13 drives the erasing circuit 18 based on the erasing instruction. This erase circuit 18
On the basis of the control of the data input / output control circuit 13,
The EEPROM 17 is electrically chip-erased or block-erased by outputting an erasing signal to the address line and the data line of the PROM 17.

Next, the operation of reading the digital data DA from the EEPROM 17 to the outside of the memory card body 11 will be described. First, a read request and a recorded address of data to be read are specified from the electronic still camera body side via the connector 12. Then, the data input / output control circuit 13 sends the chip enable signal CEN and the out enable data OE to the EEPROM 17.
Also, the address data AD is output, the digital data DA is read from the EEPROM 17 in page units, and the selector 16 is switched so that the clock YCK generated by itself is derived to the address generation circuit 15 and written in the buffer memory 13.

Thereafter, the data input / output control circuit 13 switches the selector 16 so that the bus clock BCK supplied from the electronic still camera main body side via the connector 12 is led to the address generation circuit 15, and the bus clock BCK. Based on the address data generated by the address generation circuit 15, the data is read from the buffer memory 14 and led out to the electronic still camera body through the connector 12, and the digital data DA is read there.

Therefore, according to the above configuration,
Since the data transfer between the electronic still camera body and the memory card body 11 is always performed via the buffer memory 14, the data writing speed and the data reading speed are improved so that the data can be used in an SRAM card-like manner. Become. Further, since the write verify peculiar to the EEPROM 17 is also carried out by using the buffer memory 14 provided inside the memory card body 11, the memory card body 11 should be used just like an SRAM card. You can

Here, as shown in FIG.
17 is a plurality (two in the illustrated case) of chips 17a, 1
7b, and a storage area for rewriting packet header data is set in the EEPROM chip 17b. Then, when it is requested to rewrite the packet header data of a predetermined packet of the EEPROM chip 17a, the data input / output control circuit 13 first causes the data
A free area for one block is searched from the storage area for rewriting packet header data of the EPROM chip 17b.

Then, the data input / output control circuit 13 outputs E
In the empty area searched by the EPROM chip 17b, new packet header data output from the electronic still camera main body is written in page units, and after the writing of the new packet header data is completed, the packet data of the EEPROM chip 17a is written in the EEPROM chip 17b. The new packet header data written previously is transferred in page units. After that, the EEPROM chip 17
The transferred packet of a is the data input / output control circuit 1
The block is erased under the control of No. 3 and stored as a new storage area for rewriting packet header data.

Therefore, according to the configuration of the above-described embodiment, in the state where the rewriting of the packet header data is requested, the empty area for one block is emptied from the packet header data rewriting storage area of the EEPROM chip 17b. After retrieving and writing new packet header data in this empty area in page units, the packet data of the EEPROM chip 17a is transferred in page units subsequent to the new packet header data previously written in the EEPROM chip 17b. Therefore, even if the EEPROM 17 can only erase in block units, the packet header data in page units can be rewritten. The present invention is not limited to the above-described embodiments, but can be variously modified and implemented without departing from the scope of the invention.

[0035]

As described in detail above, according to the present invention,
Even if you can only erase blocks, EEPRO
It is possible to provide a very good memory card device capable of rewriting the stored contents of M in page units.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a memory card device according to the present invention.

FIG. 2 is a diagram shown for explaining the operation of the embodiment.

FIG. 3 is a diagram showing the lengths of an SRAM and an EEPROM in comparison with each other.

FIG. 4 is a diagram for explaining a recording format on an EEPROM.

[Explanation of symbols]

11 ... Memory card main body, 12 ... Connector, 13 ... Data input / output control circuit, 14 ... Buffer memory, 15 ... Address generation circuit, 16 ... Selector, 17 ... EEPROM,
18 ... Erase circuit.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location G11C 7/00 315 7323-5L 16/06

Claims (1)

[Claims] 1. An EE in which packet data and packet header data in page units, which is management information of the packet data, are written in block units, and data can be written in page units and erased in block units.
In a memory card device equipped with a PROM, a search is made for a free storage area in which the packet header data and the packet data managed by the packet header data can be written while the rewriting of the packet header data is requested. A memory card device comprising: control means for writing new packet header data in page units into a storage area and sequentially transferring the packet data in page units.