JP3122222B2 - Memory card device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory card device using an EEPROM (Electrically Eraseable and Programmable Read Only Memory) as a semiconductor memory, and more particularly, to a method for converting an optical image of a photographed object into a digital image. The present invention relates to a device suitable for use in an electronic still camera device that converts data into data and records the data in a semiconductor memory.

[0002]

2. Description of the Related Art As is well known, an electronic still which converts an optical image of a photographed subject into an electric image signal using a solid-state image sensor, converts the image signal into digital image data, and records the digital image data in a semiconductor memory. Camera devices have been developed.
In this type of electronic still camera device, a memory card in which a semiconductor memory is built in a card-like case is configured to be detachable from a camera body, so that a film in an ordinary camera can be obtained. Equivalent handling is provided.

[0003] Here, the memory card of the electronic still camera device is currently being standardized, and the built-in semiconductor memory is required to have a large storage capacity for recording a plurality of digital image data. For example, SR
AM (static random access memory),
Mask ROMs and electrically erasable EEPROMs and the like have been considered, and memory cards using SRAMs have already been commercialized.

[0004] A memory card using an SRAM can cope with a data structure of any format and has an advantage that data writing speed and reading speed are fast, but it holds written data. Backup battery must be stored in the memory card, so that the storage capacity is reduced by the amount of the battery storage space and the SR
There is a problem that the cost of the AM itself is high and causes economic disadvantage.

Therefore, at present, in order to solve the problems of the SRAM, an EEPROM has been attracting attention as a semiconductor memory used for a memory card. This EEP
ROMs are attracting attention as a recording medium that replaces magnetic disks, and they do not require a backup battery for data storage and can reduce the cost of the chip itself. Therefore, development for use as a memory card has been actively conducted.

FIG. 6 shows a comparison between a memory card using an SRAM (SRAM card) and a memory card using an EEPROM (EEPROM card). First, as for the backup batteries and costs of the comparison items 1 and 2, as described above, the SRAM card has a problem that the backup battery is necessary and the cost is high, whereas the EEPROM card does not require the backup battery and the cost is high. Also has the advantage that it can be reduced.

Next, with regard to the write speed and read speed of the comparison items 3 and 4, data is written and read to and from a byte or a bit arbitrarily designated by an address. By designating a mode and a page composed of a plurality of consecutive bytes (several hundred bytes), it is possible to divide the mode into a page mode unique to an EEPROM in which data is written and read in a page unit at a time.

In the random access mode, the SRAM has a high write speed and a high read speed, and the EEPROM has a low write speed and a low read speed. Also, EEPRO
M writes and reads a large amount of data for one page at a time in the page mode, so that the data write speed and the data read speed are faster than in the random access mode.

Further, the erase (erase) mode of the comparison item 5 is a mode peculiar to the EEPROM.
This mode does not exist in. That is, the EEPROM
When writing new data to an area in which data has already been written, new data cannot be written unless the previously written data is erased once. Is to be executed.

The write verify of the comparison item 6 is also a mode peculiar to the EEPROM, and is a mode not existing in the SRAM. That is, the EEPROM is
In the case of performing data write, usually, complete write is not performed by one write operation. For this reason, EEP
Each time a write operation is performed on the ROM, EEP
It is necessary to read out the written contents of the ROM and check whether or not the data has been correctly written. This is the write verify.

Specifically, data to be written to the EEPROM is recorded in a buffer memory, and after the data is transferred from the buffer memory to the EEPROM and written,
The written contents of the EEPROM are read and compared with the contents of the buffer memory to determine whether they match. If it is determined that there is a mismatch (error) as a result of the write verification, the operation of writing the contents of the buffer memory to the EEPROM again is repeated.

As is apparent from the above comparison results, EE
PROMs have unique advantages not found in SRAMs, such as the need for a backup battery, low cost, and the ability to write and read data in page units. There are disadvantages that the writing speed and the reading speed are slow, and that a mode not provided in the SRAM such as an erase mode or a write verify is required.

Therefore, as a semiconductor memory used for a memory card, EE is used instead of the SRAM currently used.
Considering the use of a PROM, the problem of data write speed and data read speed, and the problem of requiring an erase mode and write verify, etc. can be solved, and a handling equivalent to a memory card having a built-in SRAM can be performed. Thus, it is important to make various improvements in detail so that it can be used for SRAM card-like.

In this case, a particular problem is the EEP.
In the ROM, when the number of times of data rewriting exceeds a certain number, the memory cells are rapidly deteriorated, and data writing failure is likely to occur. That is, since the EEPROM is developed for recording program data and is intended to be able to rewrite data when a program is upgraded, it is possible to cope with data rewriting many times. Because it is not designed.

However, as described above, for example, when an EEPROM is used as a semiconductor memory for a memory card used in an electronic still camera device or the like instead of an SRAM which has been conventionally used, it is natural. Since the EEPROM is used in such a manner that data is frequently rewritten, it is inevitable that the rate of occurrence of write failures will increase dramatically. Has become.

Conventionally, regarding this write failure, it is determined that a write failure occurs when the above-described write verify process is repeated a predetermined number of times and the data is not correctly written. However, conventionally, EEPRO
Even if a write failure occurs in a part of M, the EEP
Since the entire memory card having a built-in ROM is handled as a defective product, there is a problem in that the efficiency is extremely low and the operation is economically disadvantageous.

[0017]

As described above, the EEP
A conventional memory card having a built-in ROM has a problem that it is extremely inefficient and economically disadvantageous because the entire memory card having a built-in EEPROM in which a writing failure has occurred partially is treated as a defective product. I have.

Therefore, the present invention has been made in view of the above circumstances, and an EEPR in which a writing failure has occurred partially.
The OM can be used continuously, and the storage area of the EEPROM can be effectively used.
It is an object of the present invention to provide a very good memory card device which is economically advantageous and can be put to practical use.

[0019]

SUMMARY OF THE INVENTION A memory card device according to the present invention includes an EEPROM having a data area composed of a plurality of blocks each having a predetermined capacity, and a state in which writing failure is detected in a block in the data area of the EEPROM. A first rescue means for retrieving a specified number of empty blocks from the data area, allocating them to a first defective relief area, and writing data to be written in the defective block to empty blocks in the first defective relief area; In a state where the first defective remedy area is full by the first rescue means and a write error is detected in a block of the data area, a specified number of empty blocks are searched from the data area to obtain a second defective area. Second rescue means for allocating data to the defective rescue area and writing data to be written to the defective block to an empty block in the second defective rescue area. Those were Unishi.

[0020]

According to the above arrangement, when a write failure occurs in a part of the data area by the first rescue means, a specified number of empty blocks are searched from the data area and the first rescue means is used. Since the data is allocated to the defective relief area and the data to be written to the defective block is written to the empty block of the first defective relief area, it is possible to continue to use even an EEPROM in which a writing failure has occurred partially.
It is economically advantageous and suitable for practical use. When the first defective remedy area is full, the second rescue means searches a new specified number of free blocks from the data area and allocates them to the second defective remedy area. Since the data to be written to the block is written to an empty block in the second defect relief area, the storage area of the EEPROM can be effectively used.

[0021]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the present invention is applied to an electronic still camera device will be described below in detail with reference to the drawings. In FIG. 1, reference numeral 11 denotes a memory card main body, which is connected to an electronic still camera main body (not shown) via a connector 12 provided at one end thereof. The connector 12 is supplied with data to be written to the memory card main body 11, address data indicating a writing location, and the like from the electronic still camera main body side.

The data supplied to the connector 12 is taken into the data input / output control circuit 14 via the bus line 13. This data input / output control circuit 14
Has a built-in buffer memory (not shown) capable of high-speed writing and reading of data, and temporarily records the fetched data in the buffer memory. Thereafter, the data input / output control circuit 14 transmits the data recorded in the buffer memory to a plurality (4 in the illustrated case) through the bus line 15.
) At a timing corresponding to the write cycle of the EEPROM 16 and is recorded in the EEPROM 16.

In this case, the data input / output control circuit 14
Each time data is written to the EEPROM 16 in page units, for example, the data written in page units is read from the EEPROM 16 and write verification is performed to determine whether or not the data matches the data recorded in the buffer memory. Then, the data input / output control circuit 14
If the data read from the EEPROM 16 does not match the data recorded in the buffer memory,
The data is again transferred from the buffer memory to the EEPROM 16 for writing. When the data read from the EEPROM 16 completely matches the data recorded in the buffer memory while this operation is repeated a predetermined number of times, the data is written. Writing is completed.

Next, when data is read from the EEPROM 16 to the outside of the memory card main body 11, an address designating data to be read from the electronic still camera main body via the connector 12 is stored in the data input / output control circuit 1.
4 is supplied. Then, the data input / output control circuit 14
Reads data from the EEPROM 16 based on the input address and temporarily records the data in the buffer memory.
Thereafter, the data input / output control circuit 14 derives the data recorded in the buffer memory to the outside via the read connector 12, and the data is read there.

Therefore, according to the above configuration,
Since data transfer between the electronic still camera main body and the memory card main body 11 is always performed via the buffer memory, the speed of writing and reading data to and from the memory card main body 11 as viewed from the main body of the electronic still camera is improved. Can be done. Also, EEPR
Since the write verification unique to the OM 16 is also automatically processed inside the memory card main body 11 using the buffer memory, the memory card main body 11 can be used completely like an SRAM card.

Here, as shown in FIG. 2, the EEPROM 16 has a storage area consisting of addresses 0000 to XXXX, and this storage area has a plurality of storage units each having a predetermined capacity, which is the minimum unit for handling data. It is divided into blocks 1 to N (one block is usually several kbytes). All of the blocks 1 to N are data areas for recording normal data. This data area is stored in the memory card body 11
Can be directly accessed from outside, and by directly specifying the address via the connector 12,
By repeatedly writing and reading data in page units of several hundred bytes, data writing and reading can be freely performed in block units.

In the EEPROM 16, FIG.
As shown in (a), a management table of each block and two pointers S and T are provided. That is, in this management table, the left column in the figure has block numbers 1 to
N, and the right column in the figure shows the state of the block. That is, "O" indicates that the block is unused, and "Z (a numerical value other than 1 to N)" indicates that the block is in use. If it is determined that the block is defective, the data to be written to the block is written to another block to take relief, and the block number of the relief destination at that time is written. For example, if the numerical value B is written at the position corresponding to the block number A in the management table,
This means that the block A is defective in writing and the data to be written to the block A is written to the block B and is rescued.

Further, the pointer S indicates a defect remedy level, and is "0" in an initial state, that is, a state in which no write defect is relieved. The maximum value of the defect relief level is set in advance, and is set to “M” in this embodiment. The pointer T is
This is for detecting the remaining recording capacity of the memory card main body 11 from the electronic still camera main body side. In an initial state, that is, in a state where no remedy for writing failure is performed, all blocks 1 to N are data areas. N ". Writing data to each of the blocks 1 to N
It is performed as early as possible from the block with the smallest block number. However, when unnecessary data is erased or data is written thereafter, an unused block may be generated between temporarily continuous blocks in use. .

Here, when a write failure occurs in a certain block X at the time of writing data to the EEPROM 16, the data input / output control circuit 14 first looks at the contents of the pointer S and sets the failure relief level to the maximum value M. It is determined whether or not there is. This discrimination is based on the
This is performed in order to distinguish whether the problem is caused by deterioration of the memory cell due to repetition of writing, for example, due to defective soldering, defective overall chip, or the like. Further, even if the memory cell failures are accumulated, it is desirable to stop the use from the viewpoint of reliability when entering the wear failure region.

If the defect repair level has not reached the maximum value M, the data input / output control circuit 14 searches for an unused or empty block in order to raise the defect repair level by one step. One defect repair level means that P empty blocks are secured as a defect repair area. If there is no empty block for one level, the data input / output control circuit 14 stops further processing and prohibits the use of the memory card body 11. Therefore, if the user wishes to continue using the memory card main body 11, the user needs to erase unnecessary data so that an empty block for one level can be secured.

When one empty block is detected, the data input / output control circuit 14 allocates the detected empty block from the data area to the defect relief area. At the time of this assignment, in order to ensure the continuity of the addresses viewed from the electronic still camera main body side, FIG.
As shown in (b), P blocks N, N-
,..., N−P + 1 are changed from the data area to the defect relief area, and the level 1 defect relief area is secured here. At this time, the data input / output control circuit 14
Changes the content of the pointer T from the conventional "N" to "NP" in order to notify the electronic still camera body of this change in the assignment. The data input / output control circuit 1
4 increments the content of the pointer S by +1 to indicate that the defect relief level has been raised by one step.

When P defective repair blocks are secured in this way, the data input / output control circuit 14 executes actual defective relief processing. Actually, in FIG. 3B, the data to be written in the block X where the write failure has occurred is
An example is shown in which the data is rewritten by writing to the block N of the P defective rescue blocks previously secured. Then, after the defect remedy processing, the data input / output control circuit 14 returns to FIG.
The block number “N” of the rescue destination is written on the right side of the drawing corresponding to the block X in the management table shown in FIG. 3, and the numerical value “Z” indicating that it is in use is written on the right side of the drawing corresponding to the block N. , Where the bad write block X
Is completed.

Next, as described above, the EEPROM 16
When reading the data written in the electronic still camera body, first, the electronic still camera body
The remaining recording capacity of the memory card main body 11, that is, the number of blocks that can be used as a data area, is determined to be "N-
P "is detected. Therefore, the P blocks NP + 1 to N used as the relief area are hidden from the electronic still camera main body side. When the data read of X is requested, the data input / output control circuit 14 returns to FIG.
, It is detected that the data to be written in the block X is saved in the block N, and the data written in the block N is read and output to the electronic still camera body. For this reason, data can be written to and read from the memory card main body 11 without making the electronic still camera main body recognize any occurrence of writing failure in the EEPROM 16.

Here, as shown in FIG. 4A, when the blocks NP + 1 to N in the level 1 defect relief area are full, that is, all the blocks NP + 1 to N are used for the defect relief, writing to the block W in the data area is performed. When a failure occurs, the data input / output control circuit 14 sets the P blocks NP and N- P-1, ...,
The allocation of (NP) -P + 1 is changed from the data area to the defect relief area, and the level is changed to level 2 as shown in FIG.
Secure a defective relief area.

At this time, the P blocks NP, NP-1,..., (N
If the block Y in −P) −P + 1 is in use, the data input / output control circuit 14 moves the data written in the block Y to the youngest free block L + 1 in the data area. , Management table block L + 1
Is written on the right side of the figure corresponding to the block number Y, and a numerical value "O" indicating the unused state is written on the right side of the figure corresponding to the block Y. Then, the data input / output control circuit 14 controls the pointer T to notify the electronic still camera main body of the change of the assignment due to the creation of the new defect remedy area.
Is changed from the conventional "NP" to "(NP) -P". Further, the data input / output control circuit 14 increments the content of the pointer S by +1 to indicate that the defect repair level has been raised by one step.

When the level 2 defect relief area is secured in this way, the data input / output control circuit 14 executes the actual defect relief processing. Actually, in FIG. 4B, the data to be written in the block W in which the write failure has occurred is
An example is shown in which writing is performed to the block NP of the P defective repair blocks previously secured and the block is relieved. And
After the defect repair processing, the data input / output control circuit 14
The block number “NP” of the rescue destination is written on the right side in the figure corresponding to the block W in the management table shown in FIG.
On the right side in the figure corresponding to the block NP, a numerical value “Z” indicating that the block is in use is written, and the remedy of the write defective block W is completed here.

The operation when the electronic still camera main body requests data reading of the block W can be easily found in accordance with the description of the level 1 defect remedy process shown in FIG. , The description of which is omitted.

FIG. 5 shows a flowchart summarizing the above operations. First, when the data input / output control circuit 14 detects that a write failure has occurred in any of the blocks (step S1), the data input / output control circuit 14 proceeds to step S2.
Then, it is determined whether or not a defective remedy area is formed, that is, whether or not the pointer S is “0”.
In step S3, it is determined whether there is an empty block in the rescue area. If there is an empty block (YES), the data input / output control circuit 14 proceeds to step S
At 4, the defective block is remedied using the empty block, and the process is terminated (step S5).

If it is determined in step S2 that no defective repair area has been formed (NO) or that there is no empty block (NO) in step S3, the data input / output control circuit 14 determines in step S6 that the defective It is determined whether or not the rescue level is at the maximum value, that is, whether or not the content of the pointer S is "M". If the rescue level is at the maximum value (YES), the memory card main body 11 is no longer in step S7. It is determined that it cannot be used, and the process is terminated (step S8). On the other hand, if it is determined that the defect repair level is not at the maximum value (NO), the data input / output control circuit 14 forms one level of defect repair area in the current data area in step S9. It is determined whether or not there are P empty blocks. If not (NO), it is determined in step S7 that the memory card body 11 cannot be used any more, and the process is terminated (step S8).

If it is determined that there is an empty block for one level (YES), the data input / output control circuit 1
4 is a step S10 in which P is continuously set from the last block in the current data area to a block number sequentially smaller.
It is determined whether or not the empty blocks can be secured. If the empty blocks cannot be secured (NO), in step S11, the data written in the area to be secured is moved to a data area outside the area to be secured. After that, in step S12, processing such as rewriting of information related to the moved data is executed.

Here, if it is determined in step S10 that P empty blocks can be continuously secured (YES), or after the related information is rewritten in step S12, the data input / output control circuit 14 Is the step S1
In step 3, the allocated area is changed from the data area to the defect rescue area, and the contents of the pointers S and T are updated in step S14. Then, in step S4, defect remedy processing is performed and the process is terminated (step S5). You.

Therefore, according to the configuration of the above embodiment, when a write failure occurs in a part of the data area, P empty blocks are searched from the data area and assigned to the defect relief area. Since the data to be written in the defective block is written in the empty block in the defective remedy area, the EEPROM 16 in which a writing error has occurred partially can be continuously used, and is economically advantageous and suitable for practical use. It is. When the defective repair area becomes full, P empty blocks are newly searched from the data area and assigned to the second defective relief area, and the empty blocks in the second defective relief area are assigned to the empty blocks. Since the data to be written into the defective block is written, that is, the defective repair area is increased in units of P blocks in accordance with the amount of write defective blocks, so that the storage area of the EEPROM 16 can be effectively used. Can be planned.

Further, according to the above embodiment, the EEPRO
Since the data area of M16 is automatically reduced in accordance with the generation amount of the write failure block, there is no problem that data cannot be recorded despite the apparent remaining recording capacity. Further, the data area may be reduced sequentially with a well-cut value such as 3 Mbytes, 2 Mbytes, 1 Mbytes, 512 Kbytes, and 256 Kbytes in the case of the EEPROM 16 of 4 Mbytes in the initial state. This can be adjusted to the lineup sequence of a normal memory card, and can be easily recognized from the outside. In addition, when the remaining recording capacity is quantized and output (for example, N times 256 kbytes), It is suitable.

Here, in the above embodiment, when a write failure occurs, a defective rescue area is generated by P empty blocks, and when the defective relieved area is full, the defective area is regenerated by the P empty blocks. Although the rescue area is generated, the number of empty blocks constituting the defective rescue area is not limited to the same P, and may be different every time the defective remedy area is formed. It should be noted that the present invention is not limited to the above embodiments, and can be variously modified and implemented without departing from the scope of the invention.

[0045]

As described in detail above, according to the present invention,
An extremely good memory card device which can continue to be used even in an EEPROM in which a writing failure has occurred partially, can effectively use the storage area of the EEPROM, and is economically advantageous and can be put to practical use. Can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of a memory card device according to the present invention.

FIG. 2 is a diagram showing a storage area of an EEPROM in the embodiment.

FIG. 3 is an exemplary view showing details of a management table in the embodiment.

FIG. 4 is an exemplary view showing a countermeasure in a case where a relief area is full in the embodiment.

FIG. 5 is a flowchart summarizing the operation of the embodiment.

FIG. 6 is a diagram showing a comparison between the length of an SRAM card and the length of an EEPROM card.

[Explanation of symbols]

11: memory card body, 12: connector, 13: bus line, 14: data input / output control circuit, 15: bus line, 16: EEPROM.

──────────────────────────────────────────────────続 き Continuing on the front page (72) Koji Maruyama, Inventor Koji Maruyama 8th, Shinsugita-cho, Isogo-ku, Yokohama, Kanagawa Prefecture Inside (72) Inventor Tomoyuki Maekawa 8th, Shinsugita-cho, Isogo-ku, Yokohama-shi, Kanagawa Stock (72) Inventor: Tomoaki Sato 3-3-9, Shimbashi, Minato-ku, Tokyo Inside Toshiba AV EE Co., Ltd. (56) References JP-A-63-305444 (JP, A) JP-A-2-118999 (JP, A) JP-A-5-151098 (JP, A) JP-A-63-24340 (JP, A) JP-A-1-286199 (JP, A) JP-A-61-1986 58063 (JP, A) JP-A-5-46489 (JP, A) JP-A-61-227300 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G06F 12/16 G06F 3 / 08 G06K 19/07 G11C 16/02

Claims (1)

(57) [Claims] 1. An EEPROM having a data area composed of a plurality of blocks each having a predetermined capacity, and an EEPROM having the data area.
In a state where a write failure is detected in a block of the data area, a specified number of empty blocks are searched from the data area and assigned to a first defect relief area, and data to be written to the defective block is written in the first defect area. A first rescue means for writing to an empty block in the rescue area, and a state in which the first rescue area is filled by the first rescue means and a write failure is detected in the block in the data area. A second rescue means for retrieving a specified number of empty blocks from the data area, allocating the empty blocks to a second defective relief area, and writing data to be written in the defective block to empty blocks in the second defective relief area; A memory card device comprising: