JPH05284438A - Tube screen display circuit - Google Patents

Abstract

PURPOSE:To revise a display position of various characters on a screen by applying revision control to the correspondence between a scanning position and a read address given to a display memory. CONSTITUTION:A preset value generating circuit 11 receiving a preset row address from a row counter 6 outputs row column addresses on a display memory 8 of a row corresponding to the preset value by three kinds of pattern structures. Moreover, a row column structure changeover register 12 stores a row column structure designation code and set by the operation of the user. Then a data selector 13 receiving three sets of the information from the preset value generating circuit 11 outputs one information designated by the row column structure designation code from the register 12. Thus, only one row column structure is processed and its output is given to a preset counter 7, then the preset counter 7 generates row column addresses to the display memory 8 one by one for each character.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a screen display circuit incorporated in a television receiver for displaying information such as channel number and volume on a screen.

[0002]

2. Description of the Related Art Conventionally, there is a screen display circuit for displaying information such as channel number and volume on a screen by inserting a character image into the screen of a broadcast program. When information is displayed by this screen display circuit, the screen is divided into rectangular areas in a grid pattern and the characters to be displayed are assigned to various positions. With this, for example, the channel number at the upper right corner of the screen, the volume on the left side,
In this way, the fixed information will be displayed.

The display control generally detects which rectangular area the scanning position of the screen is in the grid-like section, and stores a correspondence table of the screen position and the character code according to the position. The display memory is accessed and the character is positioned.

FIG. 3 shows this conventional tube surface display circuit.

In this figure, 1 is an oscillation circuit, 2 is a horizontal position counter, and 3 is a vertical position counter. The oscillator circuit 1 generates a clock signal having a frequency corresponding to the number of dots on one line, which accompanies the resolution when displaying a character. The horizontal position counter 2 counts the clock from the oscillation circuit 1 and outputs the count value as horizontal position information. The count value is reset by a horizontal synchronizing signal and initialized for each line. 3 counts the horizontal synchronizing signal and outputs the count value as vertical position information. The count value is reset by the vertical synchronizing signal and initialized for each field.

Reference numeral 4 is a horizontal frequency division output selector, and 5 is a vertical frequency division output selector. Selector 4 is horizontal position counter 2
The output of the horizontal position counter 2 is selected and output so that a pulse is generated each time the count value of is increased by a value corresponding to the horizontal size of the character. The pulse is a digit unit (character unit) pulse. The selector 5 selects and outputs the output of the vertical position counter 3 so as to generate a pulse each time the count value of the vertical position counter 3 increases by a value corresponding to the character vertical size, and the output pulse is a line unit pulse. Becomes

Reference numeral 6 is a row counter, and 7 is a preset counter. The row counter 6 counts the row unit pulse from the selector 5 and generates a row address count value. The preset counter 7 counts by the digit unit pulse from the select 5, and by incrementing the count value from the preset value from the row counter 6, the count value has the meaning of what digit of that row. is there.

8 is a display memory, 9 is a character ROM,
Reference numeral 10 is a display output control circuit. In the display memory 8, a character code corresponding to each row digit address is written by a writing device (not shown) to generate a character code corresponding to the designated row digit address from the preset counter 7 and to correspond to the color designated address. The color data is stored, and the color data is output in correspondence with the color designation code from the color designation circuit (not shown). Character ROM
Reference numeral 9 stores character data (bitmap pattern) corresponding to the character code, and outputs character data corresponding to the character code from the display memory 8. The outputs of these memories 8 and 9 are the display output control circuit 1
0, the display output control circuit 10 scans the character data from the ROM 9 according to the character size, and outputs a video signal so that the result is displayed in the color of the color designation data from the memory 8. It has become so.

Therefore, since the display memory 8 stores each character corresponding to each row digit address and accesses it by the row digit address to call and display the character corresponding to that position, a constant value is obtained. A predetermined character is displayed at a predetermined position in the area defined by the structure of display row × display digit (for example, 24 digits × 6 rows).

[0010]

As described above, in the above-mentioned conventional circuit, a fixed display row × display digit structure (for example, 24) is used.
Although it is possible to control the characters to be displayed in the area defined by (column x 6 lines), the configuration of the display column x display line cannot be changed.

The present invention has been made in view of the above problems of the prior art, and an object of the present invention is to provide a tube surface display circuit capable of changing the row digit configuration.

[0012]

According to a first aspect of the present invention, there is provided a screen display circuit according to the present invention, in which a display memory in which various character codes are written and character data in a character ROM corresponding to the character code from the display memory. A display output control circuit for converting the image signal into a video signal and sending it to the screen display system, a read address supply circuit for giving a read address to the display memory in correspondence with the scanning position of the display output control circuit, and a scan of the display output control circuit A read address control circuit for changing and controlling the correspondence between the position and the read address is provided.

According to a second aspect of the present invention, there is provided a tube surface display circuit including:
A display memory in which various character codes are written, a display output control circuit that converts the character data in the character ROM corresponding to the character code from this display memory into a video signal and sends it to the screen display system, and display in the display memory A read address supply circuit that gives a read address corresponding to the scanning position of the output control circuit and a character code writing circuit that can change the correspondence between the read address and various character codes are provided.

[0014]

According to the first aspect of the present invention, the screen display circuit of the present invention can change the display position of various characters on the screen by changing the correspondence between the scanning position and the read address given to the display memory. The screen display circuit of the present invention according to item 2 can change the display positions of various characters on the screen by changing the write address of each character code in the display memory. In other words, the former is characterized by reading control to the display memory, and the latter is characterized by writing control to the display memory.

However, when the circuit of claim 2 is adopted, it is necessary to cover the maximum number of capacities for each row and each digit in each row digit configuration in the display memory. That is,
For example, in order to enable the configuration of 24 columns × 6 lines, 16 columns × 9 lines, 12 columns × 12 lines, 24 columns, 12 columns, and 24 columns × 12 lines (288). Just prepare a capacity.

With respect to this point, in the case of the circuit according to claim 1, since the address of the read character corresponding to the screen position is changed, the structure of the display memory may be the same as the conventional one. By the way, the above 24 digits x 6 lines, 16 digits x 9
Even in the case of obtaining three kinds of configurations of rows and 12 digits × 12 rows, the capacity of the display memory itself may be 144 (= 24 digits × 6 rows = 16 digits × 9 rows = 12 digits × 12 rows).

[0017]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a screen display circuit according to an embodiment of the present invention. Since the circuit shown in this figure has the same constituent elements as the circuit shown in FIG. 3, duplicate description of those constituent elements will not be given, and only different points will be described.

In FIG. 1, in addition to the circuit shown in FIG. 3, the screen display circuit of the present embodiment has a preset value generation circuit 11
And a row digit configuration switching register 12 and a preset data selector 13. The preset value generation circuit 11 generates preset values corresponding to each of the three kinds of row digit configurations shown in Tables 1 to 3 from the preset values from the row counter 6.

That is, first, of these, FIG.
FIG. 4 shows each structure of 16 columns × 9 rows, FIG. 4 shows 16 columns × 9 rows, and FIG. 5 shows each column of 12 columns × 12 rows. For example, in the case of FIG. 3, the addresses (0C-) on the display memory 8 corresponding to the digit addresses (1-24) + row addresses (1-6), respectively.
9B) is shown. As can be seen from these tables, the correspondence between the row digit address and the address on the display memory 8 is different in each configuration.

Since the row address is preset from the row counter 6 in the preset value generating circuit 11,
The row digit address on the display memory 8 of the row corresponding to the preset value is output by each of the above-mentioned three types of configurations as shown in FIG.

The row digit configuration switching register 12 stores a row digit configuration designation code and is set by a user operation. The data selector 13 is a preset value generation circuit 1
Of the three pieces of information 1 to 1, one piece of information designated by the row digit configuration designation code from the register 12 is output.
As a result, as shown in FIG. 2B, the row digit structure is narrowed down. The output is given to the preset counter 7 so that the preset counter 7 can be operated as shown in FIG.
As shown in (c), a line digit address to the display memory 8 is generated for each character.

Therefore, according to this embodiment, the register 12
By setting, the correspondence between the scanning position and the read address given to the display memory 8 is determined to be one of the three types, and the display line digit structure on the screen of various characters can be changed.

Although one embodiment has been described above, the display memory 8 is constituted by an EEPROM, and the address on the display memory 8 corresponds to various character codes as a character data writing mechanism portion 14 shown by a chain line in FIG. It is also possible to change the line digit configuration by changing the configuration of the data in the display memory 8 by using a device that can change the line digit configuration.

In this case, however, it is necessary to cover the maximum number of capacities for each row and each digit in each row digit configuration in the display memory. That is, the capacity required for one character is 1 byte, but for example, 24 digits x 6
To allow configurations of rows, 16 digits x 9 rows, 12 digits x 12 rows, 24 for digits, 12 for rows,
A capacity of 24 columns x 12 rows (288) is required.

With respect to this point, in the case of the first embodiment, since the type of the read character corresponding to the screen position is changed, the structure of the display memory 8 may be the same as the conventional one. That is, even when the above-mentioned three configurations of 24 digits × 6 rows, 16 digits × 9 rows, and 12 digits × 12 rows are obtained, the display memory capacity itself is 144 bytes (= 24 digits × 6 rows = 16 digits × 9 rows). (Line = 12 digits × 12 lines) is sufficient.

[0026]

As described above, according to the present invention, by changing the correspondence between the scanning position and the read address given to the display memory, or by changing the write address of each character data to the display memory, It is possible to change the display positions of various characters on the screen.

Further, in particular, according to the circuit of the first aspect, the structure of the display memory may be the same as the conventional one.
Even when three kinds of configurations of 4 digits × 6 rows, 16 digits × 9 rows, and 12 digits × 12 rows are obtained, the display memory capacity itself is 144
(= 24 columns × 6 lines = 16 columns × 9 lines = 12 columns × 12 lines) is sufficient, and the correspondence between the address on the display memory and the character code does not need to be changed.

[Brief description of drawings]

FIG. 1 is a block diagram of a screen display circuit according to the present invention.

FIG. 2 is an output explanatory diagram of main circuit elements of the circuit shown in FIG.

FIG. 3 is a row digit configuration (24 digits × 6) by the circuit shown in FIG.
FIG.

4 is a row digit configuration (16 digits × 9) based on the circuit shown in FIG.
FIG.

5 is a row digit configuration (12 digits × 12) based on the circuit shown in FIG.
FIG.

FIG. 6 is a block diagram of a conventional screen display circuit.

[Explanation of symbols]

 1 Oscillation circuit 2 Horizontal position counter 3 Vertical position counter 4 Horizontal frequency division output selector 5 Vertical frequency division output selector 6 Row counter 7 Preset counter 8 Display memory 9 Character ROM 10 Display output control circuit 11 Preset value generation circuit 12 Row digit configuration switching Circuit 13 Preset data selector 14 Character data writing mechanism

Claims (2)

[Claims] 1. A display memory in which various character codes are written, and a display output control circuit which converts character data in a character ROM corresponding to the character code from the display memory into a video signal and sends the video signal to a display system of a screen. A read address supply circuit for giving a read address to the display memory in correspondence with a scan position of the display output control circuit, and a read address control circuit for changing and controlling the correspondence between the scan position of the display output control circuit and the read address And a screen display circuit equipped with. 2. A display memory in which various character codes are written, and a display output control circuit for converting character data in a character ROM corresponding to the character codes from the display memory into a video signal and sending the video signal to a display system of the screen. A read address supply circuit for giving a read address to the display memory in correspondence with a scanning position of the display output control circuit; and a character code writing circuit capable of changing the correspondence between the address on the display memory and the various character codes. And a screen display circuit equipped with.