JPH05268598A - Television telephone set - Google Patents

Abstract

PURPOSE:To display a moving picture whose motion is smooth with less transmission data quantity. CONSTITUTION:An inverse vector calculation section 208 calculates an inverse vector to obtain a macro block to be interpolated based on a frame number latched in new/old frame number registers 203, 204 and a motion vector V of each macroblock stored in Vx, Vy register files 201, 202, an interpolation corner address calculation section 210 calculates an address of an upper left of a macro block to be interpolated, picture data in a frame memory 1 are transferred to a buffer memory 3 in response to an address generated by a read/-write address generating section and then a picture of new and old frames is interpolated. Thus, even when a motion vector between plural frames is sent, a moving picture with smooth motion is displayed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a videophone device for transmitting and receiving image data of moving images by digital data transmission.

[0002]

2. Description of the Related Art In recent years, along with the progress of digital data transmission, a video telephone apparatus for transmitting an image together with a sound in real time is becoming widespread, and its transmission system is being standardized. In this kind of videophone apparatus, in order to reduce the amount of transmission data, an image is divided into blocks called 16 macropixels × 16 pixels called macroblocks, and a motion vector of each macroblock is mainly transmitted and received. Is used.

That is, in most cases, image data has a high correlation between frames that are temporally preceding and following each other, and if some macroblocks are moved to some extent, an image with higher correlation can be obtained. By transmitting the motion vector at an appropriate frame interval, the amount of data can be significantly reduced.

[0004]

However, in the videophone apparatus that transmits the motion vector at an appropriate frame interval as described above, although the data amount can be reduced while maintaining the image quality of each frame to some extent, a large moving image can be obtained. In such a case, there is a problem that the image tends to be awkward like a so-called frame sound.

In particular, an image of a normal television broadcast (1
For a user who is accustomed to seeing that the image changes every 30 seconds), the above-mentioned image is very uncomfortable, and this problem becomes more remarkable with the spread of the videophone device. The present invention has been made in view of the above points, and an object thereof is to provide a videophone device capable of displaying a moving image with smooth motion while suppressing the amount of transmission data to be small.

[0006]

In order to achieve the above object, the present invention is based on a motion vector of a macroblock between two frames over a plurality of frame intervals and the image data of the previous frame, and the subsequent frame. Image data generating means for generating image data, and interpolation means for interpolating image data of frames between both frames based on the movement vector and at least one of the image data of both frames are provided. There is.

[0007]

With the above arrangement, the image data generating means generates the image data of the subsequent frame based on the motion vector of the macroblock between the two frames over the plurality of frame intervals and the image data of the previous frame, The interpolation means interpolates the image data of the frames between the two frames based on the movement vector and the image data of at least one of the both frames.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a block diagram showing a configuration of a reproduced image processing unit in a videophone device. In the figure, the frame memory 1 holds image data input via the data I / O bus 300. This image data is picked up by the sending videophone device,
The image data that is compressed and transmitted is decoded and reproduced by a reception signal processing unit (not shown), and is composed of, for example, 8-bit pixel data.

The interpolation processing circuit 2 is, for example, 16 pixels × 16.
The images of the frames before and after the movement of the macroblock of pixels are interpolated, and the details will be described later. The buffer memory 3 is
The image subjected to the interpolation processing is temporarily stored, and is read at a fixed time period (about 33 msec). The D / A converter 4 converts the digital data read from the buffer memory 3 via the data bus 301 into an analog signal.

The video analog circuit 5 includes a D / A converter 4
The analog signal input from the analog signal line 302 is subjected to predetermined analog signal processing to output a video signal. The interpolation processing circuit 2 is
More specifically, the configuration is as shown in FIG. In the figure, a Vx register file 201 and a Vy register file 202 hold an x-direction component Vx or a y-direction component Vy (hereinafter, referred to as “movement vector Vx, Vy”) in the movement vector V of each macroblock. To do. The movement vector Vx,
Vy is transmitted from the video telephone apparatus on the transmission side as an absolute value within a range of 16 pixels or less, for example, and is given from the reception signal processing unit (not shown) via the parameter bus 205 and latched by the latch pulse 206. It
The interval at which the movement vectors Vx and Vy are transmitted, that is, the frame drop interval varies depending on the amount of information of the compressed data to be transmitted, but is transmitted at intervals of, for example, about 1 second or less.

The old frame number register 204 and the new frame number register 203 hold the frame numbers before and after the movement of the macro block indicated by the movement vectors Vx and Vy, respectively. here,
The frame number is a number of 0 to 29, which is assigned to each frame of 30 frames per second, for example, in the video telephone apparatus on the transmission side, and is transmitted in correspondence with the movement vectors Vx and Vy.

The transmitted frame number is given to the new frame number register 203 via the parameter bus 205 and latched by the latch pulse 207.
At that time, the frame number held in the new frame number register 203 is transferred to the old frame number register 204. The inverse vector calculation unit 208 uses the image data of the frame indicated by the new frame number register 203 (the image data held in the frame memory 1) to interpolate the image data of each frame between the old and new frames. The inverse vector of the macroblock is calculated.

That is, the old frame number register 20
4. Assuming that the difference between the frame numbers held in the new frame number register 203 is n, − [Vx × (n−k) / n] and − for the kth frame in between.
The inverse vector of [Vy × (n−k) / n] is calculated. Here, [] indicates the Gauss symbol. (For example, [3.2] is the maximum integer that does not exceed 3.2 = 3.) The macroblock counter 209 sequentially outputs the numbers of all macroblocks for each frame.

The interpolation corner address calculation unit 210, for example, of the pixel at the upper left end of the macro block to be interpolated based on the macro block number output from the macro block counter 209 and the inverse vector output from the inverse vector calculation unit 208. The address is calculated. The read address generation unit 211 and the write address generation unit 212 respectively generate an address for scanning each pixel in a macro block for reading image data from the frame memory 1 or a macro block for writing image data in the buffer memory 3. is there.

The selector 215 is used for the data I / O bus 3.
Address given in synchronization with the image data from A.00. Adr and the read address output from the read address generation unit 211 are switched to the switching control signal S.
EL. The frame memory 1 is selectively switched on the basis of CNT and is supplied to the frame memory 1. Further, the output read address generator 213 is the write address generator 2
Reference numeral 12 is asynchronous and generates a read address according to a predetermined image display timing.

The selector 214 includes the write address generator 212 and the output read address generator 2.
The address generated by 13 is selectively switched based on a read / write signal (not shown), and is supplied to the buffer memory 3. The operation when the frame interpolation is performed in the above configuration will be described. In the following description, for simplicity, an example in which interpolation is performed for one macroblock is shown. Further, “movement vectors Vx, Vy” and the like are collectively expressed as “movement vector V”.

For example, as shown in FIG. 3, for the macroblock 400, from time t = t0 (frame f0) to 4
It is assumed that the movement vector V is transmitted at time t = t1 (frame f4) after the frame time. In this case, the image held in the frame memory 1 is an image that the macroblock 400 has moved by the movement vector V in the frame f4 without changing from the frames f0 to f3.

At this time, the new frame number register 20
3, the old frame number register 204 holds 4 and 0 as frame numbers, and the Vx register file 201 and Vy register file 202 hold the movement vector V. Based on this, the inverse vector calculation unit 208 calculates the movement vectors -V1, -V2, -V3 at a predetermined timing, and the interpolation corner address calculation unit 210 calculates the addresses of the pixels P, Q, R.

Therefore, the read address generator 211,
The write address generation unit 212 generates an address for scanning each pixel of the macro block 400, and the image data of the macro block 400 in the frame f4 is sequentially written in a position with the pixels P, Q, and R at the left end. Therefore, the buffer memory 3 holds an image in which the macro block 400 is gradually moved from the frames f0 to f4, and a video signal having a smooth motion is obtained.

[0020]

As described above, according to the present invention,
Even if a motion vector between frames over multiple frame intervals is transmitted, the image data of the frames between the two frames is interpolated, so the amount of transmitted data can be reduced with no significant increase in hardware scale. An effect that a moving image with smooth movement can be displayed is achieved.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a reproduced image processing unit in a videophone device.

FIG. 2 is a block diagram showing a detailed configuration of an interpolation processing circuit.

FIG. 3 is an explanatory diagram showing an example in which a frame is interpolated for one macroblock.

[Explanation of symbols]

 1 frame memory 2 interpolation processing circuit 3 buffer memory 4 D / A converter 5 video analog circuit 201 Vx register file 202 Vy register file 203 new frame number register 204 old frame number register 205 parameter bus 206 latch pulse 207 latch pulse 208 reverse Vector calculation unit 209 Macro block counter 210 Interpolation corner address calculation unit 211 Read address generation unit 212 Write address generation unit 213 Output read address generation unit 214 Selector 215 Selector 300 data I / O bus 301 Data bus 302 Analog signal line 400 Macro block

Claims (1)

[Claims] 1. An image data generating means for generating image data of a subsequent frame based on a moving vector of a macroblock between two frames over a plurality of frame intervals and image data of the preceding frame, and the moving vector. A video telephone device, comprising: an interpolating unit that interpolates image data of frames between both frames based on at least one image data of both frames.