JPH05243222A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent a difference in level on the surface which corresponds to the thickness of an interconnection and thereby to form an accurate resist pattern in the following photolithography process by forming a metal interconnection selectively after formation of an interconnection pattern on an insulating film. CONSTITUTION:A laminated metal film constituted of a first conductive film 102 and a second conductive film 103 is formed and an interconnection pattern is formed. Then, on the laminated metal film, a first insulating film 105 and a third conductive film 106 are formed and an interconnection pattern which is nearly the same as the formerly formed interconnection pattern is made on the first insulating film 105 and the third conductive film 106. Nextly, a fourth conductive film 107 is formed on the first insulating film 105 and the second conductive film 103 and then the fourth conductive film 107 on the flat part is removed, being remained only on a side wall part, to expose the surface of the second conductive film 103 again. After that, a fifth conductive film 108 is formed selectively by electrolytic plating on the second conductive film 103. After removing the whole of the third conductive film 106 a part of the fourth conductive film 107, a second insulating film 109 is formed on the fifth conductive film 108 and the first insulating film 105.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device formed by electrolytic plating, and more particularly to a method of manufacturing a metal wiring and an interlayer insulating film of a semiconductor device.

[0002]

2. Description of the Related Art As shown in FIG. 12, a first conductive film 202 made of a titanium-tungsten alloy in which titanium is added to tungsten in an amount of 5 to 10% is a known technique.
C. Film formation power of 1.0 using magnetron sputtering method
~ 5.0 kW, film forming pressure 2 ~ 10 mTorr, 0.05 ~
A second conductive film 203 made of gold, platinum, palladium or the like having a thickness of 0.2 μm is formed on the lower insulating film 201 for the purpose of improving adhesion and supplying a plating current,
D. C. A magnetron sputtering method is used to form a film having a thickness of 0.01 to 0.1 μm on the first conductive film 202 under the conditions of film forming power of 0.5 to 1.0 kW and film forming pressure of 2 to 10 mTorr. Wiring forming mask 20 composed of positive type photoresist using photolithography technology
4 is selectively formed on the second conductive film 203 with a thickness of 1.0 to 2.0 μm, and the second conductive film 203 is formed by using an electrolytic gold plating solution composed of sodium gold sulfate, sulfuric acid, phosphoric acid, or the like.
Is used as a cathode, and a mesh-shaped electrode formed by coating platinum on platinum or titanium is used as an anode.
Electrolytic gold plating is performed under the condition of current density of 1 to 4 mA / cm ² to selectively form a third conductive film 205 of gold having a low electric resistance with a thickness of 0.5 to 2.0 μm,
Further, the wiring forming mask 204 is removed using an organic solvent. The third conductive film 205 is formed for the purpose of reducing the electric resistance of the entire wiring.

As shown in FIG. 13, the third conductive film 20 is formed by a milling method using argon gas as a source and a reactive ion etching method using CF ₄ and SF ₆ as etching gases.
5 is used as an etching mask to remove unnecessary portions of the lower first conductive film 202 and the second conductive film 203, and the first conductive film 202, the second conductive film 203, and the third conductive film 205 are removed.
Forming a metal wiring.

As shown in FIG. 14, a silicon oxide film or a silicon nitride film having a thickness of 0.5 to 2.0 μm is formed as a first insulating film 206 on the lower insulating film 201 and the third conductive film 205 by a plasma CVD method. Form.

As shown in FIG. 15, a coating film of organic silica or inorganic silica is formed as a second insulating film 207 on the first insulating film 206, heat-treated and then etched back to form the first insulating film 206. The step formed between the third conductive film 205 and the third conductive film 205 is smoothed. Further, a silicon oxide film or a silicon nitride film having a thickness of 0.5 to 2.0 μm is formed as a third insulating film 208 on the first insulating film 206 and the second insulating film 207 by the plasma CVD method.

[0006]

The above-described conventional method for forming metal wiring of a semiconductor device has the following drawbacks.

In such a wiring forming method, since a surface step corresponding to the film thickness of the wiring is generated in the portion where the wiring is present and the portion where the wiring is not present, an accurate resist pattern is formed in the photolithography process. Has become difficult.

[0008]

A method of manufacturing a metal wiring and an interlayer insulating film of a semiconductor device according to the present invention comprises a first conductive film as an adhesion metal and a plating adhesion material existing on the first conductive film as a plating adhesion material. Forming a wiring pattern by patterning a laminated metal film made of two conductive films, forming a first insulating film and a third conductive film on the laminated metal film, and forming the first insulating film and the third insulating film. A step of forming a wiring pattern substantially the same as the wiring pattern in the conductive film to expose the surface of the second conductive film, and forming a fourth conductive film on the first insulating film and the second conductive film. A step of removing the fourth conductive film in the flat portion and exposing the surface of the second conductive film again while leaving only a side wall, and selectively performing a fifth conductive process on the second conductive film by electrolytic plating. A step of forming a film, and A 3 and removing part of the conductive film of the whole and the fourth conductive film, forming a second insulating film on the fifth conductive layer and the first insulating film.

[0009]

According to the method of manufacturing a semiconductor device of the present invention, since the wiring metal is selectively formed after forming the wiring pattern on the interlayer insulating film, a surface step corresponding to the wiring film thickness does not occur. Therefore, an accurate resist pattern can be formed in the subsequent photolithography process.

[0010]

Embodiment 1 Next, Embodiment 1 of the present invention will be described with reference to the drawings.

As shown in FIG. 1, a first conductive film 102 made of a titanium-tungsten alloy in which 5% to 10% of titanium is added to tungsten as an adhesion metal is used as a known technique. C. Using the magnetron sputtering method, the film forming power is 1.0 to 5.0 kW and the film forming pressure is 2 to 10 mTorr.
It is formed on the lower insulating film 101 with a thickness of 0.05 to 0.2 μm. Then, for the purpose of improving the adhesiveness and supplying the plating current, the second conductive film 103 made of gold, platinum, palladium, or the like was formed by D.I. C. Film formation power of 0.5 to 1.0 kW and film formation pressure of 2 to 10 using magnetron sputtering method
Under the condition of mTorr, the first thickness of 0.01-0.1 μm
It is formed on the conductive film 102, and the first method is performed by using a known method such as photolithography technique or dry etching technique.
A wiring pattern of a laminated conductive film including the conductive film 102 and the second conductive film 103 is formed.

As shown in FIG. 2, a silicon oxide film or a silicon nitride film having a thickness of 0.5 to 2.0 μm is formed as a first insulating film 105 on the lower insulating film 101 and the patterned second conductive film by a plasma CVD method. Then, a titanium-tungsten alloy is used as the third conductive film 106 on the first insulating film 105 by a sputtering method in an amount of 0.05 to 0.
It is formed with a thickness of 2 μm.

As shown in FIG. 3, the same wiring pattern as the laminated conductive film composed of the first conductive film 102 and the second conductive film 103 is formed by using the known photolithography technique, dry etching technique and the like. To expose the second conductive film 103.

As shown in FIG. 4, a titanium-tungsten alloy is used as a fourth conductive film 107 on the first insulating film 105 and the second conductive film 103 by a sputtering method to have a thickness of 0.05 to 0.2 μm.
It is formed with the thickness of.

As shown in FIG. 5, the fourth conductive film 107 is dry-etched to form a flat portion of the third conductive film 1.
The second conductive film 103 is exposed while leaving 06 and the fourth conductive film 107 on the side wall. Subsequently, the third conductive film 1 is subjected to heat treatment in an oxygen atmosphere or exposure to oxygen plasma.
The surfaces of 06 and the fourth conductive film 107 are oxidized.

As shown in FIG. 6, a third electrolytic gold plating solution composed of sodium gold sulfate, sulfuric acid, phosphoric acid, etc. is used.
The conductive film 106 and the fourth conductive film 107 are plated current paths,
The second conductive film 103 is used as a cathode and platinum or a mesh-shaped electrode formed by coating platinum on titanium as an anode is energized to perform electrolytic gold plating under the conditions of a plating temperature of 30 to 60 ° C. and a current density of 1 to 4 mA / cm ² . A fifth conductive film 108 made of gold and having a low electric resistance is selectively formed on the second conductive film 103 with a thickness of 0.5 to 2.0 μm. Third conductive film 1
By oxidizing the surfaces of 06 and the fourth conductive film 107 to form an insulator, deposition of plated gold on the surfaces of the third conductive film 106 and the fourth conductive film 107 is prevented.

As shown in FIG. 7, after the third conductive film 106 and the fourth conductive film 107 are partially removed by isotropic etching, a heat treatment is performed to stabilize the fifth conductive film 108.

As shown in FIG. 8, a silicon oxide film or a silicon nitride film having a thickness of 0.5 to 2.0 μm is formed as a second insulating film 109 on the first insulating film 105 and the fifth conductive film 108 by the plasma CVD method. Form.

The metal wiring thus formed has no step corresponding to the wiring film thickness because the wiring is formed on the wiring pattern in which the interlayer insulating film is formed in advance.

Next, a second embodiment of the present invention will be described with reference to the drawings.

As shown in FIG. 9, the same method and material as in Example 1 are used to form a laminated conductive film composed of the first conductive film 102 and the second conductive film 103 on the lower insulating film 101. After forming the first insulating film 105 and the third conductive film 106 and opening the same wiring pattern as the second conductive film 103, the fourth conductive film 107 is formed on the first insulating film 105 and the second conductive film 103. The third conductive film 10 formed and on the flat portion
6 and the fourth conductive film 107 on the side wall portion, the second conductive film 103 is exposed, and the fifth conductive film 108 is formed only on the second conductive film 103. The fourth conductive film 107 of is removed.

As shown in FIG. 10, the first insulating film 105 is etched back by anisotropic dry etching so that the surface of the first insulating film 105 and the surface of the fifth conductive film 108 have the same height.

As shown in FIG. 11, a silicon oxide film or a silicon nitride film having a thickness of 0.5 to 2.0 μm is formed as a second insulating film 109 on the first insulating film 105 and the fifth conductive film 108 by the plasma CVD method. Form. In the metal wiring thus formed, the step difference between the first insulating film and the metal wiring is reduced by etching back, so that the second insulating film 109 is further flattened.

[0024]

As described above, in the method for manufacturing the metal wiring and the interlayer insulating film of the semiconductor device of the present invention, since the wiring metal is formed on the wiring pattern formed on the insulating film, the conventional method occurs. A step corresponding to the wiring film thickness does not occur.
Therefore, an accurate resist pattern can be formed in the subsequent photolithography process, and the multilayer wiring can be easily formed.

[Brief description of drawings]

FIG. 1 is a process vertical sectional view of a first embodiment of the present invention.

FIG. 2 is a process vertical sectional view of the first embodiment of the present invention.

FIG. 3 is a process vertical sectional view of the first embodiment of the present invention.

FIG. 4 is a process vertical sectional view of the first embodiment of the present invention.

FIG. 5 is a process vertical sectional view of the first embodiment of the present invention.

FIG. 6 is a process vertical sectional view of the first embodiment of the present invention.

FIG. 7 is a process vertical sectional view of the first embodiment of the present invention.

FIG. 8 is a process vertical sectional view of the first embodiment of the present invention.

FIG. 9 is a process vertical cross-sectional view of a second embodiment of the present invention.

FIG. 10 is a process vertical sectional view of the second embodiment of the present invention.

FIG. 11 is a process vertical sectional view of the second embodiment of the present invention.

FIG. 12 is a process vertical cross-sectional view of a conventional method for forming a metal wiring of a semiconductor device.

FIG. 13 is a process vertical cross-sectional view of a conventional method for forming a metal wiring of a semiconductor device.

FIG. 14 is a process vertical cross-sectional view of a conventional method for forming a metal wiring of a semiconductor device.

FIG. 15 is a process vertical cross-sectional view of a conventional method for forming metal wiring of a semiconductor device.

[Explanation of symbols]

 Reference Signs List 101 lower insulating film 102 first conductive film 103 second conductive film 104 wiring mask 105 first insulating film 106 third conductive film 107 fourth conductive film 108 fifth conductive film 109 second insulating film 201 lower insulating film 202 second 1 Conductive Film 203 Second Conductive Film 204 Wiring Forming Mask 205 Third Conductive Film 206 First Insulating Film 207 Second Insulating Film 208 Third Insulating Film

Claims (3)

[Claims] 1. A step of forming a wiring metal pattern by forming a laminated metal film made of a first conductive film as an adhesion metal and a second conductive film as a plating adhesion material existing on the first conductive film, and forming a wiring pattern by patterning. Forming a first insulating film and a third conductive film on the laminated metal film; and forming a wiring pattern in the first insulating film and the third conductive film, the wiring pattern being substantially the same as the wiring pattern. Exposing the surface of the first conductive film, forming a fourth conductive film on the first insulating film and the second conductive film, and removing the fourth conductive film in the flat portion and leaving only the side wall again. A step of exposing the surface of the second conductive film; a step of selectively forming a fifth conductive film on the second conductive film by an electrolytic plating method; A step of removing a part,
A method of manufacturing a semiconductor device, comprising the step of forming a second insulating film on the fifth conductive film and the first insulating film. 2. A step of oxidizing the surfaces of the third conductive film and the fourth conductive film before the step of selectively forming the fifth conductive film on the second conductive film by an electrolytic plating method. The method for manufacturing a semiconductor device according to claim 1, further comprising: 3. Before the step of forming the second insulating film,
2. The method of manufacturing a semiconductor device according to claim 1, further comprising the step of etching back the first insulating film so that the surface of the first insulating film and the surface of the fifth conductive film have substantially the same height. ..