JPH05206322A - Multi-chip package - Google Patents

Abstract

PURPOSE:To provide a multi-chip package to permit packaging a plurality of chips. CONSTITUTION:A multi-chip package is composed of a substrate 1, leads 10a which are bonded on the substrate 1 through soldering section and extend toward the external direction from the substrate 1, a mold 3 connecting the leads 10a and the substrate 1, and a plurality of chips P mounted on the substrate 1. The melting point of the soldering section shall be higher than the formation temperatures of the mold 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-chip package, and more particularly to a package structure for packaging a plurality of chips.

[0002]

2. Description of the Related Art Electronic parts such as QFP and SOP
In some cases, the leads extend outward from the periphery of the mold body. Such a package type electronic component is generally formed by bonding a chip to a lead frame with a die bonder, then connecting the chip and the lead frame lead portion with a wire using a wire bonder, and further using a mold press to protect the chip. It is manufactured by forming a molded body with an apparatus, punching out a lead frame and forming leads.

[0003]

By the way, in recent years, electronic parts are required to be highly integrated. However, in the above conventional means, only one chip can be packaged in one electronic part. Therefore, high integration is achieved. There was a problem that there was a limit.

Therefore, an object of the present invention is to provide means for obtaining a multi-chip package having a high degree of integration.

[0005]

To this end, the present invention provides a substrate, leads that are bonded to the substrate via a solder portion and extend outward from the substrate, and a mold that connects the leads and the substrate. A multi-chip package was constructed from the body and a plurality of chips mounted on this substrate, and the melting temperature of the solder portion was set higher than the molding temperature of the mold body.

[0006]

According to the above construction, since a plurality of chips can be packaged in one multi-chip package by mounting a plurality of chips on the substrate, a compact and highly integrated electronic component can be obtained. You can

Further, since the melting temperature of the solder portion for bonding the substrate and the lead is set higher than the molding temperature of the mold body,
During molding of the molded body, it is possible to prevent the solder portion for bonding the leads to the substrate from being remelted to form a void and prevent moisture from entering the package through the void.

[0008]

(Embodiment 1) Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a perspective view of a multi-chip package C according to the present invention, and FIG. 2 is a sectional view of the same. In the figure, reference numeral 1 is a substrate, and leads 10 are provided outward from the substrate 1.
a is extended. Reference numeral 3 denotes a mold body formed around the substrate 1. The mold body 3 includes a substrate 1 and leads 1
In order to firmly bond the two so that 0a is not separated, a frame shape is formed at the joint between the two. P is a chip, and a plurality of chips are mounted on the upper surface of the substrate 1. Four
Is an electrically insulating resin as a protection means for the chip P, and is applied to the inside of the molded body 3 in order to protect the chip P and the wire 6 by resin sealing. Reference numeral 5 is a solder portion for bonding the substrate 1 and the lead 10a, and reference numeral 7 is a main substrate on which the multi-chip package C is mounted in a later step. The multi-chip package C is mounted on the main board 7.
Reference numeral 25 is a solder portion for bonding the lead 10a to the main board 7.

The multi-chip package C has the above-mentioned structure, and its manufacturing method will be described below. 3 to 5 are explanatory views of the manufacturing process of the multi-chip package C according to the present invention, and show a series of operations. First, as shown in FIG. 3A, the solder portion 5 is formed on the lead frame 10 by the screen printer 8. Specifically, the lead frame 10 is provided below the screen mask 9.
And squeegee 11 is slid on the screen mask 9 to apply the cream solder 5'on the leads 10a of the lead frame 10 through the pattern holes formed in the screen mask 9. Solder part 5
To form. The solder portion 5 is made of tin (Sn) and silver (Ag).
Is an alloy containing 96.5: 3.5 and has a melting temperature of about 220 ° C.

Next, as shown in FIG. 3B, the substrate 1 is mounted on the solder portion 5. Specifically, the transfer head 13
Are driven in the XY directions to mount the substrate 1 adsorbed by the nozzles 14 on the solder portion 5. Next, as shown in FIG. 3C, the solder portion 5 is heat-treated by a reflow device,
The substrate 1 is adhered to the lead frame 10 and then the front and back are inverted (FIG. 4A). The solder portion 5 may be formed by other means such as solder plating or solder leveler. Next, as shown in FIG. 4B, in order to firmly bond the joint between the substrate 1 and the lead 10a, a frame-shaped mold body 3 is molded around the substrate 1 by a mold pressing device. The molding temperature of the molded body 3 at this time is about 190 ° C., which is lower than the melting temperature (220 ° C.) of the solder portion 5.

Next, as shown in FIG. 4C, a plurality of chips P sucked by the nozzles 16 are mounted on the substrate 1 by the transfer head 15. Next, as shown in FIG. 5A, the electrode of the chip P and the electrode of the substrate 1 are connected by the wire 6 by the wire bonder 18. Specifically, while swinging the horn 19 in the vertical direction, the chip P and the electrode of the substrate 1 are connected by the wire 6 inserted into the capillary tool 20. In addition to such a chip P,
A flip chip, a TAB chip, or the like may be directly mounted on the electrode of the substrate 1, and in this case, wire bonding is unnecessary.

Next, as shown in FIG. 5B, in order to protect the chip P and the wire 6, an insulating resin 4 is applied to the inside of the molded body 3 by a dispenser 17 and mounted. The chip P is resin-sealed. As the resin 4, for example, UV resin, thermosetting resin or the like can be used. Next, when the resin 4 is a UV resin, it is irradiated with ultraviolet rays, and when it is a thermosetting resin, heat treatment is performed to cure the resin 4. In this case, the resin 4 may be applied in a large amount so as to fill the inside of the mold body 3, or may be locally applied only to the mounting position of the chip P. Next, as shown in FIG. 5C, the cutting device 3
1, the leads 10a of the lead frame 10 are punched out and formed to complete the multi-chip package C shown in FIG. Since the plurality of chips P are packaged in the multi-chip package C manufactured in this manner, the degree of integration is extremely high.

This completed multi-chip package C
Are mounted on the main board 7 as shown in FIG. As shown in FIG. 6, this mounting is performed by mounting the lead 10a on the solder portion 25 formed on the electrode 26 of the main substrate 7, and then heat-treating the solder portion 25 with a reflow device. The solder portion 25 is made of lead (Pb) and tin (Sn).
Alloy having a ratio of 6: 4 and a melting temperature of 18
It is 3 ° C. The solder portion 25 may be heated and melted by local irradiation of laser light.

As described above, the molding temperature of the mold body 3 is 190 ° C., the melting temperature of the solder portion 25 is 183 ° C., and the melting temperature of the solder portion 5 is 220 ° C. In this way, the melting temperature of the solder portion 5 is set to the molding temperature 1 of the mold body 3.
Since the temperature is set to 90 ° C. and 220 ° C., which is higher than the melting temperature 183 ° C. of the solder portion 25, when the mold body 3 is formed and the solder portion 2 is formed.
It is possible to prevent the solder portion 5 from being remelted during the heat treatment of 5. That is, when the solder portion 5 is reheated to 220 ° C. or higher and remelted, voids are likely to be generated when the solder portion 5 is solidified again.
As shown by the broken line arrow, external moisture E may enter into the package through this gap and cause a short circuit or the like. In this means, the melting temperature of the solder portion 5 is set to the molding temperature of the mold body 3 or the solder. Since the temperature is set higher than the melting temperature of the portion 25, there is no possibility that the solder portion 5 will be re-melted and voids will be formed during molding of the molding body 3 or during heat treatment of the solder portion 25.

(Embodiment 2) FIG. 7 is a sectional view of a multi-chip package of another embodiment of the present invention. Mold body 3
0 is molded so as to cover the entire surface of the substrate 1. Similar to the first embodiment, this one can also obtain the same effect by making the melting temperature of the solder portion 5 higher than the molding temperature of the mold body 30 and the melting temperature of the solder 25.

The present invention is not limited to the above embodiment, and the solder portion 5 has been described by taking as an example a mixture of tin and silver in a ratio of 96.5: 3.5. Any material can be set as long as it can be set higher than the molding temperature of the molded body 3, and its material and compounding ratio can be freely set.

[0017]

As described above, the present invention includes a substrate,
A multi-chip package including a lead that is bonded to the substrate via a solder portion and extends outward from the substrate, a mold body that joins the lead and the substrate, and a plurality of chips mounted on the substrate. Since the melting temperature of the solder portion is set higher than the molding temperature of the mold body, a plurality of chips can be packaged by mounting a plurality of chips on the substrate, and the degree of integration is extremely high. It is possible to obtain an electronic component, and it is possible to eliminate the occurrence of voids that cause moisture to enter the package due to remelting of the solder portion that bonds the leads to the substrate during molding of the molded body.

[Brief description of drawings]

FIG. 1 is a perspective view of a multi-chip package according to the present invention.

FIG. 2 is a sectional view of the same.

FIG. 3 is an explanatory diagram of a manufacturing process of a multi-chip package according to the present invention.

FIG. 4 is an explanatory diagram of a manufacturing process of a multi-chip package according to the present invention.

FIG. 5 is an explanatory diagram of a manufacturing process of a multi-chip package according to the present invention.

FIG. 6 is a sectional view of a main part of a multi-chip package according to the present invention.

FIG. 7 is a sectional view of a multi-chip package according to another embodiment of the present invention.

[Explanation of symbols]

 1 Substrate 3 Mold 5 Solder 10a Lead 30 Mold C Multi-chip package P Chip

Claims (1)

[Claims] 1. A substrate, a lead which is adhered to the substrate via a solder portion and extends outward from the substrate, a mold body for connecting the lead and the substrate, and a plurality of members mounted on the substrate. A multi-chip package comprising individual chips, the melting temperature of the solder portion being higher than the molding temperature of the mold body.