JPH05199404A - Variable enlargement processing method for image reader - Google Patents

Abstract

PURPOSE:To secure the continuity of boundary parts of sensors by performing such shift processing that data includes picture elements data of picture elements on inter-sensor boundary parts at the time when document picture elements are read by plural image sensors and are variably enlarged and are stored in a line memory. CONSTITUTION:Separating parts 511 and 512 in a picture element processing part separate picture elements of two systems in each line from two image sesors into the picture data of odd picture elements and that of even picture elements. Picture data are stored in storage parts 514 to 517 in accordance with the write address from an address generation control part 513, and stored data are read out in accordance with a read address and are outputted to selectors 518 and 519. Selectors 518 and 519 select outputs of storage parts 514 to 517 in accordance with a selector switching signal datach and output them as picture data. Thus, the separation of the picture in boundary parts of image sensors is prevented.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an enlargement / magnification processing method in an image reading apparatus using a plurality of image sensors arranged so as to be continuous in the main scanning direction.

[0002]

2. Description of the Related Art Conventionally, an image is formed by a combination of dots of a certain size, such as a digital copying machine, a facsimile, an OCR (optical character reader), an optical filing system, and various display devices. 2. Description of the Related Art An image reading device (image reader) for reading a document image by dividing it into pixels is used as an image input unit of a device that performs image formation, storage, display, and the like.

In a conventional image reading apparatus, a one-dimensional image sensor extending in the main scanning direction is used, the original image is read by scanning in the sub-scanning direction of the original image, and the obtained analog signal of each pixel is converted into a multi-valued signal. The image data is converted into digital image data, the converted image data is subjected to image processing, and binary image data corresponding to each pixel is output.

Image processing performed by the image reading device includes
Shading correction, edges that make images clear
Emphasis, smoothing to make the image look natural (smoothing)
To improve image quality, such as scaling processing such as enlargement or reduction, image editing such as trimming, masking, negative / positive conversion, and multi-valued data corresponding to the density or color of each pixel of the document. There is a binarization process for converting into binary data.

In the conventional image reading apparatus, in order to read a large document such as A2 size, a plurality of image sensors arranged so as to be continuous in the main scanning direction are used. The obtained image data of plural systems are processed in parallel.

[0006]

When a plurality of image sensors are used, it is necessary to combine the image data read by the respective image sensors and combine them. In that case, it is necessary that the combined images are continuous at the boundary so that the middle of the image is not missing.

Here, there is no problem if the image processing is performed at the same size, but if the image data is electrically enlarged and scaled, the number of pixels is changed accordingly. Therefore, it may not be possible to store the data in the line memory used in each process.

Then, the combined image becomes a separated image having no continuity at the boundary portion of the image sensor, which may make it impossible to reproduce the original image.

In view of the above-described problems, the present invention is an image reading apparatus using a plurality of image sensors arranged so as to be continuous in the main scanning direction. It is intended to secure the continuity of the image and prevent the image from being separated at the boundary portion.

[0010]

In order to solve the above-mentioned problems, the method according to the invention of claim 1 subdivides the original image into pixels by a plurality of image sensors arranged so as to be continuous in the main scanning direction. In an image reading device that reads in parallel and processes the image data of multiple systems obtained by each image sensor in parallel, the line memory is provided by electrically enlarging and scaling the image data of multiple systems in the main scanning direction. The image that has been magnified and scaled so as to include the image data of the pixels in the boundary portion between the image sensor and the image sensor and the image data of the number of images necessary for reproducing the image. The data is shifted and stored in the line memory.

[0011]

A large-sized original image is read by being divided into a plurality of systems in the main scanning direction by a plurality of image sensors. The image data of a plurality of systems thus obtained are processed in parallel up to a predetermined stage.

At the stage of performing the enlargement / reduction processing, when the image data subjected to the enlargement / reduction is stored in the line memory, the image data of pixels at the boundary between the image sensor and the image sensor is included. The image data that has been magnified and scaled is subjected to shift processing so as to include the image data of the number of images necessary for image reproduction, and then stored in the line memory.

The image data stored in each of these line memories are connected at appropriate stages to be combined into one continuous image data.

[0014]

FIG. 2 is a sectional front view showing a schematic structure of the image reader 1. The image reader 1 is provided with a document table glass 2 on the upper surface of a rectangular parallelepiped housing, on which an A2 size document can be placed at the maximum, and the placed document is pressed by a document cover 3. There is. A reference pattern 14 formed of a white image for shading correction is provided at the front end of the platen glass 2 in the scanning direction.

Inside the housing, there is an optical system arranged below the platen glass 2 so as to scan a document image in the direction of arrow M5 (sub scanning direction), and image data corresponding to the density or color of the document image. An electric circuit unit 12 for generating is provided.

The optical system comprises an exposure lamp 4, a reflecting mirror 5, a first slider 13 having a mirror 6, a second slider 13a having mirrors 7 and 8, a main lens 9 and the like. When the moving speed of the first slider 13 is v,
The second slider 13a is drive-controlled so as to move at a speed of v / 2.

The scanning light that has passed through the main lens 9 enters two image sensors 10a and 10b mounted on the support member 11 and capable of reading A3 size, and is converted into an electric signal (image signal). Image sensor 10a, b
Is composed of a plurality of CCD chips arranged so as to be continuous in the main scanning direction (line direction), and 400 pixels /
The original can be read at a resolution of inch. A large number of light receiving elements are arranged in one row on each CCD chip, and each light receiving element is divided into three regions.
One divided area is R (red), G (green), B
A spectral filter is provided on the surface of each light receiving element so as to receive light of one of the three colors of (blue). One light receiving element corresponds to one pixel of the original image, and an image signal corresponding to the reflected light intensity for one color of the pixel is output from each light receiving element to the electric circuit section 12.

FIG. 1 is a block diagram of the electric circuit section 12 of the image reader 1 according to the present invention. The electric circuit section 12 is
Image signals from the two image sensors 10a and 10b are separated into R, G, and B color signals to perform predetermined amplification 2
Two color separation units 21a and 21b, A / D analog signals of each color
8-bit image data Dm7-0 converted (quantized)
Two digitization processing units 22 that output (m = 0, 1)
a, b, two shading correction units 23a for correcting light amount unevenness of the image data Dm7 to 0 in the main scanning direction and variations between bits of the image sensors 10a and 10b.
b, an image discrimination unit 25 that discriminates a binarized attribute and a color attribute,
Two density conversion units 26a and 26b for performing γ conversion according to the density level adjustment and the density characteristic (γ characteristic) of an externally connected device, an image processing unit 28 for performing image processing including image editing processing and binarization processing, data Image data output from an output control unit 29 for controlling output, an attribute memory 30 that stores designated attribute data a2 to 0, an attribute data output control unit 31, a clock generation circuit 41, and two shading correction units 23a and 23b. A line memory 24 for storing one line of Dm17 to 10 (m = 0, 1), a sync signal generator 40 for outputting various sync signals to each part, a lamp controller 4a for controlling the lighting of the exposure lamp 4, a scan. It is composed of a driver 16a for driving the scanner motor 16 for CPU, a CPU 20 for controlling all of these, and the like.

The CPU 20 has a ROM 20a storing a processing program, and a register 2 for temporarily storing various flags and status data when the program is executed.
0b and RAM 20c are built in. CPU20
Is various commands (control command code data) with an external host device equipped with operating means by an operator.
And designated attribute data a2 for defining image editing and binarization processing prior to reading a document based on the received command by performing communication for passing data indicating the operation state (status) of the image reader 1. 0 is generated and stored in the attribute memory 30.

In the image reader 1, the designated attribute data a0, a1, a2 are data for defining binarization processing, negative / positive inversion, and trimming, respectively. The sync signal output from the sync signal generator 40 is a horizontal sync signal H output for each line of main scanning.
There are SYNC, a pixel clock signal SYNCK that serves as a reference of data transmission timing for each pixel, an enable signal VD that indicates a valid period of data output from the image reader 1, and the like.

The image discriminating section 25 discriminates whether or not the character area and the photograph area of the image or the designated portion for color editing. Discrimination attribute data α0 output from the image discrimination unit 25
Is set to "0" when the divided area E to be discriminated corresponds to a character image (character area), and a halftone image (photo area)
When it corresponds to, it is set to "1". Further, the discrimination attribute data α1 is set to “1” when the segmented area E to be discriminated corresponds to the specific color, and is set to “0” when it corresponds to a color other than the specific color.

FIG. 3 is a block diagram of the image processing unit 28. The image processing unit 28 includes two image sensors 10
In order to process the image signals input from a and b, the scaling units 280a and 280, the filtering units 281a and b, the one-line combining / separating unit 282, and the trimming masking unit 283.
a, b, simple binarization processing units 284a, 284b, pseudo halftone processing units 285a, 285b, data selection unit 286, selector 28
7a, b, a negative processing section 288a, b, and a line composition section 289.

The image processor 28 includes a density converter 26a,
2 system image data Dm27 to 20 (m = 0,
1) are serially input in the pixel arrangement order. The input image data Dm27 to 20 are first subjected to a scaling process by the CPU 20 in the scaling units 280a and 280b. Next, the filtering unit 281
In a and b, processing for image quality improvement such as edge enhancement and smoothing is performed, and image data Dm37-3
It is output as 0 (m = 0, 1).

Next, in the 1-line synthesizing / separating unit 282, the image data D of the two systems which have been divided into two (line division) in the main scanning direction by the image sensors 10a and 10b.
m37 to m30 are pixel-divided into an image signal of an odd pixel and an image signal of an even pixel for each line in the main scanning direction. Image data DO47 divided into odd number pixels and even number pixels
40 and DEs 47 to 40 are processed by dedicated processing units, respectively, and finally the line synthesis unit 289.
Are integrated into one image data DIDEO0-7.

FIG. 4 is a block diagram of the 1-line synthesis / separation unit 282. The 1-line synthesis separating unit 282 includes the separating unit 51.
1, 512, address generation control unit 513, storage unit 514
To 517, and selectors 518 and 519.

The separation units 511 and 512 convert the two-system image data Dm37 to 30 for each line output from the two filtering units 281a and 281 into image data of odd pixels and image data of even pixels, respectively. It is separated into a total of four types of image data.

The storage units 514 to 517 are composed of a RAM having a capacity of one line, store image data according to the write address from the address generation control unit 513, and read the stored image data according to the read address. Output to the selectors 518 and 519. Note that the storage unit 514 has an even-numbered pixel in the first half of one line, the storage unit 515 has an odd-numbered pixel in the first half of one line, the storage unit 516 has an even-numbered pixel in the second half of one line, and a storage unit 517.
Stores the odd-numbered pixels in the latter half of one line.

The selectors 518 and 519 switch the image data output from the storage units 514 and 516 or the storage units 515 and 517, respectively, according to the selector switching signal datach, and the image data DE47 to DE47 of even-numbered pixels over one line. Image data DO47 of 40 and odd pixels
Output as ~ 40.

FIG. 5 is a block diagram of the separation units 511 and 512, and FIG. 9 is a timing chart showing the signal states of the respective units of the separation units 511 and 512. Separation unit 511, 512
Is a frequency divider 60 that divides the pixel clock signal SYNCK into halves and outputs a clock signal 1 / 2SYNC.
1 and a D-type latch 602 for delaying the timing of the image data Dm37 to 30 by one pixel clock signal SYNCK, and latches 603 and 604 that latch and output the image data Dm37 to 30 every other pixel. ing.

The odd-numbered (1, 3, 5, ...) Pixels of the image data Dm37 to 30 are latched by the latch 604 in synchronization with the clock signal 1 / 2SYNC. Further, the image data Dm 37 to 30 are latched 602.
Is delayed by one (one pixel) of the pixel clock signal SYNCK, so that the even-numbered (2, 4, 6, ...
The (th) pixel is latched by the latch 603.

Therefore, from the latch 604, the image data Dm37 to 30 of the odd-numbered pixels are latched.
Image data Dm37 to 3 for even-numbered pixels from 3
0 is output respectively.

As described above, the image data Dm37 to 30 of the two systems separated into the odd pixel and the even pixel are temporarily stored in the storage units 514 to 517, and then the odd pixels are selected by the selectors 518 and 519. Line integration is performed for each and every even pixel.

Here, the necessity of line integration will be briefly described. FIG. 16 shows a document DR and an image sensor 10.
FIG. 17 is a diagram showing a positional relationship with a and b, and FIG. 17 is an image DRS obtained by reading the document DR with the image sensors 10a and 10b.
FIG. 18 is a diagram showing a and b, and FIG. 18 is an image sensor 10 a and b.
It is a figure which shows the image DRSg at the time of simply combining the images DRSa and b read by.

In order to facilitate position adjustment of the two image sensors 10a and 10b, one end portion of the reading area of each image sensor 10a and 10b overlaps each other, and the other end portion of each of the two image sensors 10a and 10b is the original. It is arranged so as to cover the outside of the DR more widely.

Therefore, the image at the center of the document DR is
Since the image sensors 10a and 10b read the image overlaid, if these are simply added, the continuity is lost at the center of the image DRSg as shown in FIG. In order to prevent this, the outputs of the image sensors 10a and 10b are switched with a specific pixel in the center as a boundary and one of the dulled images is deleted. Line integration does this.

FIG. 6 is a block diagram of the address generation control unit 513, FIGS. 10 and 11 are timing charts showing states of signals of each unit of the address generation control unit 513, and FIG. 12 is a signal of each unit of the 1-line synthesis separation unit 282. 3 is a timing chart showing the state of FIG.

The address generation control section 513 comprises a write counter 611, a discharge counter U612, a discharge counter D613, and a counter switching section 614.

The write counter 611 has a clock signal 1 / 2SY having a half cycle of the pixel clock signal SYNCK.
NCK is counted, and the storage unit 5 is counted according to the count value.
The write addresses 14 to 517 are designated. The write counter 611 is reset to "0" by the horizontal synchronization signal HSYNC output for each line.

The ejection counter U612 and the ejection counter D613 are C by the horizontal synchronizing signal HSYNC.
Each count initial value from PU20 is set,
The pixel clock signal SYNCK is counted from the set value. The initial value CONTU is set in the discharge counter U612.
However, the initial value CONTD is set in the ejection counter D613.
Are set respectively. Initial value CONT, CONT
D is the image sensor 10a, 10b, as will be described later.
Is the pixel number in.

One of the discharge counters U612 performs a counting operation when the counter switching signal CONCH output from the counter switching unit 614 is ON, and the other of the discharge counters D613 has a counter switching signal COCH.
The counting operation is performed when the NCH is off. The boundary position at which the counter switching signal CONCH is changed from ON to OFF is substantially the center of the portion where the image sensors 10a and 10b overlap.

A selector switching signal dataach for switching the selectors 518 and 519 for switching the image sensors 10a and 10b to perform line integration is output almost in synchronization with the counter switching signal CONCH.

That is, in FIG. 4, one selector 518 has a storage unit 5 storing image data of even-numbered pixels.
14, 516 are connected to the other selector 519,
Storage units 515 and 517 storing image data of odd-numbered pixels
Are connected, and from each selector 518, 519,
The storage unit 51 responds to the selector switching signal dataach.
Image data read from the storage unit 51
The image data read from 6, 517 are output as image data DE47-40 and DO47-40, respectively.

That is, the selectors 518 and 519 are connected to the image sensors 10 from the storage units 514 and 515, respectively.
When the pixels of the overlapping portions of a and b are being read, the selector switching signal datach is switched to switch to the image data read from the storage units 516 and 517, and this makes it continuous over one line. Image data of even-numbered pixels DE47-4
Image data DO47 to 40 of 0 and odd pixels are output.

In the example shown in FIG. 11, the ejection counter U
The CPU 20 sets "95" as the initial value CONT by the CPU 20, and starts counting when the counter switching signal CONCH is turned on (FIG. 11A), and the discharge counter D613 is initialized by the CPU 20 by the initial value CO.
"57" is set as NTD, and counting is started by turning off the counter switching signal CONCH [FIG. 11 (b)].

In the example shown in FIG. 12, the selector 51
8, 519 outputs the image data of the 395th pixel read by one of the image sensors, next outputs the image data of the 57th pixel read by the other image sensor, with the selector switching signal dataach turned off. ing.

Thus, the two image sensors 10
Image processing of the image signals read by a and b is performed in parallel for each sensor, divided into odd pixels and even pixels, and integrated over one line in the main scanning direction, and subsequent image processing is performed with odd pixels and even pixels. By dividing into pixels and performing parallel processing, it is possible to secure the same processing speed as in the case where image processing is simply integrated so as to be serial without dividing into odd pixels and even pixels without increasing the clock rate.

Now, a method of integrating the odd-numbered pixels and the even-numbered pixels into one line in the main scanning direction will be described in detail. FIG. 19 shows an image DR1 of a document and images DR1U and DR1D stored in the storage units 514 to 517.
It is a figure which shows the relationship with and typically.

An image of the alphabet "A" is drawn on the entire surface of the original document DR1, and two image sensors 10 are provided for each line (vertical direction in FIG. 19).
Read by a and b. The upper image DR1U is stored in the storage units 514 to 517 of the 1-line synthesis separating unit 282 described above.
And image data corresponding to the lower image DR1D is stored. The upper image DR1U and the lower image DR1D are at the same size.

From the image sensors 10a and 10b to the storage unit 5
Due to the delay from 14 to 517, the storage unit 514
Offset area EO at the beginning of the address
FS occurs, and the read image data is stored after the offset area EOFS. Therefore, if the image processing circuits having the same configuration are used for the respective storage units 514 to 517, a = d, which can be experimentally (designed) given.

[B] which is the center position of the image DR1
And “e” are numerical values given by design. Here, assuming that the number of data (the number of pixels) required after line integration is Y (for example, 6214 pixels for A2 size of 400 dpi and 7200 pixels for 18 × 24 inch), the CPU 20 causes the counter switching unit 61.
The numerical value DATC set to 4 is expressed by the following equation (1).

DATC = Y / (2 × 2) = Y / 4 (1) That is, one half of the required number Y of pixels is the number of pixels shared by one of the image sensors, and odd and even pixels. Since the processing is performed separately for each pixel, the numerical value DATC is further halved.

A discharge counter U61 that controls the output of image data of the image DR1U from the CPU 20.
2 and the setting values (initial values) CONTU and CONTD set for the ejection counter D613 that controls the output of the image data of the image DR1D are the following (2).
It is shown by the equation (3).

CONTU = b−Y / 4 (2) CONTD = e (3) Here, since “b” and “e” have been separated into the odd pixels and the even pixels, it is halved. You don't have to.

In this way, one line integration can be performed while dividing the image signals read by the two image sensors 10a and 10b into odd pixels and even pixels. Next, a case where the reduction / magnification is performed will be described.

FIG. 20 shows images DR1RU and DR1 stored in storage units 514 to 517 by reducing the image DR1 of the original.
It is a figure which shows RD typically. In FIG. 20, the offset area EOFS is generated regardless of the scaling factor M, that is, whether it is reduced or enlarged, and has a constant value. Therefore, the values of “a” and “d” are the same as those at the same magnification. Is. That is, a = d = const, whereas “b1” and “c
The respective values of “1”, “e1”, and “f1” are variable magnifications M (M
Corresponding to <1), it is expressed by the following equations (4) to (7).

B1 = (b−a) × M + a (4) c1 = (c−a) × M + a (5) e1 = (ed−d) × M + d (6) f1 = (f− d) × M + d (7) Therefore, the set values CONT, CO when line integration is performed
The NTD is expressed by the following equations (8) and (9).

CONTU = b1−Y / 4 (8) CONTD = e1 (9) Next, the case where enlargement / reduction is performed will be described.

FIG. 21 is a diagram schematically showing the relationship between enlarged images DR1EU and DR1ED of the original image DR1 and images DR1EUa and DR1EDa stored in the storage units 514 to 517.

In the case of enlargement, a problem different from the above occurs. That is, the enlarged image DR1EU extends downward because it is enlarged, and “b” corresponding to the center position of the image DR1 is extruded from the address areas of the storage units 514 to 517 and disappears. .. Further, in the image DR1ED that has been enlarged, the image data of the required number of pixels has overflowed from the address areas of the storage units 514 to 517. Such a phenomenon occurs when the magnification ratio M is high.

If these images DR1EU and DR1ED are simply line-integrated, the image DR1 becomes a separated image with the central part missing, and the lower part of the image DR1 becomes a missing image. In order to prevent this, the image data Dm37 to Dm37 to 30 after the scaling processing are included in the image data Dm37 to Dm37 to include the pixels at the boundary between the images DR1EU and DR1ED. The storage unit 514-
The shift process of writing to 517 may be performed.

Now, in the images DR1EU and DR1ED, the respective values of "b2", "c2", "e2" and "f2" correspond to the scaling factors M (M> 1), and the following (10) to (1)
It is shown by the equation 3).

B2 = (b−a) × M + a (10) c2 = (c−a) × M + a (11) e2 = (ed−d) × M + d (12) f2 = (f− d) × M + d (13) Then, in what kind of case it is necessary to perform the shift process is the following case. That is, the storage unit 514
If the final address of ˜517 is “X”, the image DR1
The central position of the area is out of the address area of the storage sections 514 to 517 when b2> X, and the address area for storing the image data of the required number of images in the storage sections 514 to 517. The shortage occurs when (X−e2) <Y / 4.

In such a case, shift processing is required. The shift amounts QS1 and QS2 for the images DR1EU and DR1ED are expressed by the following equations (14) and (15).

QS1 = b2-X + α (14) QS2 = Y / 4- (X-e2) + β (15) Here, the shift amounts QS1 and QS2 are usually different from each other. Note that α and β are constants for taking a margin area. By performing such shift processing, as shown in the images DR1EUa and DR1EDa, image data of the central portion (boundary portion) of the image DR1 and the required number of images are stored in the storage units 514 to 517.

Therefore, in this case, the set values CONTU and CONTD for line integration are as follows (16)
It is shown by the equation (17). CONTU = b2-Y / 4-QS1 (16) CONTD = e2-QS2 (17) Next, the set value CONT corresponding to all the scaling factors M is set.
Consider an equation corresponding to U and CONTD. The expressions (4) and (10), and the expressions (6) and (12) are different only in the range of the value of the scaling factor M. Therefore, at the same size (M =
In case of 1), if they have the same formula, all can be expressed by one formula.

B = b−a + a = 1 × b−1 × a + a = (b−a) × 1 + a = (b−a) × M + a (however, M = 1) e = ed−d + d = 1 × e−1 × d + d = (e−d) × 1 + d = (e−d) × M + d (where M = 1) When the shift amount is not shifted, QS1 = QS2 =
It is considered to be 0. Therefore, the set values CONTU, CONTD
Are respectively expressed by the following equations (18) and (19).

CONTU = (b−a) × M + a−Y / 4−QS1 (18) CONTD = (e−d) × M + d−QS2 (19) In this way, two image sensors are formed. Even if the original is read using the two lines, and the lines are combined after performing the scaling processing, the same effect as when the original is read using one image sensor and the image processing of one line is applied. Can be obtained.

Returning to FIG. 3, when the data a2 is "1" in the trimming / masking parts 283a, b according to the designated attribute data a2, the masking process is forced to "0" corresponding to the blank part. When the data a2 is "0", the data is directly output from the trimming / masking units 283a and 283b (data through).

The image data output from the trimming / masking units 283a and 283b is processed by the simple binarization processing unit 284.
a and b and 2 in the pseudo halftone processing units 285a and 285b respectively.
Binarized image data DOA, DOB, DEA, D
EB is simultaneously input to the selectors 287a and 287b.

Next, the pseudo halftone processing units 285a and 285b will be described in detail. FIG. 7 shows the pseudo halftone processing unit 285.
13 is a block diagram of a and b, and FIG. 13 is a pseudo halftone processing unit 285.
FIG. 14 is a timing chart showing the operation state of the counters 622 of a and b, FIG. 14 is a timing chart showing the state of the signals of each part of the pseudo halftone processing units 285a and 285b, and FIG. FIG. 23 is a diagram showing an example of DM, FIG. 23 is a diagram showing a relationship between addresses of dither ROMs 623 and 624 and window numbers, and FIG. 24 is a dither RO.
It is a figure which shows the memory content of M623,624 by a window number.

In FIG. 22A, numbers (numbers are referred to as "window numbers") are assigned to pixels in ascending order of threshold. FIG. 22B shows a threshold value when the pixel actually has a gradation property of 8 bits, and this threshold value is stored in the dither ROMs 623 and 624.

In FIG. 7, the pseudo halftone processing unit 285 is used.
Each of a and b includes counters 621 and 622, a dither ROM 623 for odd pixels, a dither ROM 624 for even pixels, and comparators 625 and 626.

The counter 621 is an up counter with a data input terminal which counts up at the rising edge of the clock, and counts the pixel clock signal SYNCK. The data input terminal LD is connected to GND, and therefore, "0" is set when the horizontal synchronizing signal HSYNC is input.

The counter 622 is a counter which counts up at the falling edge of the clock and counts the horizontal synchronizing signal HSYNC. That is, these counters 621 and 622 respectively count the number of pixels or the number of lines in the main scanning direction and the sub scanning direction.

The lower 3 bits of the counter 621 are connected to the addresses A1 to A3 of the dither ROMs 623 and 624, and the lower 4 bits of the counter 622 are the dither RO.
It is connected to the addresses A4 to A7 of M623 and 624. In addition, the address A0 of the dither ROM 623, 624
Are respectively connected to GND or VCC (5V),
As a result, the data "0" or "1" is always input.

The comparators 625 and 626 have outputs from the dither ROMs 623 and 624, image data DO57 to 50 of odd-numbered pixels and image data DE57 to 5 of even-numbered pixels.
0 is input, and these values are compared and binarized.

Here, the dither ROMs 623 and 624 will be described in detail with reference to FIGS. 23 and 24. Each dither ROM 623, 624 has a storage capacity of 256 bytes. In the case of the 16-gradation dither matrix DM, since it can be decomposed into four matrices in the main scanning direction and four matrices in the sub-scanning direction, a storage capacity of at least 16 bytes is sufficient. Therefore, dither ROMs 623, 6
Each of the 24 can store 16 dither matrices DM.

In order to realize the dither matrix DM shown in FIG. 24, threshold values are stored in the dither ROMs 623 and 624 according to the relationship between the address and the window number shown in FIG. 23A, and the lower 4 bits A0 to A3 of the address are stored. A counter for counting the number of pixels in the main scanning direction may be connected to, and a counter for counting the number of lines in the sub scanning direction may be connected to the upper 4 bits A4 to 7 of the address.

In the case of the parallel processing of this embodiment, the window numbers of the odd-numbered rows in the main scanning direction of FIG. 24 are compared with the image data DO57-50 of the odd-numbered pixels, and the window numbers of the even-numbered rows are compared. Should be compared with image data DE57 to 50 of even pixels. The dither ROMs 623 and 624 naturally store threshold values according to addresses and window numbers.

With reference to FIGS. 7, 13 and 14, the counter 622 is a ring counter for counting the number of lines in the sub-scanning direction. The counter 621 counts up according to the pixel clock SYNCK, and for each line,
The window number 9 is to the left of the window number 14, the window number 2 is to the left of the window number 8, the window number 5 is to the left of the window number 10, and so on. It is a ring counter whose count value becomes "0" by HSYNC.

As described above, the dither RO for odd-numbered pixels
Since the address A0 of M623 is fixed to "0" and the address A0 of the dither ROM 624 for even pixels is fixed to "1", the lower 4 bits of the address of the dither ROM 623 are 0, 2, 4, 6 ,. 8, A, C, E, 0, 2
... (hexadecimal), and the lower 4 bits of the address of the dither ROM 624 are 1, 3, 5, 7, 9, B,
It changes like D, F, 1, 3.

Therefore, the dither ROM 623 is the same as that shown in FIG.
4, the dither ROM 624 outputs the window number threshold values of the odd-numbered rows in the main scanning direction, and the dither ROM 624 outputs the window number threshold values of the even-numbered rows.

As a result, even if the image data is divided into the odd-numbered pixels and the even-numbered pixels and the parallel processing is performed, the halftone processing can be easily performed. Further, it goes without saying that pseudo halftone processing of various gradations such as 64 gradations or 256 gradations can be performed by taking a similar method.

In this embodiment, the dither ROM 62 is also used.
Dither ROM that uses the same contents of 3,624
By manipulating the addresses given to 623 and 624, it is possible to correspond to odd-numbered pixels and even-numbered pixels.
Dither ROM 623 is for odd pixels, dither ROM 624
Is for even pixels, and dither ROMs 623, 62
The same effect can be obtained even if the contents of 4 are dedicated and addresses to them are given as in the conventionally known one-system processing.

Returning to FIG. 3, the selectors 287a, 287b output the binary image data DOA, DOB or DEA, DE according to the output data DSEL0 from the data selection unit 286.
One of B is selected and output.

The data selection section 286 is added with the above-mentioned discriminant attribute data α0 obtained by automatically discriminating the binarized attribute, and the designated attribute data a0 for controlling the binarizing process. The value of the output data DSEL0 is determined according to the value of a0. That is, if the data a0 is "0", the discrimination attribute data α0 is output as it is as the output data DSEL0, and if the data a0 is "1", the inverted data of the discrimination attribute data α0 is output.

That is, the image processing section 28 uses the data a0.
Is “0”, the external designation of the binarization process is defaulted, and the binary image data based on the automatic discrimination of the binarization attribute by the image discriminating unit 25 is output, and the data a0
Is "1", the binary image data subjected to the binarization processing opposite to the result of the automatic discrimination of the binarization attribute is output.

If the designated attribute data a1 is "0", the negative processing units 288a and 288 use the raw binary image data input from the selectors 287a and 287b, and if the data a1 is "1", the The binary image data obtained by inverting is output as binary image data DONP, DENP.

FIG. 8 is a block diagram of the line synthesizing unit 289,
FIG. 15 is a timing chart showing the signal states of the respective parts of the line synthesizing part 289. The line synthesizing unit 289 uses the serial-in parallel-out shift registers 631, 6
32 and a D-type latch 633.

The shift registers 631 and 632 respectively shift the input binary image data DONP and DENP in synchronization with the pixel clock signal SYNCK, and output in parallel every 4 bits.

The latch 633 is for each shift register 63.
4-bit data output from 1,632 is input from the shift register 631 as odd-numbered data,
It is input as even-numbered data from the shift register 632, and latches them in synchronization with the clock signal ¼SYNCK having a quarter cycle of the pixel clock signal SYNCK. As a result, the binary image data DONP and DENP separated into the odd pixels and the even pixels are combined and output as 8-bit parallel image data VIDEO0 to VIDEO7.

The attribute data output control section 31 outputs the 5-bit attribute data a4-0 by combining the discrimination attribute data α0, α1 and the designated attribute data a2-0. The output control unit 29, in accordance with the output control data C0 to 1 from the CPU 20, outputs the image data VIDEO 0 to 7 or the attribute data a4.
~ 0 is selected and output as output data DATA.

As described above, in the image reader 1, the document DR is made by the two image sensors 10a and 10b.
Color separation, quantization, shading correction, density conversion, scaling, and filtering are performed in parallel on the two-system image signals obtained by reading the image of the above image by line division, and one line is synthesized. The separation unit 282 performs line integration and pixel division, and performs trimming processing, masking processing, simple binarization processing, and pseudo processing on image data of two systems divided into image data of odd-numbered pixels and image data of even-numbered pixels. The halftone processing and the negative processing are performed in parallel, and the line synthesizing unit 289 synthesizes them.

Therefore, the overall processing speed in the image reader 1 is improved, and the processing speed is almost doubled even in the pseudo halftone processing which requires a long time for processing. Can read the original image at high speed.

In performing the parallel processing by the two systems of pseudo-halftone processing units 285a and 285b, one line is not divided into the first half and the second half, but a set of image data of odd-numbered pixels in each line is used. Since the pixel is divided into a certain odd-numbered pixel block (image data DO57 to 50) and an even-numbered pixel block (image data DE57 to 50) that is a set of image data of even-numbered pixels, the image density or the color tone is the whole of the original image. , And excellent image quality can be obtained.

That is, for example, when the lines are divided into the first half and the second half and the pseudo halftone processing is performed in parallel, the image density or the color tone is different between the first half and the second half, and the image is changed. The quality may be significantly reduced.

Further, the image data DO57 to 5 of odd-numbered pixels
For image data DE57 to 50 of 0 and even pixels,
Since the pseudo halftone processing is performed using the threshold values stored in the odd-numbered and even-numbered addresses of the same dither ROMs 623 and 624 in the main scanning direction, the two pseudo-gradation processings are performed in parallel with a simple configuration. Can be easily performed.

In the above-described embodiment, one pixel such as an odd pixel and an even pixel is used as a basic unit, and the pixel block is divided into two pixel blocks which are repeated every other pixel. A plurality of pixels, such as 4 pixels at a time, is used as a basic unit and divided into two pixel blocks that are repeated every plurality of pixels, or 1, 2, 3, 4, 1, 2, ...
.. is divided into four pixel blocks repeated every 3 pixels, such as 1 pixel as a basic unit, and divided into an arbitrary number of pixel blocks repeated every arbitrary basic unit with an arbitrary number of pixels as a basic unit. be able to.

Next, the operation of the image reader 1 will be described with reference to the flowcharts of FIGS. Figure 25
Is a main flowchart schematically showing the operation of the CPU 20.

When the power is turned on and the program starts, first, in step # 1, initialization is performed. In step # 2, the presence or absence of a command from the host device is checked. If there is a command, the type of the command is judged (step # 3), and the reading process (step # 4), the reading mode designating process (step # 5), depending on the type,
Attribute designation processing (step # 6) and output data designation processing (step # 7) are executed.

After that, other processing (step # 8) is executed, the process returns to step # 2, and steps # 2 to #
The process of 8 is repeated. FIG. 26 is a flowchart of the reception process, and FIG. 27 is a flowchart of the transmission process.

These routines are interrupt routines and are executed at appropriate times according to access from the host device. In the reception processing of FIG. 26, first, code analysis of the received signal (step # 11) is performed, and then step # 1
When it is confirmed that the command has been received in step 2, the received command is stored in a predetermined area in the register 20b (step # 13).

If the received signal requests the notification of the status (step # 14), the register 20 stores the data indicating the status such as the standby status and the wait status.
It is read from b and transmitted to the host device.

If the received signal does not correspond to any of the predefined command and status request, the code data indicating the reception error is transmitted (step # 16).

In the transmission process of FIG. 27, the system waits until the previous transmission is completed and the next transmission becomes possible (step # 2).
1) The code data to be transmitted is set in the register 20b (step # 22).

Then, in step # 23, it is checked whether or not there is code data to be subsequently transmitted, that is, the necessity of transmission, and if transmission is necessary, the process returns to step # 21. Figure 2
8 is a flowchart of the initial setting in step # 1 of FIG.

First, as the status, "WAIT" indicating that the reading scan is in the process of being set is set. That is, the data corresponding to "WAIT" is stored in the status area in the register 20b (step # 31).

Next, in step # 32, a self-test for checking whether or not each part operates normally is performed. In step # 33, the presence or absence of an abnormality is checked. If there is an abnormality, the process proceeds to step # 37 and the inoperable code is transmitted to the host device.

If there is no abnormality, the process proceeds to step # 34,
Initialize each part. At this time, "0" is written in the attribute memory 30 as the designated attribute data a0, a1, a2. Therefore, unless the designated attribute data a2 to 0 are rewritten thereafter, the image processing unit 28 does not perform image editing such as trimming and negative / positive inversion, and the binarization processing is performed based on the discrimination attribute data α0. Will be seen.

In the density converter 26, the standard density is set, and in the output controller 29, the image data VIDEO0-7 and the attribute data a4-.
The input of the selector is selected so that 0 is output alternately.

After these initializations, step # 35
Then, the first slider 13 is moved to the home position, and when the movement is completed, the status is set to "WAI" in step # 36.
Change from "T" to "READY" indicating a standby state.

FIG. 29 is a flow chart of the above-mentioned reading process. First, the status is set to "BUSY" indicating that the reading is in progress (step # 41), and the exposure lamp 4
Is turned on (step # 42).

Next, the scanner motor 16 is turned on (step # 43) and the first slider 13 waits until it reaches the shading position, that is, the position immediately below the reference pattern 14 (step # 44).

When the first slider 13 reaches the reference pattern 14, the reference pattern 14 is adjusted for shading correction.
Is read and the reference image data (white data) is stored in the line memory 24 (step # 45).

Then, in step # 46, the process waits for the first slider 13 to reach the leading end position of the document, and then in step # 4.
At 7, the sync signal generator 40 is turned on to output the sync signal. As a result, each unit operates according to the synchronization signal, and as described above, valid image data VIDEO0 to VIDEO7 and attribute data a4 to 0 are alternately output after the scanning of the ninth line is started.

Waiting for the end of scanning of the original, that is, for the first slider 13 to reach the rear end position of the original (step # 4).
8), turn off the synchronization signal generator 40 (step # 4
9), the scanner motor 16 is once turned off (step # 5
0), the exposure lamp 4 is turned off (step # 51).

Then, the scanner motor 16 is rotated in the reverse direction to return both sliders 13 and 13a (step # 5).
2) Wait for the first slider 13 to return to the home position (step # 53), turn off the scanner motor 16 (step # 54), and finally set the status to "READY" in step # 55.

FIG. 30 is a flow chart of the read mode designation processing in step # 5 of FIG. Step # 6
In step 1, the status is set to "WAIT" and step # 62.
And check the parameters contained in the command,
Depending on the parameter, density designation (step # 63), scaling factor designation (step # 64), or other designation (step # 65) for designating an output target device is executed. Then, in step # 66, the status is changed to "READ.
Return to "Y".

FIG. 31 is a flow chart of the magnification change designation process of step # 64. First, the designated scaling factor M is set in the scaling units 280a and 280b (step # 641).
Next, referring to the above-mentioned conditions, the variable power unit 280a,
In b, it is determined whether or not the shift processing is necessary (step # 642), and if the shift processing is necessary, the shift amount QS
1 and QS2 are set (step # 643).

Next, the numerical value DATC is set from the CPU 20 to the counter switching unit 614 (step # 644), and the specified scaling factor M, the set shift amounts QS1 and QS2,
And initial values CONTU, CONTD based on the design value
Is calculated according to the above equation, and the ejection counter U612
And the ejection counter D613 are set (steps # 645 and 646).

FIG. 32 is a flowchart of the density designation processing in step # 63. At step # 71, it is checked whether the density designation method is automatic. If the designation method is other than automatic, the process proceeds to step # 74, where the density conversion units 26a and 26b are set according to the parameters sent from the host device based on the designation operation by the operator.

If it is determined to be automatic in step # 71, preliminary scanning for detecting the density of the original is performed in step # 72, and the image data Dm17 to 10 sequentially stored in the line memory 24 are stored in the RAM 20c in a timely manner. take in. Then, in step # 73, the density of the document is detected based on the data of the RAM 20c, and then the process proceeds to step # 74, and the density conversion units 26a and 26b are set according to the detection result.

FIG. 33 is a flow chart of the attribute designation process of step # 6. First, set the status to "WAIT"
Then, the correctness of the designation is checked (step # 81) (step # 82).

If the designation is not correct, for example, if a region outside the reading range is designated or if the order of coordinate designation is incorrect, the process proceeds to step # 85 and an error code is transmitted to the host device.

If the designation is correct, the attribute data writing process for writing the designated attribute data a0, a1, a2 to the attribute memory 30 is executed (step # 83), and the status is set to "READY" (step # 84). ).

FIG. 34 is a flow chart of the attribute data writing process of step # 83. In step # 91, the type designated by the host device is checked, and each process of step # 92 to step # 98 is executed according to the type.

That is, when the automatic discrimination of the binarized attribute is designated, the designated attribute data a0 is set to "0" in the designated divided area E in step # 92. If the binarization attribute is designated in advance, in step # 93,
For the designated segmented area E, the designated attribute data a0 is set to "1".

If the positive designation, that is, the designation that black-and-white inversion is not performed is made, the designated attribute data a1 is set to "0" in the designated sectioned area E in step # 94. On the other hand, if the negative is designated, that is, if the black-and-white inversion is designated, step #
At 95, the designated attribute data a1 of the designated segmented area E is set to "1". If trimming is designated, the designated attribute data a2 is set to "1" except for the designated partitioned area E in step # 96, and if masking is designated, it is designated in step # 97. For the segmented area E, the designated attribute data a2 is set to "1".

When the trimming / masking cancellation is designated, the designated attribute data a2 is returned to "0" except for the designated sectioned area E in step # 98. FIG. 35 is a flowchart of the output data designation processing in step # 7.

In this routine, first step # 10
In step 1, the type of the output data DATA is checked, and steps # 102 to # 104 are performed according to the type. When only the output of the image data VIDEO0 to 7 is selected, the output control data C is output in step # 102.
Both 0 and C1 are set to "0".

When the output of only the attribute data a4 to 0 is selected, step # 103 is executed, the output control data C0 is set to "1", and the output control data C1 is set to "0".
It is said that.

When output of both the image data VIDEO0-7 and the attribute data a4-0 is selected,
In step # 104, the output control data C0 is set to "0" and the output control data C1 is set to "1".

In the above embodiment, the case where the line memory is the storage units 514 to 517 has been described.
For example, when the scaling units 280a and 280b have line memories, shift processing is performed in the scaling units 280a and 280b. The contents of the image processing performed before and after the 1-line combining / separating unit 282 can be variously changed. The configuration, timing, etc. of each part of the image reader 1 can be variously changed other than those described above.

[0134]

According to the present invention, it is possible to secure the continuity of the boundary portion of the image sensor and prevent the images from being separated at the boundary portion even when the enlargement / reduction is performed.

[Brief description of drawings]

FIG. 1 is a block diagram of an electric circuit unit of an image reader according to the present invention.

FIG. 2 is a sectional front view showing a schematic configuration of an image reader.

FIG. 3 is a block diagram of an image processing unit.

FIG. 4 is a block diagram of a 1-line combining / separating unit.

FIG. 5 is a block diagram of a separation unit.

FIG. 6 is a block diagram of an address generation control unit.

FIG. 7 is a block diagram of a pseudo halftone processing unit.

FIG. 8 is a block diagram of a line combining unit.

FIG. 9 is a timing chart showing a state of signals of each part of the separation part.

FIG. 10 is a timing chart showing a signal state of each unit of the address generation control unit.

FIG. 11 is a timing chart showing a state of signals of each unit of the address generation control unit.

FIG. 12 is a timing chart showing a signal state of each part of the 1-line combining / separating part.

FIG. 13 is a timing chart showing an operating state of a counter of the pseudo halftone processing unit.

FIG. 14 is a timing chart showing a signal state of each unit of the pseudo halftone processing unit.

FIG. 15 is a timing chart showing a state of signals of respective units of the line synthesizing unit.

FIG. 16 is a diagram showing a positional relationship between a document and an image sensor.

FIG. 17 is a diagram showing an image obtained by reading a document with an image sensor.

FIG. 18 is a diagram showing an image when images read by an image sensor are simply combined.

FIG. 19 is a diagram schematically showing a relationship between an image of a document and an image stored in a storage unit.

FIG. 20 is a diagram schematically showing an image reduced in size of an original document and stored in a storage unit.

FIG. 21 is a diagram schematically showing the relationship between an enlarged image of an original image and an image stored in a storage unit.

FIG. 22 is a diagram showing an example of a 16-gradation dither matrix used for normal processing.

FIG. 23 is a diagram showing a relationship between a dither ROM address and a window number.

FIG. 24 is a diagram showing stored contents of a dither ROM by window numbers.

FIG. 25 is a main flowchart schematically showing the operation of the CPU.

FIG. 26 is a flowchart of a reception process.

FIG. 27 is a flowchart of a transmission process.

FIG. 28 is a flowchart of initial setting.

FIG. 29 is a flowchart of a reading process.

FIG. 30 is a flowchart of reading mode designation processing.

FIG. 31 is a flowchart of a scaling ratio designation process.

FIG. 32 is a flowchart of a density designation process.

FIG. 33 is a flowchart of an attribute designation process.

FIG. 34 is a flowchart of an attribute data writing process.

FIG. 35 is a flowchart of output data designation processing.

[Explanation of symbols]

 1 image reader (image reading device) 10a, 10b image sensor 514-517 storage unit (line memory)

Claims (1)

[Claims] 1. An original image is subdivided into pixels and read by a plurality of image sensors arranged so as to be continuous in the main scanning direction, and image data of a plurality of systems obtained by the respective image sensors are processed in parallel. In the image reading device, when the image data of a plurality of systems is electrically enlarged and scaled in the main scanning direction and stored in the line memory, the image data of the pixels at the boundary between the image sensor and the image sensor And the image data having the number of images required for image reproduction are subjected to shift processing and stored in the line memory. Enlargement / magnification processing method in apparatus.