JPH0480845A - Integrated circuit device with built-in read/write enable rom - Google Patents

Abstract

PURPOSE:To inhibit the reading of the data on an optional address of a main body ROM from outside by providing a ROM register which is unable to initialize the contents of a register after the data are once written unless the data stored in the main ROM are erased. CONSTITUTION:When the external address designation inhibition data is inputted to a ROM register RR 14 from an external address designation inhibition control input terminal EAIC 15, the RR 14 generates an external address designation inhibition control signal to an external address input circuit EAC 12. The EAC 12 is unable to normally transmit the address data received from an external address input terminal 2 to a 2nd external address bus 13 nor to designate a normal address to a main body ROM 1. Therefore it is impossible for an external data input/output terminal 4 to normally read and write an address designated from outside to the ROM 1 via an external data bus 5. Furthermore the RR 14 is unable to initialize the contents of a register after the data are once written unless the data stored in the ROM 1 are erased.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention provides a read/write ROM that can arbitrarily prohibit external reading of ROM data at an externally specified address for ROM data written in the ROM.
This invention relates to an integrated circuit device with a built-in M.

Conventional technology In recent years, it has become possible for users to read and write ROM data1.
Chip integrated circuits have come into widespread use.

A conventional integrated circuit device with a built-in readable and writable ROM will be described below.

FIG. 2 is a configuration diagram of a conventional integrated circuit device with a built-in readable and writable ROM, where 1 is a readable and writable ROM that cannot be written to from outside unless the data in ROLi is erased once written, and 2 is a readable and writable ROM. External address input terminal that allows you to specify the ROM write and read address from the outside, 3 is the external address input terminal 2 to ROM 1
An external address bus transmits the hair address data. 4 is an external data input/output terminal that can input data from the outside to ROMI and output data from ROM1 to the outside. 5 is an external data input/output terminal that connects external data input/output terminal 4 and ROM1. 6 is a CPU that operates based on the data in ROMI, 7 is an internal address bus that specifies the address of ROM1 by CPU 6, and 8 is an internal bus that returns data specified by internal address bus 7 to CPU 6. It is a data bus.

The operation of the integrated circuit device having a built-in read/write ROhq configured as described above will be described below.

First, when the above-mentioned integrated circuit device is enabled to write to and read from the main body ROM1 from the outside, the main body ROM
By specifying the address of I, data can be read from or written to the ROM at the specified address via the external data bus 5 from the external data input/output terminal 4. However, once data is written in the main body ROMI, new data cannot be written from outside unless the data in the main body ROMI is erased.

Next, when the integrated circuit device is put into the normal operating state, the CPU 6 returns the data in the main body ROM l specified by the CPU 5 via the internal address bus 7 to the CPU 6 via the internal data bus 8. ROMI
operates according to the data.

Problems to be Solved by the Invention However, in the above-mentioned conventional configuration, if another user enables the above-mentioned integrated circuit device to write to and read from RO to 1 from the outside, the data in the ROM will be decoded. , there was a problem that confidentiality could not be maintained.

The present invention solves the above conventional problems, and aims to provide an integrated circuit device with a built-in readable and writable ROM that can arbitrarily prohibit reading of ROM data at an address specified by the user. .

Means for Solving the Problem To achieve this objective, the read/write RO of the present invention
An integrated circuit device with a built-in M has a ROM register whose register contents cannot be initialized without also erasing the main body ROM after writing is performed, and the ROM register prohibits arbitrary addressing of the main body ROM data from the outside. It is equipped with an external address input control circuit that can perform

Effect: This configuration allows the external address input control circuit to prohibit the specification of the main body ROM address arbitrarily from the outside, thereby making it possible to maintain the confidentiality of data in the main body ROM.

EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.

FIG. 1 shows a read/write RO in one embodiment of the present invention.
1 is a configuration diagram of an integrated circuit device with a built-in M.

In FIG. 1, 11 is a first terminal for transmitting address data from an external address input terminal to an external address input control circuit.
External address bus, 12 is connected to main unit R by external address.
An external address input control circuit that can arbitrarily inhibit addressing of OMI; 13 a second external address bus that transmits external address data from the external address input control circuit 12 to ROMI; 14 a second external address bus that transmits external address data from the external address input control circuit 12 to ROMI;
ROM register whose contents cannot be initialized without also erasing the data inside, 15 is the main body ROMI
16 is an external address designation prohibition control input terminal for disabling external address designation of the external address designation. This is an external address designation prohibition control line that controls the input control circuit 12 and prohibits designation of any ROM address using an external address.

Note that 1 is a readable/writable ROM in which, once written, new data cannot be written from outside unless the data in the ROM is erased; 2 is an external address input terminal; 4
is an external data input/output terminal, 5 is an external data bus, and 6 is a C
PU, 7 is an internal address bus, 8 is an internal data bus,
These configurations are the same as those of the conventional example.

The read/write RO of this embodiment configured as above
The operation of the integrated circuit device incorporating M will be described below.

First, when the integrated circuit device of the present invention is brought into a state where the main body ROMI can be read and written from the outside, unless external addressing inhibition data is input from the external addressing inhibition control input terminal 15 to the ROM register 14, the initial In this state, the ROM register 14 does not generate an external address designation inhibition control signal to the external address input control circuit 12, and the external address input terminal 2 is connected to the first external address bus 11. as in the conventional example. External address input control circuit 12, second
The address of the main body ROM 1 is designated via the external address 13, and data can be read and written to the ROM at the designated address at the external data input/output terminal 4 via the external data/N) path 5.

However, the external address specification prohibition control input terminal 15
When the external address designation prohibition data is inputted to the ROM register 14 from the ROM register 14, the ROM register 14 generates an external address designation prohibition control signal to the external address input control circuit 12. Therefore, the external address input control circuit 12 cannot properly transmit the address data input from the external address input terminal 2 via the first external address bus 11 to the second external address bus 13, and the address data is not transferred to the main body ROM1. It becomes impossible to specify a normal address.

Therefore, reading and writing to the ROM at an externally designated address cannot be performed normally at the external data input/output terminal 4 via the external computer bus 5.

The ROLi register 14 has a structure in which once it is written, the contents of the register cannot be initialized unless the data in the main body ROM 1 is also erased.

Next, when the integrated circuit device of the present invention is put into the normal operating state, the CP
By returning the data in the main body ROMI specified by U6 to the CPU 6 via the internal data bus 8, the C
The PU6 operates according to data in the main body ROMI.

In the above embodiment, in order to prohibit external address specification of the main body ROMI, an external address specification prohibition control input terminal 15 is provided, external address specification prohibition data is set in the ROM register 14, and the external address input control circuit 12 is controlled. However, by providing a register equivalent to the ROM register 14 in an area of the writable main body ROMI that cannot be accessed from the CPU 6, addressing in the main body ROMI is prohibited from the outside. Using the external address input terminal 2, access the ROM register in the area that cannot be accessed from the CPU 6, set external address designation prohibition data from the external address input/output terminal 4, and control the external address input control circuit 12 to control the ROMI. You may use a method of prohibiting the address from the outside.

Effects of the Invention The present invention is an RO that, once written, cannot initialize the register contents without also erasing the data in the main body ROM.
By providing an M register and an external address input control circuit that can prohibit external address specification of the main body ROM using the ROM register, data at arbitrary addresses in the main body ROM cannot be read externally, and the main body It is possible to realize an integrated circuit device with a built-in readable and writable ROM that can maintain the confidentiality of ROM data.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of an integrated circuit device with a built-in readable/writable ROM according to the present invention, and FIG.
FIG. 2 is a configuration diagram of an integrated circuit device with a built-in OM. 1...Readable/writable ROM, 6...
CPU. 12... External address input control circuit, 14...
...ROM register.

Claims (1)

[Claims] It has a built-in readable and writable ROM that is equipped with a ROM register whose contents cannot be initialized once written to without also erasing the main body ROM, and a circuit that can prohibit external specification of the main body ROM address using the ROM register. Integrated circuit device.