JPH06187520A - Ic memory card - Google Patents

Abstract

PURPOSE:To provide an IC memory card which can freely inhibit the writing or access operation and also can freely cancel these inhibition states to a specific memory area. CONSTITUTION:An IC memory card consists of a writing register 20 which writes the writing or access inhibition data or the writing or access inhibition cancel data, an address decoder 30 connected to the register 20, and an address comparator 40 which compares the address set on an address bus 12b led from an input/output terminal train 12 with the output of the decoder 30. Thus the writing or access operation can be freely inhibited or these inhibition states can be freely canceled to a specific memory area when the address of the bus 12b is compared with the output of the decoder 30. In such a constitution, the fixed data are never destroyed by the malfunctions or the misoperations. Then the reliability of the IC memory card is improved.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC memory card having a built-in readable / writable IC memory, and more particularly to a specific memory area which is write-protected, access-protected, write-protected released or access-protected released. The present invention relates to an IC memory card.

[0002]

2. Description of the Related Art Conventionally, in applications where an IC memory card is used as an auxiliary recording medium, there is an application in which a fixed area where data is not rewritten and a rewritable variable data area are used separately.

In order to realize this, (1) a fixed data IC memory card having a built-in read-only memory (ROM) as a fixed data area and a readable / writable memory (RAM) as a variable data area have been conventionally installed. Two variable data IC memory cards are used. (2) R
OM and RAM are built in one IC memory card.
(3) It is conceivable to write fixed data and variable data to an IC memory card having a rewritable IC memory built in, but in the case of (1) above, two IC memory cards are required and it is expensive. Not only two ICs at the same time
In order to use the memory card, there is a problem that the main body device requires two IC memory card insertion openings. Further, when a PROM (programmable ROM) is used as the ROM, there is a problem that the circuit configuration of the IC memory card becomes complicated and the writing method becomes complicated. Further, in the case of the above (3), there is a possibility that the fixed data area may be rewritten due to improper handling or malfunction, resulting in low reliability. Further, these methods have a problem that it is difficult to change the writing area.

Further, in the case of the above (3), there is an application in which a data area accessible only to a specific user and a data area accessible to an unspecified user are used separately. In order to realize this, Management by an operating system (OS) based on software can be considered, but in this case, there is a problem that the system software to be used becomes large in scale.

[0005]

SUMMARY OF THE INVENTION The present invention is to solve the above-mentioned problems, and the gist thereof is a readable / writable IC.
In an IC memory card having a memory and an input / output terminal array connected to the IC memory, write-protected data, access-protected data, or write-protected data is written to a specific memory area by an input signal from the input / output terminal array. It consists of a register for writing release data or access prohibition release data, an address decoder connected to the register, and an address comparator for comparing the address on the address bus from the input / output terminal row with the output from the address decoder. By comparing the address on the address bus from the output terminal row with the output from the address decoder, an IC memory card in which write prohibition or access prohibition, write prohibition cancellation or access prohibition cancellation can be freely performed in a specific memory area Is.

[0006]

Embodiments of the present invention will be specifically described below with reference to the drawings. 1 is a perspective view showing an IC memory card of the present invention, FIG. 2 is a block diagram showing one embodiment of the IC memory card of the present invention, and FIG. 3 is a block diagram showing another embodiment of the IC memory card of the present invention. Is.

As shown in a perspective view in FIG. 1, the IC of the present invention
The memory card 10 is a readable / writable IC memory 11
And an input / output terminal row 12 connected to the IC memory 11. Further, as shown in the block diagram of FIG. 2, write inhibit address data 12a is input from the input / output terminal array 12, and the write inhibit address data 12a is written and stored in the address register 20. The write-protected address data 12a stored in the address register 20 is
Address decoder 3 connected to address register 20
When the address is converted into an actual address by 0, the address comparator 40 compares the address on the address bus 12b from the input / output terminal row 12 with the write inhibit address data 12a output from the address decoder 30. Address bus 12b from the input / output terminal row 12
The write enable signal 12 from the input / output terminal row 12 is generated only when the above address does not match the write inhibit address data 12a output from the address decoder 40.
c is output to the IC memory (not shown) as a chip enable signal CE1 through the gate 50, and writing becomes possible.

According to the present invention, as shown in the block diagram of FIG. 2, the chip enable signal CE of one IC memory 11 is used.
It is not limited to the control of 1 to prohibit writing in a specific memory area, and access prohibited address data 12a is input from the input / output terminal row 12 as shown in the block diagram of FIG. The access-prohibited address data 12a is written and stored in the address register 20. By the address decoder 30 connected to the address register 20, the access prohibition data 12a stored in the address register 20 is converted into an actual address, and at the same time, the address bus 12b from the input / output terminal row 12 is converted.
The address above is compared with the access prohibition data 12a output from the address decoder 30 by the address comparator 40. The address on the address bus 12b from the input / output terminal row 12 and the address decoder 40
Chip decoder 60 only if the outputs from
Through the gate 50 to the chip enable signals CE1 to CE1
The CE 6 is output to each IC memory (not shown) and becomes accessible.

[0009]

As described above, according to the present invention, a register for writing write inhibit data, access inhibit data, write inhibit release data, or access inhibit release data, an address decoder connected to the register, and an input / output terminal. It consists of an address comparator that compares the address on the address bus from the column with the output from the address decoder. By comparing the address on the address bus from the input / output terminal column with the output from the address decoder, The memory area can be write-protected, access-protected, write-protected released, or access-protected released freely, and there is an advantage in that fixed data is not destroyed due to malfunction or operation and reliability is high.

[Brief description of drawings]

FIG. 1 is a perspective view showing an IC memory card of the present invention.

FIG. 2 is a block diagram showing an embodiment of an IC memory card of the present invention.

FIG. 3 is a block diagram showing another embodiment of the IC memory card of the present invention.

[Explanation of symbols]

 10 IC memory card 11 IC memory 12 input / output terminal row 20 address register 30 address decoder 40 address comparator 50 gate 60 chip decoder

Claims (1)

[Claims] 1. An IC memory card having a readable / writable IC memory and an input / output terminal array connected to the IC memory, wherein a specific memory area is written by an input signal from the input / output terminal array. A register for writing prohibited data, access prohibited data, write prohibition release data, or access prohibition release data, an address decoder connected to the register, an address on the address bus from the input / output terminal string, and an output from the address decoder are provided. Comprising an address comparator to compare, by comparing the address on the address bus from the input / output terminal row and the output from the address decoder,
An IC memory card characterized in that write protection, access prohibition, write prohibition release or access prohibition release can be freely performed on a specific memory area.