JPH0477078A - Video signal scramble method - Google Patents

Abstract

PURPOSE:To eliminate waveform distortion by allowing an encoder to multiplex a video signal in the vicinity of a cut point as a digital data onto a signal within a vertical blanking period and allowing a decoder to replace a video signal in the vicinity of a connecting point as a digital data into the video signal in the vicinity of the cut point multiplexed in the vertical blanking period. CONSTITUTION:A video signal is inputted to an input terminal 1 and given to a synchronizing separator circuit 2 and an A/D converter 3 and a synchronizing signal is separated and given to a timing signal generating circuit 4. An analog signal given to the A/D converter 3 is converted into a digital signal and given to a picture memory 5 and an extraction memory circuit 7. A control signal representing a cut point of each scanning line is inputted and given to a memory address generating circuit 6. An address to write a video signal from the A/D converter 3 to the picture memory 5 and a read address for line rotation are generated. Scrambling is implemented by line rotation, and an encoder side uses a video signal in the vicinity of the connecting point as a digital data is replaced into the video signal in the vicinity of the cut point multiplexed in the vertical blanking period to eliminate waveform distortion thereby improving the decoded quality of the descramble picture.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a video signal scrambling method used in pay broadcasting.

In conventional paid broadcasting, video signals are scrambled in order to make broadcast content viewable only by subscribers who have signed a contract with a broadcaster, and to prevent non-contractors from viewing the content. Here, the quality of the restored image when the scrambled video signal is descrambled is important in providing services.

Video signal scrambling methods include line rotation, in which a cutting point is provided in a scanning line and the video signals before and after the cutting point are swapped.

As a document of good luck, Namba Makoto-2 ゛Information security in broadcasting °°, Institute of Electronics and Communication Engineers Kansai branch, collection of lecture papers for specialized seminars [Fundamentals and applications of cryptography and information security J,
pP, 67-74. Feb, 1986.

Hereinafter, a conventional video signal scrambling method using line rotation will be explained with reference to FIG.

In FIG. 5, (a) is the original video signal. In (a), t2 is a cutting point for scrambling processing by line rotation, and the video signal from period 1 to t2 is A, the video signal from period t2 to L is B, and period A,
By replacing B, the line will be rotated. (b) shows a scrambled signal that has undergone line rotation.

(C) is a signal obtained by descrambling the scrambled signal of (b). Waveform distortion such as ringing occurs in the signal near the connection point during the period t1 to t due to the influence of the amplifier or the band limit of the transmission system. This waveform distortion appears as deterioration in restored image quality when displayed on a receiver.

Problems to be Solved by the Invention As described above, when descrambling processing is performed in conventional line rotation, the restored image quality deteriorates due to waveform distortion.

The present invention solves the above-mentioned problems, and aims to provide a video signal scrambling method that eliminates deterioration of a descrambled image due to waveform distortion.

Means for Solving the Problems In order to achieve the above object, the present invention provides a cutting point in a video signal, and vertically converts the video signal near the cutting point in line rotation, which replaces and scrambles the video signals before and after the cutting point, as digital data. It is multiplexed within the retrace period.

According to the above-mentioned means, the encoder side multiplexes the video signal near the cutting point as digital data during the vertical retrace period, and the decoder side multiplexes the video signal near the contact point as digital data during the vertical retrace period. The image signal is restored by replacing it with the video signal near the cutting point that is multiplexed within, and the waveform distortion near the connection point of the video signal is removed.

EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.

1 is a block diagram showing the configuration of an encoder in the video signal scrambling method of the present invention, the second part is a block diagram showing the configuration of a decoder, and FIG. 3 is a block diagram showing the operation of the sampling memory circuit 7 of FIG. 1. 4 is a video signal diagram showing the operation of the multiplexing circuit 8 of FIG. 1, and FIG. 5 is a video signal diagram showing the conventional line rotation processing.

First, the encoder side will be explained.

In Figure 1, 1 is an input terminal for a video signal, 2 is a synchronization separation circuit, 3 is an A/D converter, 4 is a timing signal generation circuit that reproduces the system clock and generates the timing necessary for each part, and 6 is a control terminal. A memory address generation circuit gives an address for line rotation to the image memory 5 according to a control signal from 9, a sampling memory circuit 7 extracts a signal near the cutting point, and 8 converts the signal extracted by the sampling memory circuit 7 into digital data. 1 is a multiplex circuit for multiplexing during the vertical retrace period, IO is a D/A converter, and 11 is an output terminal for outputting line-rotated video signals.

The operation in the above configuration will be explained. A video signal is input to an input terminal 1 and provided to a synchronization separation circuit 2 and an A/D converter 3. The synchronization separation circuit 2 separates the synchronization signal and supplies it to the timing signal generation circuit 4.

The timing signal generation circuit 4 generates system clock recovery and necessary timing signals and supplies them to various parts (not shown). The analog signal applied to the A/D converter 3 is converted into a digital signal and applied to the image memory 5 and sampling memory circuit 7. A control signal indicating the cutting point of each scanning line is input to the control terminal 9 and is applied to the memory address generation circuit 6. In the memory address generation circuit 6, a cutting point is specified according to a control signal inputted from a control terminal 9, and the video signal from the A/D converter 3 is sent to the image memory 5.
Addresses for sequential writing and read addresses for line rotation are generated. Therefore, the image memory 5 outputs a signal subjected to line rotation as in the conventional example.

That is, in FIG. 5, the cutting point t2 is specified by the control signal input from the control terminal 9, and the period 1° to t2 is
, 'M interval t2-L3 is set as B, A and B are exchanged, and a scrambled signal with line rotation shown in (b) is obtained.

FIG. 3 shows the processing in the sampling memory circuit 7. The sampling memory circuit 7 extracts and stores the video signal shown in (b) from the period 1a to t near the cutting point of the video signal given from the A/D converter 3 shown in (a). The multiplex circuit 8 converts the signals stored in the sampling memory circuit 7 during the period t1 to L near the cutting point into digital data within the vertical station line period of the video signal that has been subjected to line alignment and is given from the image memory 5. FIG. 4 shows a case where the signal is multiplexed into, for example, the 10H of the vertical retrace period. The line-rotated video signal is multiplexed in the multiplexing circuit 8 with signals from a period t8 to L near the cutting point. and,
It is converted into an analog signal by a D/A converter 10, and outputted from an output terminal 11 as a scrambled video signal.

Next, the decoder side will be explained.

In FIG. 2, 12 is an input terminal for the scrambled video signal sent from the encoder, 13 is a synchronous separation circuit,
14 is an A/D converter; 15 is a timing signal generation circuit that reproduces the clock of the system and generates the timing necessary for each part; 17 is an address for restoring line rotation according to a control signal from a control terminal 21 to give an address to image memory 16; a memory address generation circuit; 18 a sampling memory circuit for extracting signals near the cutting point multiplexed during the vertical blanking period on the encoder side; 20 a reproducing circuit for reproducing the signals extracted by the sampling memory circuit 18; 19 a reproducing circuit 20; A switching circuit that switches between the reproduced video signal near the cutting point and the video signal near the connection point of the video signal given from the image memo 1J16, 22 a D/A converter, 23 a video signal with restored line rotation. Output terminal that outputs.

The operation in the above configuration will be explained. A video signal line-rotated on the encoder side shown in FIG. The synchronization separation circuit 13 separates the synchronization signal and supplies it to the timing signal generation circuit 15. The timing signal generation circuit 15 generates system clock recovery and necessary timing signals and supplies them to various parts (not shown). The analog signal applied to the A/D converter 14 is converted into a digital signal and applied to the image memory and extraction memory circuit 18. A control signal indicating the connection point of each scanning line is input to the control terminal 21 and given to the memory address generation circuit 17 . Memory address generation circuit 1
7, according to the control signal input from the control terminal 21,
Addresses for sequentially writing the video signals from the A/D converter 14 into the image memo 6 and successive addresses for restoring line rotation are generated. Therefore, the image memory outputs a signal with the line rotation restored, as in the conventional example. That is, in FIG. 5, the connection point 2' is also specified by the control signal input from the control terminal 21, and a video signal with restored line rotation shown in FIG. 5C is obtained.

The sampling memory circuit 18 extracts and stores the video signal in the vicinity of the cutting point multiplexed as digital data during the vertical retrace period on the encoder side shown in FIG. The reproduction circuit 20 reproduces the video signal in the vicinity of the cutting point stored in the sampling memory circuit 1B according to the address from the memory address generation circuit 17, and supplies it to the switching circuit 19. Switching circuit 19
Then, the line rotation restored signal given from the image memory is replaced with the video signal near the cutting point given from the reproducing circuit 20 and given to the D/A converter 22.

That is, in the switching circuit 19, the period t1 to
The video signal near the connection point of t, and the period t of FIG. 3(b)
The video signals near the cutting points 1 to t are replaced.

The video signal replaced by the switching circuit 19 is converted into an analog signal by the D/A converter 22, and output from the output terminal 23 as a video signal with line rotation restored.

As described above, in the video signal scrambling method of one embodiment of the present invention, on the encoder side, the sampling memory circuit 7 of FIG. is extracted as shown in FIG. 3(b), and the extracted video signal is multiplexed in the multiplexing circuit 8 as digital data in, for example, the 1011th vertical retrace interval shown in FIG. 4, and is transmitted. On the decoder side, the sampling memory circuit 18 shown in FIG. 2 extracts the multiplexed video signal as digital data during the vertical retrace period shown in FIG. The video signal of period t, ~t, is converted into a period [, ~t] near the cutting point shown in FIG. 3(b).

By replacing the video signal with the video signal, it is possible to remove the deterioration of waveform distortion near the connection point caused by the line rotation when restoring the line rotation, and improve the restoration quality of the descrambled image.

As described in detail, the present invention performs scrambling by line rotation, the encoder side multiplexes the video signal near the disconnection point as digital data within the vertical retrace period, and the decoder side scrambles the video signal near the connection point. By replacing the video signal as digital data with a video signal near the cut point multiplexed within the vertical retrace period, waveform distortion can be removed and the restoration quality of the descrambled image can be improved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of an encoder of the video signal scrambling method of the present invention, FIG. 2 is a block diagram showing the configuration of a decoder, and FIG. 3 is a video signal diagram showing the operation of the sampling memory circuit of FIG. 1. , FIG. 4 is a video signal diagram showing the operation of the multiplex circuit shown in FIG. 1, and FIG. 5 is a video signal diagram showing conventional line rotation processing. 1.12...Input terminal, 2,13...
Synchronous separation circuit, 3.14...A/D converter, 4
, 15...timing signal generator, 5, 16...
...Image memory, 6.17...Memory address generation circuit, 7,18...Sampling memory circuit, 8...Multiple circuit, 9,21... ...Control terminal, 10゜22...D/A converter, 11.2
3...Output terminal, 19...Switching circuit,
20...Regeneration circuit. Name of agent: Patent attorney Shigetaka Awano and one other person

Claims (1)

[Claims] Line rotation in which a cutting point is provided in a scanning line of a video signal and the video signals before and after the cutting point are replaced and scrambled is characterized in that the video signal near the cutting point is digitized and multiplexed within a vertical retrace period. Video signal scrambling method.