JPS60256286A - Transmission system of television signal - Google Patents

Abstract

PURPOSE:To increase the secrecy by reversing the sequence of scanning lines of each block within the said block and replacing optionally the arrangement of the block to obtain scramble effect with a few number of blocks. CONSTITUTION:An analog video signal is inputted from a terminal 1, led to an A/D converter 3 and a master clock generator 4 through an LPF2, the generator 4 forms master clock having subcarrier frequencies fSC-3fSC based on a color burst signal and the result is fed to the A/D converter 3, a synchronizing separator 5 and a timing clock generating circuit 6. The converter 3 samples the input by using a master clock, converts it into a digital video signal, which is fed to a frame memory 7. Then the memory 7 has a capacity storing one frame of the video signal, written by a write address signal obtained from a ROM8, read by a read signal obtained from the ROM9 designated by a computer 10 and transmitted on a replaced scanning line.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a television signal transmission system, and more particularly to a scrambled transmission system that can be applied to scrambled broadcasting and the like.

BACKGROUND ART AND PROBLEMS In contract television broadcasting, a broadcasting system called scrambled broadcasting is used. Scrambled broadcasting is broadcasting in which the broadcasting station disturbs the television signal based on a predetermined method, so that those who do not have a reception contract with the broadcasting station will not be able to view normal images and sound even if they receive the broadcast. It is a method. In contract television broadcasting, a decoder is provided to those who contract with the broadcasting station, and the decoder is used to restore the scrambled television signal to its original form, allowing normal images and sound to be viewed. There is.

Therefore, in scrambled broadcasting, it is necessary to transmit the television signal with high secrecy so that when the broadcast is received by a person without a contract, the contents are not known as much as possible. For this reason, various scrambling methods have been proposed for disturbing images and sounds. As a method of disturbing an image, for example, a method of inverting the white level and black level of a video signal (Japanese Patent Application No. 57-13669, etc.), a method of interchanging scanning lines, etc. have been proposed in the past.

On the other hand, a reception system has been proposed in which scrambled broadcasts are recorded on a tape in scrambled form using a VTR, and the tape is passed through a decoder during playback to restore the original state. When such a reception system receives scrambled broadcasting due to the above-mentioned scanning line replacement, the following problem occurs.

Home VTRs use l for YC separation during recording and for removing chroma talk from chroma signals during playback.
A comb filter using an H delay circuit is provided.

Since the comb filter utilizes the line correlation between adjacent scanning lines, when the scanning lines are replaced by scrambling, the line correlation is lost and the image quality deteriorates significantly.

Therefore, a scrambling method has been proposed in which multiple scanning lines are combined into one block and this block is replaced. According to this method, the image quality deteriorates only at the boundaries between blocks, so the image quality is improved compared to the case where all the scanning lines are replaced. However, it is not possible to increase the number of blocks in order to reduce the deterioration of image quality at the boundaries between blocks, which makes it easier to see the contents of the screen.
It has become difficult to maintain a high level of confidentiality.

OBJECTS OF THE INVENTION It is an object of the present invention to provide a scrambling method for solving the above-mentioned problems in the scrambling method using block replacement.

SUMMARY OF THE INVENTION The present invention is a scrambling method in which the order of the scan lines of each block is reversed within that block. As a result, even if the number of blocks is small, a scrambling effect can be obtained and confidentiality can be increased.

Embodiment FIG. 1A shows a television screen when a normal image cannot be displayed. In this embodiment, this screen is divided into six blocks a, b, cXd, e, . . . f. In this case, the width of each block, ie, the number of scanning lines constituting each block, may be arbitrary. In FIG. 1B, the video signal having the contents of FIG. 1A is scrambled and the block order is changed, r, a, c,
This shows the screen when the order is e, b, d.

In this case, the order of the scan lines in each block is reversed from that in FIG. 1A. For example, the nine scanning lines (2), (2), (2) forming the b block in FIG. When reversing the order of the scanning lines in this way, taking into consideration the phase of the subcarriers of adjacent scanning lines, even if the original even and odd lines are arranged in reverse, the order of the even and odd lines respectively It is necessary to do this so that the phases of subcarriers of adjacent scanning lines of reversely arranged scanning lines are continuous. In addition, in VTRs, skew distortion due to head switching is approximately 6
．． Since this occurs during the 5H to 7H period, the block replacement is not allowed to participate in this period.

In actual scrambled broadcasting, the number of blocks, block replacement order, period, etc. may be arbitrarily changed during broadcasting. Also, the order of replacing blocks and scanning lines,
A control signal indicating a scrambling mode such as a period is inserted at a predetermined position in the vertical blanking period. A decoder on the receiving side detects the control signal and decodes the scrambled television signal based on the control signal to perform descrambling. The above control signal is, for example, 8
It consists of bit data and is inserted in such a way that, for example, the 12th H period of the vertical blanking period is divided into eight sections and one bit is assigned to each section. The contents of the 8 bits indicate the scrambling mode, which includes, for example, the number of blocks, the order of block replacement (for example, 50t!i), the scrambling time, and so on.

Next, embodiments of a scrambling device on the broadcasting station side for performing the above-mentioned scrambling and a descrambling device for descrambling in the receiving side decoder will be described.

FIG. 2 shows an embodiment of the scrambling device.

In the figure, an analog video signal to be scrambled is input to an input terminal l. This video signal is band-limited through a low-pass filter 2 and then applied to an A/D converter 3 and a master clock generation circuit 4. The master clock generation circuit 4 converts the subcarrier frequency fsc to 3 fsc based on the color burst signal of the video signal.
A master clock having a frequency of is generated and applied to the A/D converter 3, the synchronous separation circuit 5 and the timing clock generation circuit 6. The A/D converter 3 samples the input video signal using the master clock and converts it into, for example, an 8-bit digital video signal. This digital video signal is applied to the frame memory 7 and also to the synchronization separation circuit 5 to separate horizontal and vertical synchronization signals. The timing clock generation circuit 6 generates a predetermined timing clock based on the synchronization signal mentioned above and the master clock and applies it to the address conversion ROMB, 9 and the computer device 10.

The frame memory 7 stores the digital video signal in one
It has the capacity to store one frame, and has two sets of address conversion R.
Writing is performed using a write address signal obtained from OM8, and reading is performed using a read address signal obtained from address conversion ROM9. This read signal has the scanning lines replaced, that is, has been scrambled, as shown in FIG. 1B. For this purpose, the address conversion ROM 8 converts the scanning line number generated from the timing clock into an address where the input data of the frame memory 7 is actually written. Further, the address conversion ROM 9 determines the actual read address based on the scanning line number generated from the timing clock and the read scanning line designation signal obtained from the -F computer device 10.

The computer device 10 includes a keyboard 11, a microprocessor 12, a program ROM 13, and a working RAM 14.
, an interface 15, and a display device 16 consisting of a cathode ray tube or the like. Keeper l”] l is used when changing the contents of the scramble.Program R
The OM 13 stores the contents of the scrambling, that is, data such as the order in which a plurality of types of scanning lines are replaced and the scrambling time, as well as data such as a system program for operating the computer. Further, the buffer memory 17 is used for speed adjustment between the -1- reading scanning line designation signal obtained from the computer device 10 and the frame memory 7 which requires this signal.

The scrambled digital video signal read out from the frame memory 7 as described above is then applied to the control signal insertion circuit 1B, and the aforementioned control signal indicating the scrambling mode obtained from the combinator device 10 is inserted into the vertical blanking period. is inserted into the specified position. The scrambled digital video signal with the control signal inserted is D/
The signal is converted into a scrambled analog video signal by the A converter 19, and after the clock component is removed by the low-pass filter 20, it is output from the output terminal 21.

Note that other scrambling methods such as inverting the white level and black level described above may be used in combination. In that case, the output signal of the frame memory 7 may be scrambled using another method.

FIG. 3 shows in more detail the circuit for exchanging the scanning lines described above, and parts corresponding to those in FIG. 2 are given the same reference numerals. Note that the address table 20 in the figure is a circuit that integrates the address conversion ROM 8.9 of FIG. 2.

In FIG. 3, first, switch 21 is closed to the light side, and switch 22 is also closed.

By kneading, data is sequentially written into the buffer memory 17 according to the address signal obtained from the Hanofa address counter 23. This data is in the program ROM
3 with the keyboard I'l+, indicating the order of the scan lines of the scrambled screen. That is, as shown in FIG. 1B, the blocks are exchanged and the scanning lines are arranged in the reverse order in each block. The frame memory 7 has a line memory configuration in which one scanning line is treated as one block.
One piece of data is required for one scanning line.

When writing of data to the buffer memory 17 is completed, the switch 21 is closed to the read side and the switch 22 is opened. As a result, the buffer memory 17 is read out by the address signal obtained from the read pointer generation circuit 24 every lH. This 0 read signal determines the address of the scanning line when reading the frame memory 7, and the address table 20 outputs a read address signal to the output terminal 26 based on the above signal. Furthermore, the line point generation circuit 25 outputs a signal that determines the address of the scanning line when writing to the frame memory 7, and based on this signal, the address table 20 outputs a write address signal to the output terminal 27. Therefore, the address table 20 outputs 525 read address signals and write address signals during one frame period. Note that the control signal is outputted to the output terminal 28. Further, a timing clock is applied to the input terminal 29 from the timing clock generation circuit 6 of FIG. 2, and is supplied to a predetermined circuit.

FIG. 4 shows a flowchart regarding the computer device 10.

The microprocessor 12 generates scrambled data according to the scramble mode specified by the keyboard 11. Also, a control signal indicating the scramble mode is generated and inserted into the vertical blanking period. The scramble mode can be changed using the keyboard 11 at any time.

FIG. 5 shows a descrambling device in the receiving side decoder.

This descrambling device basically has substantially the same configuration as the scrambling device shown in FIG. 2, and therefore circuits corresponding to those in FIG. 2 are given the same reference numerals.

In FIG. 5, a scrambled video signal is applied to an input terminal 31, and a descrambled normal video signal is obtained at an output terminal 32. Also, the control signal detection circuit 33
is provided, and the control signal is extracted from the signal obtained from the A/D converter 3. The computer device 10 decodes the scramble mode based on this control signal, thereby reading out the digital video signal restored to its original form from the frame memory 7.

FIG. 6 shows a flowchart regarding the computer device 10 in the descrambler.

1 The "key-in" step in this flowchart is an operation for enabling the descrambling device. That is, in the case of contract television broadcasting, the descrambling device is made operable when the user pays a fee. Specifically, a personal identification number using a card or the like is used. Alternatively, a subscriber number may be assigned to the subscriber, and the subscriber number for which the fee was paid may be added to the broadcast signal and transmitted, and the decoder side may detect this.

Effects of the Invention According to the present invention, since the scanning line blocks are exchanged and the order of the scanning lines is reversed in each block, the scrambling effect is enhanced. Also, when recording and reproducing a scrambled television signal using TR, even if the number of blocks is reduced to reduce the deterioration of image quality at the boundaries of blocks due to the comb filter, if the signal is received by a normal TV receiver. , it is possible to maintain confidentiality by making the contents difficult to understand.

[Brief explanation of the drawing]

3 2 Fig. 1 is a diagram showing a television screen for explaining the principle of the present invention, Figs. 2 to 6 show embodiments of the invention, Fig. 2 is a block diagram of a scrambling device, and Fig. 3 is a diagram showing a television screen for explaining the principle of the present invention. Fig. 4 is a block diagram of the part that performs scanning cotton replacement in Fig. 2, Fig. 4 is a flow chart of the computer device shown in Fig. 2, Fig. 5 is a block diagram of the descrambling device, and Fig. 6 is a flow chart of the computer shown in Fig. 5. be. It should be noted that the reference numerals used in the drawings indicate: 7-- Frame memory 8.9-- Address conversion ROM 10-m-- Computer device. Agent: Yoshio Katsutsunekane Ueya 4 Figure 4 JP-A-Sho Go-256286 (8) Figure 6

Claims (1)

[Claims] A television signal characterized in that a screen is vertically divided into a plurality of blocks, the arrangement of these blocks is arbitrarily changed, and the order of scanning lines in each block is reversed. Transmission method.