JPH04373227A - Time division multiplexer - Google Patents

Abstract

PURPOSE:To send a signal with time division multiplex and inexpensive configuration. CONSTITUTION:A slot number '1' is designated to a time slot designation section 130 of a time slot output section 100 in advance. A time slot count section 110 counts a slot number by a clock signal from a leading of a frame signal and when the time slot count section 110 counts the slot number '1', a comparison section 120 outputs an output enable signal to a data output section 140. An output of each of tri-state buffers 141-149 of the data output section 140 is set to an enable state by an output enable signal and an 8-bit data and a control bit are multiplexed by a 1st time slot of each frame.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a time division multiplexing device for time division multiplexing and transmitting various data.

0002

2. Description of the Related Art Conventionally, this type of time division multiplexing apparatus has been disclosed in, for example, Japanese Patent Laid-Open No. 63-69342 and Japanese Patent Laid-Open No. 2-168.
As shown in Publication No. 28, it has a plurality of input/output interfaces and input buffers according to the maximum number of multiplexing, which is the number of time slots in one frame, and each data inputted through each input/output interface and input buffer. is configured to be allocated to each time slot of a frame and time-division multiplexed.

0003

[Problems to be Solved by the Invention] However, since the conventional time division multiplexing device described above has a plurality of input/output interfaces and input buffers corresponding to the maximum number of multiplexes,
When multiplexing is performed using a number of time slots smaller than the maximum number of multiplexed lines, there is a problem that unused input/output interfaces and input buffers are wasted and become expensive.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a time division multiplexing apparatus that can perform time division multiplexing and transmission with an inexpensive configuration.

[0005]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention is configured such that a multiplexing section is provided for each time slot. That is, the present invention provides a designation means in which a predetermined time slot number is designated in advance for each frame in consecutive frames, a count means for counting the number of time slots of each frame, and a count value of the counting means and the designation means. A time division multiplexing device is provided, having data output means for outputting transmission data when the time slot numbers of the time slot numbers match.

[0006]

[Operation] Since the present invention has the above-mentioned configuration, there is provided a designating means in which a predetermined time slot number is designated in advance for each frame in consecutive frames, a counting means for counting the number of time slots of each frame, and the counting means. Since a multiplexing section having a data output means for outputting transmission data when the count value of and the time slot number of the specifying means match can be provided for each time slot, the number of multiplexed units is smaller than the maximum number of lines to be multiplexed. When multiplexing using time slots, unnecessary input/output interfaces and input buffers are unnecessary, and therefore, time division multiplexing and transmission can be performed with an inexpensive configuration.

[0007]

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a time division multiplexing device according to the present invention, FIG. 2 is a circuit diagram showing a detailed configuration of the data output section of FIG. 1, and FIG. 3 is a diagram showing FIGS. 1 and 2. 3 is a timing chart showing main signals in FIG.

[0008] In FIG. 1, this time division multiplexing device includes:
Multiple (=M) time slot output units 100, 200
~M00, and this time slot output unit 100, 2
The number M from 00 to M00 is prepared according to the number of multiplexes desired by the user, and the maximum number is the number of multiplexes of the line. Note that each of the time slot output units 200 to M00 has the same configuration as the time slot output unit 100, so the detailed configuration is not shown.

[0009] Each time slot output section 100, 200...
A frame signal and a clock signal as shown in FIG. 3 are applied to M00. These signals are approximately 4MHZ, for example.
The clock signal generator 10 is made up of a clock signal generator 10 that oscillates at a frequency of 1, a counter 20 that divides the frequency of this clock signal by, for example, 1/128, and a gate circuit 30 that responds to this clock signal and the output signal of the counter 20. Since the configuration of each time slot output unit is the same, the detailed configuration of only the time slot output unit 100 will be explained.The time slot count unit 110 is reset by a frame signal and counts the maximum number of multiplexed lines by a clock signal. Then, the count values are sequentially output to the comparison section 120. The time slot designation unit 130 is the time slot output unit 10
A predetermined time slot number N (=1 to M) of 0 is specified in advance, and the comparator 120 compares this time slot number N with the count value of the time slot counter 110, and if they match, outputs an output permission signal. The data is output to the data output section 140.

Next, referring to FIG. 2, the data output section 140
The detailed configuration will be explained below. The data output unit 140 includes tri-state buffers 141 to 1 to which 8-bit data and control bits from a transmitting terminal (not shown) are respectively input.
It has 49. Tri-state buffers 141 to 149
An output permission signal, that is, an output enable signal, from the comparator 120 shown in FIG. 1 is inputted to the control terminal of , and is output to the line from the output terminal.

Next, the operation of the above embodiment will be explained with reference to FIG. FIG. 3 shows a time slot output unit 10 to which the first and Nth slots of one frame are respectively allocated.
0 and N00, and therefore the time slot output section 100 and the time slot designation section 13 of N00.
Slot numbers "1" and "N" are designated in advance for slot numbers "1" and "N", respectively. Each time slot count section 110 of the time slot output section 100 and N00 counts the number of slots using a clock signal from the rising edge of the frame signal, and each time slot count section 110 of each comparison section 120 counts the slot number "1" and "1", respectively. When counting "N", an output permission signal is output to the data output section 140. Each tri-state buffer 1 of the data output section 140
41 to 149 have their outputs enabled by this output permission signal, and 8-bit data and control bits are multiplexed into the first and Nth slots of each frame.

Therefore, according to the above embodiment, since the time slot output units 100, 200 to M00 are prepared according to the number of multiplexing desired by the user, multiplexing is performed using slots that are equal to or less than the maximum number of multiplexing of the line. It is possible to omit a wasteful time slot output section when the time slot output section 100, 200 to M00 is added. Therefore, it is possible to time-division multiplex and transmit with an inexpensive configuration.

[0013]

[Effects of the Invention] As explained above, according to the present invention,
a designation means in which a predetermined time slot number is designated in advance for each frame in consecutive frames; a count means for counting the number of time slots in each frame; and a count value of the counting means and a time slot number of the designation means. Since a multiplexing section having a data output means for outputting transmission data when a match is made can be provided for each time slot, when multiplexing is performed using a number of time slots smaller than the maximum number of multiplexed lines, This eliminates the need for unnecessary input/output interfaces and input buffers, and therefore enables time-division multiplexing and transmission with an inexpensive configuration. Furthermore, it is easy to add multiplexing units.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a time division multiplexing device according to the present invention.

FIG. 2 is a circuit diagram showing a detailed configuration of a data output section in FIG. 1;

FIG. 3 is a timing chart showing main signals in FIGS. 1 and 2. FIG.

[Explanation of symbols]

10 Clock signal generator 20 Counter 30 Gate circuit 100, 200 to M00 Time slot multiplexer 1
10 Time slot count section 120 Comparison section 130 Time slot specification section 140 Data output section

Claims (2)

[Claims] 1. A designation means in which a predetermined time slot number is designated in advance for each frame in consecutive frames, a count means for counting the number of time slots in each frame, and a count value of the counting means and the designation. A time division multiplexing device comprising data output means for outputting transmission data to a transmission path when time slot numbers of the means match. 2. A number of time slot output units including the designation means, counting means, and data output means are provided in a number corresponding to the number of multiplexed lines, and the number is smaller than the maximum number of multiplexed lines. The time division multiplexing device according to item 1.