JPH04365094A - Liquid crystal panel driving device - Google Patents

Abstract

PURPOSE:To improve the response speed of a liquid crystal panel and quickly follow an image changed abruptly. CONSTITUTION:An image memory 11 storing one frame of display digital image data and a ROM 12 storing the table of the image data corresponding to two inputs of the above digital image data and the image data read delayingly by one frame from the image memory 11 are provided on a liquid crystal panel driving device displaying images with an accumulatively responding liquid crystal panel, when the image data are changed, the optimum image data stored in advance are read out in response to the direction and degree of the change to drive the liquid crystal panel, and the rising or trailing of the light transmittance is made steep within the necessary and sufficient range.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal panel driving device for driving a liquid crystal panel for display by latching data a plurality of times.

0002

2. Description of the Related Art A conventional liquid crystal television is generally constructed as shown in FIG. In the figure, 1 is a television antenna, and television broadcast waves received by this television antenna 1 are input to a tuner 2. This tuner 2 selects a radio wave of a designated channel from among the received radio waves, converts it into an intermediate frequency signal, and outputs it to the television linear circuit 3. This TV linear circuit 3 is the tuner 2
A video signal, a vertical synchronization signal, and a horizontal synchronization signal are extracted from the intermediate frequency signal from the A/D converter 4.
to the vertical synchronization signal and horizontal synchronization signal to the synchronization control circuit 5.
Output to each. This synchronization control circuit 5 creates various timing signals from the vertical synchronization signal and horizontal synchronization signal, and generates various timing signals from the A/D converter 4, segment drive circuit 6,
Output to common drive circuit 7.

The A/D converter 4 has a synchronous control circuit 5.
The video signal is converted into several bits of digital data in synchronization with the sampling clock from the segment drive circuit 6, and is output to the segment drive circuit 6. This segment drive circuit 6 is A
A gradation signal is created according to the data from the /D converter 4, and a segment electrode drive signal is also created based on this gradation signal, and a matrix type liquid crystal panel 8 is generated.
drive the segment electrodes for display. Further, the common drive circuit 7 reproduces the common electrode drive signal according to the timing signal from the synchronous control circuit 5 and selectively drives the common electrodes of the liquid crystal panel 8 in sequence.

0004

[Problems to be Solved by the Invention] The liquid crystal panel 8 is driven based on the video signal received as described above, but since the liquid crystal panel 8 is operated by the cumulative response effect as shown in FIG. It has the property of being slow. FIG. 9 shows the relationship between the liquid crystal drive voltage composite waveform and the light transmittance of the liquid crystal panel 8 when the gradation is "7" and "0". On the other hand, in the conventional liquid crystal panel driving method described above, as shown in FIG. 9, the liquid crystal panel 8 is simply created by creating a gradation signal corresponding to the video signal and driven. There was a problem in that the response characteristics could not be improved and it could not cope with fast moving images.

The present invention has been made in view of the above-mentioned circumstances, and an object thereof is to provide a liquid crystal panel driving device that can improve the response speed of gradation changes of a liquid crystal panel.

[0006]

[Means and operations for solving the problems] That is, the present invention provides a liquid crystal panel driving device that displays an image using a liquid crystal panel that responds cumulatively, which includes an image memory that stores one frame of input digital image data; an image table made of a ROM or the like that stores a table of image data determined by two inputs of the digital image data and image data read out from the image memory with a one-frame delay; The liquid crystal panel is driven for display based on image data read out from the ROM.

With the above configuration, when the image data changes, the optimal image data stored in advance is read out according to the direction and degree of the change, and the liquid crystal panel is driven. The rise or fall of the light transmittance becomes steep within a necessary and sufficient range. As a result, the response speed of the liquid crystal panel can be increased, and it is possible to quickly follow rapidly changing images.

The present invention also provides a liquid crystal panel drive device that displays an image using a liquid crystal panel that responds cumulatively, including an image memory that stores one frame of input digital image data, and a memory that stores the digital image data and the image memory. A gradation difference signal is output by comparing the level of the image data read out with a delay of one frame from the image data read out with a delay of one frame. When there is no gradation change from the data, when the gradation change between the current image data and the image data read out one frame later is within a specific range, and when the current image data is read out one frame later. A comparison circuit that outputs an identification signal to identify when the gradation change from the image data is larger than a specific range, and a comparison circuit that outputs an identification signal to identify when the gradation change from the image data is larger than a specific range, and a comparison circuit that outputs an identification signal that identifies when the gradation change from the image data is larger than a specific range, and when the gradation change from the current image data is within a specific range according to the identification signal, the current image data and the above gradation from the current image data are output. An address decoder that determines a designated address using a differential signal, a ROM that stores in advance a table of image data corresponding to the designated address from the address decoder, and an identification signal from the comparison circuit that determines the current image data and the maximum floor. and a selector for selecting one of gradation image data, minimum gradation image data, and image data read from the ROM, and drives the liquid crystal panel for display based on the image data sent from the selector. It was designed to do so.

With the above configuration, only the table of image data corresponding to the current image data and the tone difference signal when the tone change is within a specific range is stored in the ROM.
ROM with small storage capacity.
The response speed of the liquid crystal panel can be increased even when using the LCD panel, making it possible to quickly follow rapidly changing images.

[0010] The term "frame" used in the specification of this application indicates that all the picture elements constituting one screen are scanned, and for example, the picture elements constituting one screen are scanned for each field of a television signal. In a display device that performs display by scanning everything in one pass, one field of a television signal and one frame referred to in this application are considered to be equivalent, and do not necessarily correspond to a "frame" generally used in television signals.

[0011]

【Example】

[First Embodiment] A first embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows an example in which the first embodiment of the present invention is applied to a liquid crystal television, and the same parts as in FIG. Here, as shown in FIG. 1, an image memory 11 and a ROM 12 are provided on the output side of the A/D converter 4. The image memory 11 is a dual port memory capable of storing one frame of image data, and operates according to the memory address and write/read instructions given from the synchronization control circuit 5.
For example, 3-bit image data sent from the A/D converter 4 is sequentially stored and sequentially output to the address terminal H (High) of the ROM 12 after one frame. Furthermore, image data output from the A/D converter 4 is input to the address terminal L (Low) of this ROM 12. In this ROM 12, image data optimal for improving the response speed based on the current image data and the image data of one frame before is stored in advance in the form of a table, and is stored at the address selected by the address terminals H and L. Corresponding example 3
Bit image data D1 to D3 are output to the segment drive circuit 6. Next, the operation of the first embodiment will be explained.

FIG. 2 shows a table of image data stored in the ROM 12. A/D converter 4
3-bit image data A2 to A directly input from
0 is the Low address, and 3-bit image data A5 is inputted via the image memory 11 with a delay of one frame.
~A3 is set as a High address, any of the image data "0" to "7" corresponding to the address specified position on the table is read out, and the 3-bit image data D
1 to D3 are outputted to the segment drive circuit 6.

FIG. 3 shows the image data outputted from the A/D converter 4 and the corresponding data stored in the ROM 12 from the image memory 11 at the timing of frame numbers "0" to "9" according to the table shown in FIG. This is an example of image data output to. As shown in the figure, for example, the gradation of the image data output from the A/D converter 4 in frame "0" is "0", and the gradation level of the image data output from the A/D converter 4 in frame "1" is "0". If the gradation of the image data is "4", the ROM12 is Hi at the timing of frame "1".
The gradation level "0 (000)" is input to the gh address, and the gradation level "4 (100)" is input to the Low address. therefore,
According to the table shown in FIG. 2 above, the gradation level "6 (
110)'' are read out as image data D1 to D3 and output to the segment drive circuit 6.

Next, in frame "2", H of the ROM 12 is
Since the gradation level "4 (100)" is input to the high address and the gradation level "7 (111)" is input to the low address, the R
From OM12, gradation “7 (111)” is image data D1
~D3 and output to the segment drive circuit 6.

The following operations are performed in the same manner, and as a result, the gradation of the image data output from the A/D converter 4 is determined by the image memory 1.
If the gradation is higher than the gradation of the image data of the previous frame output from 1, it means that the gradation is changing in the higher direction, so the image has a gradation slightly higher than the actual gradation at that time. Data is read from the ROM 12 and output to the segment drive circuit 6. On the other hand, if the gradation of the image data output from the A/D converter 4 is lower than the gradation of the image data of the previous frame output from the image memory 11,
Since the gradation is changing in the lower direction, image data with a gradation slightly lower than the actual gradation at that time is stored in the ROM.
12 and output to the segment drive circuit 6. In this way, when the gradation of image data changes, the image data previously stored in the ROM 12 is read out and the liquid crystal panel 8 is driven according to the direction and degree of the change, and the light transmittance rises or falls. The decline becomes steep. Therefore, the response speed of the liquid crystal panel 8 can be increased, and it is possible to quickly follow rapidly changing images. [Second Embodiment] A second embodiment of the present invention will be described below with reference to the drawings.

FIG. 4 shows an example in which the second embodiment of the present invention is applied to a liquid crystal television, and the same parts as in FIG. 9 are given the same reference numerals and their explanation will be omitted. Here, as shown in FIG. 4, the output side of the A/D converter 4 includes an image memory 21, a comparison circuit 22, an address decoder 23, and an R
An OM 24 and a selector 25 are provided.

The image memory 21 is a dual port memory capable of storing one frame of image data, and operates according to the memory address and write/read commands given from the synchronization control circuit 5, and the data sent from the A/D converter 4. For example, 3-bit image data is sequentially stored and sequentially outputted to the input terminal V of the comparison circuit 22 after one frame. Furthermore, image data output from the A/D converter 4 is directly input to the input terminal U of the comparison circuit 22. The comparison circuit 22 subtracts and compares the image data of one frame before the input terminal V from the current image data of the input terminal U, and sends the tone difference signal, which is the comparison result, from the output terminal R to the input terminal of the address decoder 23. At the same time, identification signals S0 and S1 according to the comparison result are sent to the selector 25. The address decoder 23 has an input terminal A directly input with image data from the A/D converter 4, and corresponds to signals given to the input terminals A and B by a mode signal from a control system (not shown). A designated address is generated and output from the output terminal Y to the address terminal of the ROM 24. The ROM 24 reads out previously stored image data according to the designated address from the address decoder 23 and sends it to the input terminal J of the selector 25. The selector 25 receives the identification signals S0 and S1 from the comparison circuit 22.
According to the image data input directly from the A/D converter 4 to the input terminal I, the maximum gradation image data "7" input to the input terminal K, and the image input from the ROM 24 to the input terminal J. One of the four inputs of data and minimum gradation image data "0" inputted to the input terminal L is selected and outputted from the output terminal P to the segment drive circuit 6. Next, the operation of the second embodiment will be explained.

FIG. 5 shows an output signal according to the comparison result of the comparison circuit 22. When the current image data from the A/D converter 4 input to the input terminal U has a maximum gradation of "7," the comparison circuit 22 compares one frame from the image memory 21 input to the input terminal V. The identification signal S0 to the selector 25 is unconditionally set to "0" (low level) and S1 is set to "1" regardless of the gradation of the image data at the time of minutes before.
(high level). Similarly, when the current image data has the minimum gradation level "0", the identification signal S0,
Both S1 are set to "1".

Furthermore, the comparison circuit 22 determines that the current image data is not "7" or "0", and that the comparison result with the gradation of the image data one frame before is "(+)4". If the value is above or below "-4", it means that the image data has changed suddenly, so the output terminal R
without outputting the gradation difference signal from to the address decoder 23,
Only the identification signals S0 and S1 to the selector 25 are output as values as shown in FIG. Similarly, the comparison result is "0"
If this is the case, on the contrary, it means that the image data has not changed at all, so that neither the gradation difference signal nor the identification signals S0 and S1 are outputted from the output terminal R to the address decoder 23.

[0021] Furthermore, the comparison result is "(+)1" to "(
+) 3” or “-3” to “-1”,
Since the image data has changed within a specific range, the comparison circuit 22 outputs the tone difference signal "U-V" from the output terminal R to the address decoder 23, and also outputs the tone difference signal "U-V" from the output terminal R to the address decoder 23.
The identification signals S0 and S1 are output as values shown in the figure.

In the normal mode, the address decoder 23 responds to the image data from the A/D converter 4 which is directly input to the input terminal A and the tone difference signal from the comparator circuit 22 which is input to the input terminal B. A designated address is generated and output from the output terminal Y to the address terminal of the ROM 24. ROM2
4 reads the previously stored image data according to the address designation from the address decoder 23 and sends it to the input terminal J of the selector 25. FIG. 7 shows the signals input to the input terminals A and B of the address decoder 23 and the RO
This shows the correspondence of image data read from M24.
If the current image data is "1" to "6" and the value of the tone difference signal is "+1" to "+3" or "-3" to "-1", then the actual tone is It is assumed that only image data of gradations in which the degree of change is slightly emphasized is stored in the ROM 24 in advance, and this data is read out.

The selector 25 selects the input terminals I, S1 as shown in FIG.
One of the image data input from J, K, and L is selected and output from the output terminal P to the segment drive circuit 6. The selection contents of this selector 25 will be explained in detail below. i) When S1="0", S1="0"

In this case, the gradation of the current image data from the A/D converter 4 and the gradation of the image data one frame before are the same and there is no change in the gradation, so the selector 25 is connected to the input terminal. The current image data directly input from the A/D converter 4 to I is outputted from the output terminal P as it is. ii) When S1="0", S1="1"

[0025]
In this case, the value of the gradation difference signal "U-V" output from the output terminal R of the comparator circuit 22 is "+1" to "+3" or "-3".
” to “-1”, and the current image data and 1
This means that there has been a change within a specific range with the image data before the frame, so the selector 25 connects the input terminal J to the ROM2
The image data inputted from 4 and shown in FIG. iii) When S1="1", S1="0"

0026
] In this case, either the current image data has the maximum gradation of "7", or the value of the gradation difference signal "U-V" output from the output terminal R of the comparator circuit 22 is "4" or more. Therefore, the selector 25 outputs the maximum gradation level "7" of the image data input to the input terminal K from the output terminal P. iii) When S1="1", S1="1"

002
7] In this case, either the current image data has the minimum gradation "0" or the value of the gradation difference signal "U-V" output from the output terminal R of the comparison circuit 22 is "-4" or less. Therefore, the selector 25 outputs the minimum gradation level "0" of the image data input to the input terminal L from the output terminal P.

[0028] In this way, only when there is a change within a specific range between the current image data and the image data one frame before, the image data that has been stored in advance in the ROM 24 and which emphasizes a slight change in gradation is read out. In other cases, the current image data, or image data with the maximum gradation or minimum gradation, is output to the segment drive circuit 6 depending on the content of the image data and the degree of change from the image data one frame before. Therefore, the amount of image data stored in advance in the ROM 24 can be significantly reduced, and the required storage capacity of the ROM 24 can be reduced.

For example, when the image data is 3 bits, R is simply used to obtain appropriately emphasized image data from the current image data and the image data from one frame before.
When storing an image data table in the OM 24 in advance, the ROM 24 requires a storage capacity corresponding to 64 addresses (8×8); however, in FIG.
6, the same effect can be obtained with only the storage capacity corresponding to 36 addresses.

[0030]

As described in detail above, according to the present invention, in a liquid crystal panel driving device that displays an image using a liquid crystal panel that responds cumulatively, input digital image data is
comprising an image memory for storing frames, and an image table consisting of a ROM or the like storing a table of image data determined by two inputs: the digital image data and the image data read out from the image memory with a delay of one frame; The display drive of the liquid crystal panel is based on the image data read out from the ROM in response to the above two inputs, and when the image data changes, the display is driven in advance according to the direction and degree of the change. The optimal stored image data is read out to drive the liquid crystal panel, and the rise or fall of the light transmittance is made steep within a necessary and sufficient range to increase the response speed of the liquid crystal panel, and is effective against rapidly changing images. can also be followed quickly.

Further, according to the present invention, in a liquid crystal panel driving device that displays an image using a liquid crystal panel that responds cumulatively, an image memory that stores one frame of input digital image data; A tone difference signal is output by comparing the level with the image data read out from the image memory with a delay of one frame, while checking whether the current image data has the maximum or minimum tone, or is read out with a delay of one frame. There are cases where there is no gradation change in the image data, cases where the gradation change between the current image data and the image data read out one frame later is within a specific range, and cases where the gradation change between the current image data and the image data read out one frame later than the current image data. a comparison circuit that outputs an identification signal that identifies when the gradation change between the current image data and the above image data is larger than a specific range; An address decoder that determines a designated address based on a tone difference signal, a ROM that stores in advance a table of image data corresponding to the designated address from the address decoder, and an identification signal from the comparison circuit that determines the current image data, maximum and a selector for selecting one of gradation image data, minimum gradation image data, and image data read from the ROM, and displays the liquid crystal panel based on the image data sent from the selector. Since the drive is configured to drive, it is only necessary to store in the ROM a table of image data corresponding to the current image data and the tone difference signal when the tone change is within a specific range, so it is possible to use a small memory capacity. Although the ROM is used, the response speed of the liquid crystal panel can be increased, and it is possible to quickly follow rapidly changing images.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a circuit configuration of a first embodiment of the present invention.

FIG. 2 is a diagram showing an image data table stored in the ROM of FIG. 1;

FIG. 3 is a diagram showing the state of image data that changes in response to frame transition.

FIG. 4 is a block diagram showing a circuit configuration of a second embodiment of the present invention.

FIG. 5 is a diagram showing the contents of an identification signal output by the comparison circuit in FIG. 4;

FIG. 6 is a diagram showing selection contents corresponding to identification signals by the selector in FIG. 4;

FIG. 7 is a diagram showing the correspondence between input signals of the address decoder in FIG. 4 and image data read from a ROM.

FIG. 8 is a block diagram showing the overall circuit configuration of a conventional liquid crystal panel driving device.

FIG. 9 is a diagram showing display drive waveforms corresponding to the conversion data of FIG. 8;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1...TV antenna, 2...Tuner, 3...TV linear circuit, 4...A/D converter, 5...Synchronization control circuit, 6...Segment drive circuit, 7...Common drive circuit,
8...Liquid crystal panel, 11,21...Image memory, 12,2
4...ROM, 22...comparison circuit, 23...address decoder, 25...selector.

Claims (2)

[Claims] Claim 1: A liquid crystal panel driving device that displays an image using a liquid crystal panel, in which digital image data is input, an image memory that stores one frame of this image data, and one image data from the digital image data and the image memory.
The liquid crystal panel is controlled based on an image table storing a table of image data determined by two inputs of image data read out with a frame delay, and image data read out from the image table in response to the two inputs. 1. A liquid crystal panel driving device comprising a driving means for driving a display. 2. A liquid crystal panel driving device that displays an image using a liquid crystal panel, in which digital image data is input, an image memory that stores one frame of this image data, and one image data that is stored from the digital image data and the image memory.
A gradation difference signal is output by comparing the image data read out with a frame delay, and if the current image data is the maximum gradation or the minimum gradation, or the image data read out with a one frame delay is output. There are cases where there is no tone change, cases where the tone change between the current image data and the image data read out with a delay of one frame is within a specific range, and cases where the tone change between the current image data and the image data read out with a delay of one frame. a comparison circuit that outputs an identification signal that identifies when the gradation change is larger than a specific range; and a comparison circuit that outputs an identification signal that identifies when the gradation change is larger than a specific range; an address decoder that determines the designated address by the address decoder, an image table that stores a table of image data corresponding to the designated address from the address decoder, and an identification signal from the comparison circuit that determines the current image data and the maximum gradation. a selector for selecting image data, minimum gradation image data, or image data read from the image table; and a drive means for driving the liquid crystal panel to display based on the image data sent from the selector. A liquid crystal panel drive device comprising: