JPH04348389A - Display pattern controller - Google Patents

Abstract

PURPOSE:To display input video signals of plural systems at an optional position on a display screen in optional combination to optional size. CONSTITUTION:The composite video signals A-N are supplied to each of plural extracting means 100 in parallel through a common bus means 500. The respective extracting means 100 extract part or the whole of the composite video signals A-N corresponding to display areas to be extracted from the composite video signals A N (i.e., areas on a display means 300 determined by a display pattern). The extracted video signals (concretely, real brightness signal YR, interpolated brightness signal Y1, and color signal CR) are interpolated horizontally and vertically by plural enlargement interpolating means 200 according the enlargement rate of the display pattern on a display means 300. This interpolation is for supplementing picture elements corresponding to the number and length of scanning lines which become deficient when specific areas of the composite video signals A-N as original signals are enlarged.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display pattern control device, and more particularly to a display pattern control device suitable for a multi-vision system.

0002

2. Description of the Related Art In recent years, multi-vision systems have become known as display systems for studios, theaters, and various demonstrations. A multi-vision system combines projection TV display units vertically and horizontally to project a single image on a large screen formed by each display unit, or divides the display units into blocks to create multiple screen configurations. It is a large display system that can develop various display patterns, such as displaying completely different images on individual display units.

Development of various display patterns in such a display system is controlled by a display pattern control device called a multi-video processor. Display patterns can be roughly divided into a single screen in which the same image is displayed from each display unit, and an enlarged screen in which a large screen is developed using some or all of specific display units.

0004

[Problem to be Solved by the Invention] According to the conventional display pattern control device, when an image is enlarged, the vertical and horizontal directions are enlarged at the same magnification, so the vertical and horizontal ratios are the same, and the enlarged image is The image becomes similar to the original image. Further, since only one system of video signals is input to the display pattern control device, a uniform display pattern is obtained. As described above, according to the prior art, it is difficult to display images of different aspects (positions, sizes, and combinations) in various patterns.

An object of the present invention is to provide a display pattern control device capable of displaying a plurality of input video signals at any position on a display screen, in any size, and in any combination. There is a particular thing.

[0006]

[Means for Solving the Problems] In order to solve the above problems, the invention as set forth in claim 1 has a structure in which a plurality of mutually independent display units 400 are combined, for example, vertically and horizontally, as shown in FIG. On the display screen of the displayed display means 300,
In a display pattern control device that controls to display one or more images based on a plurality of input composite video signals A to N in an arbitrary display pattern, the input composite video signal A
Extracting means 100 for independently extracting a video signal corresponding to a display area to be extracted from N to N for each of the input composite video signals A to N; Enlargement interpolation means 2 that performs interpolation processing on the signal in the horizontal and vertical directions according to the enlargement ratio on the display screen of the display means 300, and outputs the enlarged and interpolated video signal to each of the corresponding display units 400;
00, and common bus means 500 for supplying all of the plurality of input composite video signals A to N to each of the extraction means 100 in parallel.

[0007] According to a second aspect of the invention, the extraction means 100 includes a video selection means for selecting and outputting one of a plurality of input composite video signals based on a video selection signal, and one field of the selected video signal. or an image memory for storing one frame. According to a third aspect of the invention, the extraction means 100 are provided in the same number as the display units 400, corresponding to each of the display units 400.

According to the fourth aspect of the invention, the enlargement interpolation means 20
0 are provided in the same number as the display units 400, corresponding to each of the display units 400.

[0009]

[Operation] According to the invention as claimed in claim 1, the composite video signal A
~N is a plurality of extraction means 10 via a common bus means 500
0 in parallel. Therefore, each extraction means 100 can selectively extract any one of the composite video signals A to N. Each extracting means 100 extracts part or all of the composite video signals A to N necessary for each of the composite video signals A to N in correspondence with the display area (that is, the area on the display means 300 determined by the display pattern) to be extracted from each of the composite video signals A to N. Extract. The extracted video signal (specifically,
The actual luminance signal YR, the interpolated luminance signal YI, and the color signal CR) are enlarged and interpolated in the horizontal and vertical directions by a plurality of enlargement interpolation means 200 according to the enlargement ratio of the display pattern on the display means 300. This interpolation is an effect of replenishing pixels corresponding to the number and length of scanning lines that are insufficient when a predetermined area of the composite video signals A to N, which are the original signals, is expanded. The video signals interpolated in this way are provided to the corresponding display units 400 on the display means 300, respectively. As a result, it becomes possible to develop the composite video signals A to N in any size at any position on the display means 300.

According to the invention as claimed in claim 2, the extraction means 1
At 00, the video selection means selects one of the video signals based on the video selection signals c to e. One field (or one frame) of the selected video signal is stored in the field memory 12. In this way, the extraction means 100
selectively extracts any one of the composite video signals A to N.

According to the invention recited in claim 3, the extraction means 1
00 are provided in the same number as the display units 400, and each of the video signals to be displayed on each display unit 400 is extracted on a one-to-one basis. This makes it possible to simplify signal processing and facilitate development of display patterns on the display means 300. According to the invention described in claim 4, the enlargement interpolation means 200 are provided in the same number as the display units 400, and enlarge and interpolate each of the composite video signals A to N to be displayed on each display unit 400 on a one-to-one basis. . This makes it possible to simplify signal processing and facilitate development of display patterns on the display means 300.

0012

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, preferred embodiments of the present invention will be described with reference to the drawings. [i] Overview of multi-vision system FIG. 2 shows a general block diagram of a multi-vision system to which the present invention is applied. As shown in FIG. 2, a plurality of composite video signals A to N are input to the display pattern control device 1. The display pattern control device 1 controls the input composite video signals A to N according to the display pattern specified by the screen control signal a.
A composite video signal is output to each of the display units U1 to U16 of the image display device 2, with the display position and size of the video signals specified on the image display device 2. The image display device 2 displays the given composite video signal on each display unit U1 to U16, and as a result, any display specified by the screen control signal a is displayed on one screen formed by the display units U1 to U16. Project images in patterns.

Composite video signals A to N are individually provided from a plurality of input source devices. As an input source device,
For example, LVD (Laser Vision Disk)
) player, BS (Broadcasting Sa
tellite) tuner, TV (Televisio)
n) A tuner, video camera, character generator, character multiplex tuner, etc. can be connected. Note that although the composite video signals A to N from these input source devices are not synchronized with each other, processing for synchronization will be described later.

The display pattern control device 1 is constructed using a microprocessor, the details of which will be described later. The image display device 2 has four vertical display units U1 to U16,
It is constructed by combining 4 pieces horizontally, 16 pieces in total, in a matrix. The display units U1 to U16 are so-called projection TV type display units, and display images by projecting light from three primary color projectors of R, G, and B housed inside onto a projection screen made of a Fresnel lens or the like. It was designed to be displayed. Note that, if necessary, the present invention can be applied to an image display device 2 that similarly combines a CRT (Cathode Ray Tube) or a liquid crystal display.

[ii] Display pattern control device FIG. 3 shows an embodiment of the display pattern control device according to the present invention. Figure 3
As shown in FIG. 3, the display pattern control device 1 has input processing circuits 3-A to 3-D that correspond one-to-one to a plurality of (four in FIG. 3) composite video signals A to D. These input processing circuits 3-A to 3-D are connected to a local bus 7 and a common bus 8.
It is connected to video selection means 4-1 to 4-n via. The video selection means 4-1 to 4n are provided in one-to-one correspondence to the display units U1 to U16 of the image display device 2. Therefore, this n is 16 in this embodiment. The video selection means 4-1 to 4-n are similarly connected to video enlargement and interpolation means 5-1 to 5-n provided in one-to-one correspondence with the display units U1 to U16 of the image display device 2. The output terminals of the image enlargement interpolation means 5-1 to 5-n are connected to each of the display units U1 to U16 of the corresponding subscript of the image display device 2. The controller 6 is for controlling each of the above elements according to instructions from the screen control signal a, and outputs a circuit control signal b generated based on the synchronization signal Sync and the screen control signal a to each element.

The input processing circuits 3-A to 3-D all have the same configuration, and each has a synchronizer, a Y/C separation circuit, and an interpolation circuit (not shown). The synchronizer is for mutually synchronizing each composite video signal A to D. That is, as described above, since each of the composite video signals A to D is provided from separate input source devices, they are not synchronized with each other or with the screen display means 2. If input as is to the image selection means 4-1 to 4-n, a high-quality image cannot be formed. Therefore, each of the composite video signals A to D is synchronized with the synchronization of the screen display means 2 using this synchronizer.

The Y/C separation circuit is used to separate and process a Y signal (luminance signal) and a C signal (chrominance signal) when interpolation is performed by an interpolation circuit to be described later. The interpolation circuit enlarges the scanning lines associated with the enlargement process when the composite video signals A to D are enlarged by the image selection means 4-1 to 4-n and the image enlargement interpolation means 5-1 to 5-n, which will be described later. This is to increase the pixel density in advance in order to prevent the pixel density from becoming coarse due to a decrease in the number and length. Therefore, each of the input processing circuits 3-A to 3-D also outputs interpolated data. The data includes an actual luminance signal YR which is the Y signal of the original signal, an interpolated luminance signal YI, and a color signal CR of the original signal. Since the interpolated luminance signal YI is generated in this way,
Apparently, the number of scanning lines is doubled.

The local bus 7 is connected to each input processing circuit 3-A.
~ 3-D for transmitting digital data of the actual luminance signal YR, interpolated luminance signal YI, and color signal CR, each of the actual luminance signal YR, interpolated luminance signal YI, and color signal CR. If 8 bits are assigned to , the total number of wires is 8 bits x 3 = 24. Each local bus 7 is connected to a common bus 8.

The common bus 8 receives the actual luminance signal YR, interpolated luminance signal YI, and color signal CR from each local bus 7.
Video selection means 4-1 to 4-
8 bits x 4 = 32 lines for the actual luminance signal YR, 32 lines for the interpolated luminance signal YI, and 32 lines for the color signal CR, total 32 x 3 = 96 lines. Consists of a group of wires in a book. In this way, since the common bus 8 is connected in parallel to each video selection means 4-1 to 4-n, each video selection means 4-1 to 4-n
In this case, composite video signals A to D can be arbitrarily selected. As a result, each video selection means 4-1 to 4-n all select composite video signal A, or composite video signal A to D
This allows for free selection, such as selecting an appropriate combination of

Next, referring to FIG. 4, the video selection means 4-1
4-n and the image enlargement interpolation means 5-1 to 5-n will be explained in detail. Note that the video selection means 4-1 to 4-n all have the same hardware configuration, so the video selection means 4-1 will be explained as a representative example in FIG. This means that
The same applies to the image enlargement interpolation means 5-1 to 5-n.

The image selection means 4-1 selects the actual luminance signal YR,
3 corresponding to the interpolated luminance signal YI and color signal CR
selectors 9, 10, 11, and each selector 9, 10,
It has field memories 12, 13, and 14 that individually store the 11 output data. Selector 9
is each actual luminance signal YR for composite video signals A to D.
(8-bit data each) is input to selector 9.
selects one of the actual luminance signals YR from the composite video signals A to D according to the video selection signal c. Selector 1
0 is input with each interpolated luminance signal YI (each 8-bit data) for the composite video signals A to D,
The selector 10 selects the composite video signal A according to the video selection signal d.
Interpolated luminance signal YI of any one of ~D
Select. Each color signal CR (each 8-bit data) of the composite video signals A to D is input to the selector 11, and the selector 11 selects the color signal CR of any one of the composite video signals A to D according to the video selection signal e. select. The field memory 12 reads the actual luminance signal YR selected by the selector 9 as a read/write enable signal f.
Accordingly, only the amount of data corresponding to the content to be displayed on the display device is stored. Similarly, the field memory 13 stores the interpolated luminance signal YI selected by the selector 10 in an amount corresponding to the data to be displayed on the display according to the read/write enable signal g. Similarly, the field memory 14 stores the color signal CR selected by the selector 11 in an amount corresponding to the data to be displayed on the display according to the read/write enable signal h. In addition, field memories 12, 13, 14
may be used as a frame memory if capacity permits.

FIG. 5 is a functional explanatory diagram of the selector 9. The selector 9 selects and outputs one of the composite video signals A to D according to the video selection signal c, but the horizontal cutting pulse HW and the vertical cutting pulse for cutting out the video included in the read/write enable signal f are Only the cutout video data D1 portion of the area specified by VW will be sent to the field memory 12. Therefore, by setting the time width and timing of the horizontal cutting pulse HW and the vertical cutting pulse VW by the controller 6 using the screen control signal a, it is possible to extract video data at any position in any size. becomes. In addition, field memory 1
The readout from 2 is controlled to take one field time regardless of the cutting width, that is, the number of written pixels. Therefore, the narrower the cutting width is, that is, the larger the enlargement ratio, the more discretely the data will be read out.

The image enlarging interpolation means 5-1 is roughly divided into a system for interpolating luminance signals, a system for interpolating color signals, and an output luminance signal Y, an output color signal C, or an output composite image from these interpolated signals. The system includes a system for generating a signal V. In a system that interpolates luminance signals, field memory 1
The actual luminance signal YR read from 2 is sent to the 1H delay circuit 15.
The delayed luminance signal YRS is delayed by 1H, and the delayed luminance signal YRS is input to the vertical interpolation circuit 21. On the other hand, the interpolated luminance signal YI read from the field memory 13 is 1H
The delayed luminance signal YIS is delayed by 1H by the delay circuit 16 and is input to the vertical interpolation circuit 21. The vertical interpolation circuit 21 outputs a delayed luminance signal YRS and a delayed luminance signal Y.
The luminance data of the scanning line between the delayed luminance signal YRS and the delayed luminance signal YIS is estimated by multiplying IS by a predetermined appropriate coefficient, and a vertically interpolated luminance signal YL of the new interpolated scanning line is obtained.
generate. Next, the vertical interpolation luminance signal YL is input to the horizontal interpolation circuit 27. The horizontal interpolation circuit 27 estimates the pixel data between the adjacent pixel data based on the adjacent pixel data in the vertical interpolated luminance signal YL in synchronization with the system clock (4fsc), which has a sampling frequency that is four times the frequency of the color subcarrier. Then, a horizontal interpolated luminance signal YD, which is new interpolated pixel data, is generated. A blanking signal from a blanking level generator 29 is added to this horizontally interpolated luminance signal YD in an adder 30, and then converted into an analog signal by a D/A converter 33. Hsync and Vsync synchronization signals are added to the luminance signal converted into an analog signal by an adder 36, and the resultant signal is sent to a driver 38. The driver 38 amplifies the luminance signal expanded and interpolated in this way and outputs it as an output luminance signal Y.

Next, in the color signal interpolation system, the color signal CR read out from the field memory 14 is
The 1H delay circuits 17, 18, 19, and 20 produce a delayed color signal CRS and a delayed color signal CIS, and the vertical interpolation circuit 2
2 is input. The vertical interpolation circuit 22 receives the delayed color signal CRS.
and the vertically interpolated color signal C of the scanning line between the delayed color signal CRS and the delayed color signal CIS based on the delayed color signal CIS.
Generate L. Next, the vertically interpolated color signal CL is sent to the horizontal interpolator 2.
8 is input. The horizontal interpolation circuit 28 rearranges the intervals between adjacent pixel data in the vertically interpolated color signal CL to match the frequency format of a predetermined color subcarrier to generate a horizontally interpolated color signal CD. A color burst signal from a burst generator 31 is added to this horizontally interpolated color signal CD in an adder 32, and then D/
The A converter 34 converts the signal into an analog signal. The converted color signal is sent to the driver 40. driver 4
0 amplifies the enlarged and interpolated color signal in this way and outputs it as an output color signal C.

On the other hand, the output signal of the adder 36 and the output signal of the D/A converter 34 are added in an adder 37,
It is amplified by the driver 39 and output as an output composite video signal V. The output luminance signal Y thus expanded and interpolated
And the output color signal C or the output composite video signal V is given to the display unit U1. The display unit U1 displays an image formed by the applied output brightness signal Y and output color signal or output composite video signal V.

[iii] General operation Next, the general operation of the present invention will be explained. Now, the composite video signals A to C are processed by the input processing circuits 3-A to 3-C (FIG. 3), and the actual luminance signal YR regarding the composite video signals A to C is
Suppose that is input to the selector 9 (FIGS. 4 and 6). The selector 9 selects the composite video signal A based on the video selection signal c, and outputs the actual luminance signal YR of the corresponding area as shown in FIG. 6 based on the read/write enable signal f based on the principle shown in FIG.
cut out. In other words, regarding the composite video signal A, FIG.
The horizontal cutting pulse HW and the vertical cutting pulse VW are set as shown in "A", and a portion corresponding to the display unit U1 is extracted and written into the field memory 12. Regarding the composite video signal B, a horizontal cutting pulse HW and a vertical cutting pulse VW covering the entire area are set as shown in FIG. 6B, and a portion corresponding to the display unit U3 is extracted. Furthermore, regarding the composite video signal C, FIG.
The horizontal cutting pulse HW and the vertical cutting pulse VW are set as shown in "C", and a portion corresponding to the display unit U15 is extracted. The above are display units U1 and U3
, U15 are extracted, but the actual luminance signal YR of the corresponding portion is similarly extracted for other display units by the selector 9 for each display unit. Further, regarding the color signal CR, the color signal CR of the necessary area is extracted by the same operation as described above. The actual luminance signal YR, interpolated luminance signal YI, and color signal CR extracted in this way are outputted to the image enlarging interpolation means 5-1.
By enlarging and interpolating the images, it is possible to simultaneously display images in various different formats as shown in FIG.

Examples of display patterns controlled by the present invention are shown in FIGS. 7(a) to 7(f). 7(a) is an example in which the composite video signal A is displayed using all display units U1 to U16, and FIG. 7(b) is an example in which the display units U1 to U16 are divided into four blocks, and each block is assigned a composite video signal A to
An example in which D is displayed, FIG. 7(c) is an example in which only the composite video signal A is enlarged and the composite video signal B is displayed at the same magnification as the original video.
Figure 7(d) shows an example of multiple display of composite video signal A by changing the magnification, and Figure 7(e) shows the effect of displaying composite video signal A by sequentially switching display units so that the image appears to move in a spiral pattern. The example shown in FIG. 7(f) is an example in which the effect of the present invention is best expressed, and is an example in which one video (composite video signal A) is enlarged at different vertical and horizontal magnifications to form a variety of display patterns. be.

In the above embodiment, the display means has 16 display screens, but it can also be configured with other plural screens. Furthermore, although the input processing circuit has been configured to generate the interpolated luminance signal YI, it is also possible to configure the input processing circuit to not generate this, and in this case, the bus is 8×2.
×4=64 pieces.

[0029]

As described above, according to the present invention, a plurality of composite video signals are applied in parallel to a plurality of extraction means via a common bus means, and each extraction means inputs the video signal of a necessary display area. Since each composite video signal is extracted independently and the extracted video signals are individually enlarged and interpolated, any video can be placed at any position on the screen of the display means and in any size. , and can be displayed in any combination, allowing control over a variety of display patterns.

[Brief explanation of the drawing]

FIG. 1 is a diagram explaining the principle of the present invention.

FIG. 2 is a schematic block diagram of a multi-vision system to which the present invention is applied.

FIG. 3 is a block diagram of an embodiment of a display pattern control device according to the present invention.

FIG. 4 is a detailed block diagram of a video selection means and a video enlargement interpolation means.

FIG. 5 is an explanatory diagram of the function of a selector.

FIG. 6 is an explanatory diagram of a general operation of the present invention.

FIG. 7 is an explanatory diagram of an example of a display pattern according to the present invention.

[Explanation of symbols]

100...Extraction means 200...Enlargement interpolation means 300...Display means 400...Display unit 500...Common bus means 1...Display pattern control device 2...Image display devices 3-A to 3-D...Input processing circuits 4-1 to 4- n...Video selection means 5-1 to 5-n...Video enlargement interpolation means 6...Controller 7...Local bus 8...Common bus 9 to 11...Selectors 12 to 14...Field memories 15 to 20...1H delay circuit 20...Adder 21...Vertical interpolation circuit 22...Vertical interpolation circuit 27...Horizontal interpolation circuit 28...Horizontal interpolation circuit 29...Blanking level generator 30...Adder 31...Burst generator 32...Adder 33...D/A converter 34...D/ A converter 35... Synchronous signal addition circuit 36... Adder 37... Adders 38 to 40... Drivers A to N... Composite video signal a... Screen control signal b... Circuit control signal c to e... Video selection signal f to h... Lead /Write enable signal YR...Actual luminance signal YI...Interpolated luminance signal YRS, YIS...Delayed luminance signal YL...Vertical interpolated luminance signal YD...Horizontal interpolated luminance signal CR...Color signal CRS, CIS...Delayed color signal CL...Vertical interpolation Color signal CD ... Horizontally interpolated color signal Sync ... Synchronization signal Y ... Output luminance signal V ... Output composite video signal C ... Output color signal HW ... Horizontal cutting pulse VW ... Vertical cutting pulse D1 ... Cutting video data U1 ~U16…Display unit

Claims (2)

[Claims] Claim 1: Displaying one or more images based on a plurality of input composite video signals in an arbitrary display pattern on a display screen of a display means formed by combining a plurality of mutually independent display units. In the display pattern control device for controlling the display pattern, an extraction means for independently extracting a video signal corresponding to a display area to be extracted from the input composite video signal for each of the input composite video signals, and each of the extracted video signals. In each case, the extracted video signal is expanded and interpolated in the horizontal and vertical directions according to the magnification ratio on the display screen of the display means, and the expanded and interpolated video signal is displayed on each of the corresponding display units. A display pattern control device comprising: an enlarged interpolation means for outputting an output; and a common bus means for supplying all of the plurality of input composite video signals to each of the extraction means in parallel. 2. The display pattern control device according to claim 1, wherein the extraction means includes a selector that selects and outputs one of a plurality of input composite video signals based on a video selection signal; 1 field or 1 of
A display pattern control device comprising: an image memory that stores frames.