JPH0431772A - Service interruption detecting circuit - Google Patents

Abstract

PURPOSE:To conduct setting of time arbitrarily and to enable detection of lowering of an AC supply voltage with little error by discriminating the lowering on the basis of a peak value of the waveform of the voltage. CONSTITUTION:The lowering of a peak value of an AC supply voltage below a prescribed value is detected by a comparator 6, an AND gate 10, etc. and a service interruption detection signal 8 is outputted through a capacitor C1, resistors R1 and R2, a diode D1, a comparator 12, etc. By detecting the lowering of the peak value of the AC voltage, accordingly, service interruption is detected quickly irrespective of a filter delay time for smoothing a supply rectified voltage and thereafter the service interruption detection signal 8 is outputted after the lapse of an appropriate delay time matched with the speed of lowering of the voltage of a smoothing capacitor 3.

Description

[Detailed description of the invention] [Industrial application field]

The present invention relates to a circuit that detects a drop in input AC voltage in order to protect a system consisting of a power supply device that inputs AC voltage and a load such as a control device that is supplied with power from the power supply device. When the load mentioned above is a control device using a computer, etc., it is necessary to perform power outage preparation operations such as saving necessary data to backup RAM when the power decreases, so before the output of the power supply actually starts to decrease, A power outage detection signal is required. Note that in the following figures, the same reference numerals indicate the same or corresponding parts.

[Conventional technology]

FIG. 3 shows an example of the configuration of a system including this type of power failure detection circuit. In the figure, 01 is an AC power supply, 1 is a transformer,
2A and 2B are diode bridges that rectify the output voltages of the windings IA and IB of this transformer 1, 3 is a smoothing capacitor that smoothes the rectified output voltage of the diode bridge 2A, and 4 is a DC/DCC/formula-ta. power supply,
11 is its load (in this example, a control device). Also F
L is a filter that smoothes the rectified output voltage of the diode bridge 2B, and 6 is a comparator that compares the output voltage of this filter FL with a predetermined detection level S. As shown in Figure 3, future power failure detection circuits will rectify the AC power supply voltage from transformer 1, convert it to DC voltage through filter FL for ripple removal, and then compare this voltage with drop detection level S. power outage detection signal 8 was generated. In this case, instead of detecting a power outage instantly,
Due to the presence of the smoothing capacitor 3, the power supply 4, and therefore the load 11, can operate normally for a while after a power outage, so during this time, the computer in the load 11 performs power outage preparation operations (e.g., saving necessary data to a backup RAM). Even if the power outage detection signal is issued earlier by the time taken to perform this preparation operation, there will still be some waiting time after the power outage until the power outage detection signal is output, and this power outage detection waiting time is It has been obtained by choosing the discharge time constant of .

[Problem B that the invention attempts to solve]

The filter FL in FIG. 3 is a diode bridge 2B.
It must be able to satisfy two time constants: a discharge time constant based on its role in removing ripples from the rectified output voltage of the circuit, and a discharge time constant in order to appropriately obtain the power failure detection waiting time. However, depending on the type of load, there are some cases in which the above-mentioned power failure detection waiting time must be particularly shortened, and if this is attempted, there is a problem that the time constant necessary for ripple removal cannot be secured. Further, in a capacitor input type circuit that is common in small to medium capacity power supply devices, such as the circuit of the smoothing capacitor 3 shown in FIG. 3, only the vicinity of the peak value of the AC power supply voltage is involved in charging the capacitor 3. In other words, the power supply device 4 at a voltage near the AC peak
The 0 input rectified voltage is determined, but since the power outage detection circuit uses the value obtained by multiplying the full-wave rectified waveform by the filter FL as the AC voltage detection value, the output voltage of the smoothing capacitor 3 and the output voltage of the filter FL do not exactly correspond. If the waveform is distorted, especially in single-phase AC, the error between the input DC voltage of the power supply 4 and the detection voltage of the power failure detection circuit will become large, and the power failure detection will be difficult between the power supply 4 side and the power failure detection circuit side. There was also the problem of a lack of coordination. Therefore, it is an object of the present invention to provide a power failure detection circuit that can solve the above-mentioned problems.

[Means to solve the problem]

In order to solve the above problems, the circuit of the present invention detects that the peak value of the AC power supply voltage r (via the comparator 6, AND gate 10, etc.) has fallen below a predetermined value (via the capacitor C1, the resistor RLR2, etc.) , diode D1, comparator 12, etc.) outputs a power failure detection signal (8, etc.).

[For use]

By detecting the drop in the peak value of the AC voltage, a power outage can be quickly detected regardless of the filter delay time for smoothing the power supply rectification voltage, and then after an appropriate delay time that matches the voltage drop speed of the smoothing capacitor 3. , a power outage detection signal 8 is output.

【Example】

FIG. 1 is a circuit diagram as an embodiment of the present invention, and corresponds to FIG. 3. Further, FIG. 2 is a waveform diagram for explaining the operation of the main part of FIG. 1. FIG. 1 corresponds to FIG. 3, and only the power failure detection circuit is different. Next, the configuration and operation of the main parts shown in FIG. 1 will be explained with reference to FIG. 2. That is, in FIG. 1, 6 (6A, 6B> is a comparator that compares the instantaneous level of the AC voltage of the transformer winding IB as the detection voltage of the AC power supply 01 with the detection level VSI, and 6A is the positive half wave of the input AC voltage. However, in 6B, by inverting the input AC voltage through the inverting amplifier 9, the absolute value of the negative half wave of the input AC voltage becomes the detection level VSI.
When it exceeds this state, it outputs an “L” signal, and in other than this state, it outputs a “L” signal.
Outputs a signal of "H". Figure 2 (1) shows the transformer winding I.
B voltage waveform (power supply detection waveform) and this comparator 6
A, showing the relationship with the detection level VSI by 6B,
10 is the AND of the output signals of the comparators 6A and 6B.
The waveform of the output signal of the AND gate that takes the conditions becomes as shown in Figure 2 (2), and the absolute value of the peak value of the AC power supply detection voltage exceeds the detection level VSI (i.e., before time t1 in the figure). In the normal state), the AND gate 10 repeats alternately outputting "H" and "L" signals, but as after time t1 in FIG. 2, the absolute peak value of the AC power supply detection voltage When the value falls below the detection level ■S1 (that is, power outage condition B), the AND gate 10 continues to output an "H" signal. In this way, the comparator 6 and the AND gate 10 monitor the decrease in the peak value of the AC power supply voltage. Next, capacitor C1, resistors R1, R2, diode D1
, the comparator 12 constitutes a timer circuit that creates a power outage detection waiting time TW from when the drop in the peak value of the AC power source is detected to when the power outage detection signal 8 is output to the load 11. In this case, the values of resistors R1 and R2 are R1(R2
has been selected. That is, the capacitor C1 is slowly charged via the high resistance R2 by the "H" output signal of the AND gate 10, and rapidly charged via the diode DI and the resistor R1 by the "L" output signal of the AND gate 10. Discharged. Therefore, as shown in FIG. 2 (3), the voltage across the capacitor C1 hardly increases before time t1, and after time t1, it gradually increases with the time constant of R2·C1. The comparator 12 compares the voltage of this capacitor C1 with a predetermined voltage (detection time level) VS2, and at the time L2 when the capacitor C1 voltage exceeds the level VS2 as shown in FIG. Outputs 8. In this way, the period from time t1 to t2 becomes the power failure detection waiting time TW.

【Effect of the invention】

According to the present invention, since a drop in AC power supply voltage is determined by the peak value of its waveform, the following effects can be obtained. - There is no need to apply a filter to the power failure detection waveform, and a delay element (filter, timer) can be used only for the detection waiting time TW, so the time can be set arbitrarily. ■For capacitor input type power supplies, even if the AC waveform is distorted, the input capacitor voltage (VD in Figure 1)
For C), it is possible to detect a drop with less error than in the past.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a configuration as an embodiment of the present invention, FIG. 2 is a waveform diagram for explaining the operation of the main part of FIG. 1, and FIG. 3 is a conventional circuit diagram corresponding to FIG. 1. be. 01: AC power supply, 1 Nidorance, LA, IB: Winding, 2
A: Diode bridge, 3: Smoothing capacitor, 4: Power supply, 6 (6A, 6B):, 12: Comparator, 8: Power failure detection signal, 9: Inverting amplifier, 10: AND gate, 11: Load, C1: Capacitor , RIR2: Resistor, D1=Diode, VSI: Detection level, VS2: Detection time level, TW: Power outage detection waiting scene 6

Claims (1)

[Claims] 1) A power outage detection circuit that detects that the peak value of AC power supply voltage has fallen below a predetermined value and outputs a power outage detection signal.