JPS6229962B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit that observes voltages, currents, and other fluctuations of various power sources and detects power source abnormalities, load abnormalities, and the like.

Figure 1 shows a power failure/return detection circuit, which is an example of a conventional power supply monitoring circuit.
A multi-phase AC power supply to detect power restoration, 2 a rectifier transformer, 3 a rectifier circuit, 12 an input resistor connected to the inverting input terminal of the comparator, and 13 a reference signal connected to the non-inverting input terminal of the comparator 14 is a comparator, and 15 is a feedback resistor connected between the output terminal of the comparator and the non-inverting input terminal for creating a hysteresis characteristic.

The conventional power failure/return detection circuit is configured as described above, and has only one comparator 14, and when used for detecting a power failure in an uninterruptible power source, particularly fast operation is required for power failure detection. So,
There is usually almost no delay time. For this reason, if the AC power source 1 is a power source with large voltage fluctuations, such as a small generator, a power outage may be detected due to voltage transformation fluctuations.

In order to prevent this false detection, it is necessary to select a low power failure detection level for the comparator, but there is usually a lower limit to this value.

The feedback resistor 15 is provided to prevent repeated detection of power failure and power restoration, and the power restoration detection level is normally set several percent higher than the power failure detection level.

As mentioned above, in the method of detecting a power outage and power restoration using a single comparator, the detection level can be set in the case of a power supply system with large voltage fluctuations, or in cases where the power outage and power restoration detection conditions are complex at multiple levels. The drawback was that it was difficult to

SUMMARY OF THE INVENTION An object of the present invention is to obtain a power supply observation circuit that can satisfy various detection specifications when detecting an abnormality in the power supply state.

An embodiment of the present invention will be described below with reference to the drawings. FIG. 2 is a circuit diagram showing an embodiment of the present invention, in which 1 to 3 and 12 to 15 have the same configuration as the conventional device, and 20, 21
22 is the input resistance of the comparator 24, 23 is the reference signal source, 24 is the comparator, 25 is the feedback resistor for creating hysteresis characteristics, and 90 is the AND gate circuit. be. In addition, in the same figure, in each signal indicated by an alpha abbreviation, V ₁ is a polyphase AC rectified waveform, and V ₂ is the signal of V ₁ smoothed through a resistor 20 and a capacitor 21, that is, at a predetermined time determined by these constants. is a signal delayed by a constant,
V ₁ and V ₂ are input signals of the comparator 14 and the comparator 24, respectively. Further, A and B are the output logic signals of the comparator 14 and the comparator 24, respectively, and X is the output signal of the AND gate circuit 90.

The power supply monitoring circuit according to the present invention is constructed as described above, and its operation will be explained with reference to FIGS. 3 and 4.

3A, 3B, and 3C are signal waveform diagrams of each part for explaining the operation at the time of power outage, and FIG. 4 for explaining the operation at the time of power restoration, respectively.

Assume that the power source 1 in FIG. 2 is a three-phase AC power source, the rectifier circuit 3 is a three-phase full-wave rectifier circuit, and the rectified waveform V ₁ is as shown in FIGS. 3 and 4, respectively. Note that the values of the reference signals Ref1 and Ref2 of each comparator 14 and 24 in FIG. 2 are constant values as shown in FIG.
Due to the hysteresis characteristics of 4 and 24, respectively
Let the values of Ref1+ _α1 and Ref2+ _α2 be constant values as shown in FIG. Moreover, each comparator 14, 24 in FIG _.
＞Ref1, V ₂ ＞Ref2, the output is 1, and when power restoration is detected, V ₁ ＞Ref1+α ₁ , V ₂ ＞
It is assumed that the output is 1 when Ref2+ _α2 .

It is assumed that the magnitudes of the two reference signals are set such that Ref1>Ref2. In addition, the final output signal
is a signal where 1 means a normal state and 0 means a power outage state.

FIG. 3a shows the waveforms of various parts when the rectified waveform _V1 becomes 0 in a stepwise manner at time _t10 . In this case, the comparator 14 operates at _t10 and A=0, resulting in a power failure detection state X=0.

FIG. 3b shows the waveforms of various parts when the rectified waveform _V1 drops for a short time at time _t20 . In this case, if the smoothed form V ₂ does not become smaller than Ref2, both the comparator 14 and the comparator 24 do not change their states, that is, a power failure is not detected.

FIG. 3c shows various waveforms when the rectified waveform _V1 fluctuates between Ref1 and Ref2 for a long time. In this case, the smooth waveform V ₂ gradually becomes smaller until time t ₃₀
The state of the comparator 24 changes and B=0,
Power outage detection state X=0.

From the above explanation, FIGS. 3b and 3c show operations specific to this invention, which have the following meanings. In other words, a short-term drop between Ref2>V ₁ >Ref1 will not be detected as a power outage, but if this state continues for a long time, it will be regarded as a power outage and a detection operation will be performed. Also, of course, an instantaneous power outage detection operation is performed for a drop below Ref1.

In addition, in the above explanation, when the output logic value This means that the final output X is in power failure detection mode.

Next, FIG. 4 shows waveforms of various parts when power is restored.

As shown in the figure, if the rectified waveform V ₁ is gradually restored, the comparator 14 becomes power restoration detection A=1 at t ₄₀ and further, the comparator 24 becomes power restoration detection B=1 at t ₄₁ . Therefore, since the power recovery detection mode of the AND gate circuit 90 is the AND of the output logic signals A and B of the two comparators,
At _t41 , power restoration is detected and X=1.

From the above explanation of FIGS. 3 and 4, it can be seen that the operation of the power failure/recovery detection circuit according to the present invention has the following meaning. In other words, in power failure detection, there are three ranges of power supply voltage divided by two reference signals Ref1 and Ref2: V>Ref2, Ref2>V.
The detection operation is different for >Ref1 and Ref1>V, and in power recovery detection, V>Ref2+α ₂
It has the characteristic of detecting only a complete power restoration state.

The present invention is applicable not only to power failure/return detection, but also to detection of overvoltage, low voltage, overcurrent, etc., with various detection specifications based on the same concept.

Furthermore, it goes without saying that the various detections described above are possible not only with polyphase AC power supplies but also with DC power supplies.

As explained above, according to the present invention, by using two comparators each having a different time constant in the input circuit, the power supply observation conditions are changed at each stage of the power supply voltage and current value, and various detection specifications can be satisfied. This has the effect of providing a power supply observation circuit that can perform

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an example of a conventional power supply monitoring circuit, FIG. 2 is a circuit diagram showing an embodiment of the present invention,
3 and 4 are signal waveform diagrams of various parts for explaining the operation of the circuit of FIG. 2. In the figure, 14 and 24 are comparators, 2
0 and 21 are resistors and capacitors forming a delay circuit, and 90 is an AND gate circuit. Note that the same reference numerals in each figure indicate the same or equivalent parts.

Claims (1)

[Claims] 1 A power supply voltage signal that is proportional to the voltage waveform of the DC power supply or to its rectified voltage waveform of the multiphase AC power supply is input to the first inverting input terminal via the first input resistor, and the first a first comparator into which a reference signal is input to a first non-inverting input terminal; The power source includes a first feedback resistor having a hysteresis characteristic of a delay circuit that outputs a delayed signal obtained by delaying a voltage signal by a predetermined time constant to a connection point between the resistor and the capacitor; and a delay circuit that outputs a delayed signal obtained by delaying the voltage signal by a predetermined time constant; a second comparator into which a second reference signal greater than the first reference signal is input to a second non-inverting input terminal;
A second comparator connected between the output terminal of the second comparator and the second non-inverting input terminal and providing a predetermined hysteresis characteristic to the second comparator.
A power supply observation circuit comprising: a feedback resistor; and an AND gate circuit that performs a logical product of the output signals of the first and second comparators.