JPH04286438A - Atm cross connect device - Google Patents

Abstract

PURPOSE:To realize large capacity without being affected by a reply response time of a control system by suppressing the increase in the circuit scale in the extension form in which the configuration resulting from eliminating a control section from an ATM cross connect device of common buffer configuration with less circuit scale is used as a basic module and plural basic modules are connected with respect to the device where the line is set by the replacement of cells multiplexed in the ATM (asynchronous transfer mode). CONSTITUTION:The device is provided with plural input ports 11, output ports 15, plural basic modules 12 having a buffer 43 in common to the ports, a spatial switch network 13 fetching a cell of the output port 15 of each basic module 12 and outputting the cell to a prescribed output port through routing, and a control means controlling a cell 40 sent from each basic module 12 to the spatial switch network 13 to avoid cell contention in the spatial switch network 13.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an ATM (asynchronous transfer mode) cross-connect device that performs line setup by exchanging multiplexed cells in ATM (Asynchronous Transfer Mode). The line setting function (cross-connect), which is the main function of the multiplexing equipment located between the transmission line and the exchange, is for example a line that is connected to the exchange within the office from among the multiplex lines housed within the office, and a line that is connected to the exchange within the office. It is a function that selects dedicated lines that are not connected to other stations, lines that pass through that station and go to other stations, and connects them to each route.A cross-connect device is a device that electronically switches and connects digital multiplex lines as they are. It is.

0002

2. Description of the Related Art FIG. 4 is a block diagram showing the basic configuration of a conventional ATM cross-connect device. In the figure, an ATM cross-connect device with the most basic common buffer configuration is composed of an input port 41, a multiplexer (MUX) 42, a buffer 43, a controller 44, a demultiplexer (DMX) 45, and an output port 46. Ru. Each input port 41
The cell 40 inputted from the cell 40 is composed of a header section indicating its destination and an information section, and is inputted to the multiplexing section 42 where it is time-division multiplexed. The multiplexed cells are written into the buffer 43, and at the same time, the destination of each cell is sent to the control unit 44. The control unit 44 reads the corresponding cell from the buffer 43 when it becomes possible to send it to the output port 46. The cells read from the buffer 43 are input to a demultiplexer 44 and are demultiplexed to be distributed to the corresponding output ports 46.

[0003] In an ATM cross-connect device having such a common buffer configuration, cells arriving at all input ports are time-division multiplexed and stored in a single buffer 43, thereby achieving common use of the circuit. However, although the circuit size is reduced, the operating speed of the buffer 43 becomes a bottleneck, and the maximum capacity is limited to about several Gb/s. Figure 5 shows a configuration method to avoid this limitation and increase capacity.
And an ATM cross-connect device shown in FIG. 6 has been proposed.

The ATM cross-connect device shown in FIG.
It is characterized by a parallel buffer configuration in which the buffers shown as the basic configuration in FIG. 4 are installed corresponding to all output ports. That is, multiplexers 42a, 42b, 42c are connected to each input port 41 corresponding to the basic configuration, and multiplexers 45a, 45b, 45c are connected to each output port 46, respectively.
In the configuration in which buffers 43aa, 43ab, 4 correspond to each input port and output port,
3ac, 43ba, 43bb, 43bc, 43ca, 4
The configuration includes 3cb and 43cc.

[0005] In this configuration, cells inputted from a plurality of input ports 41 are multiplexed into one high-speed signal by each multiplexer 42, and written to a buffer 43 installed at the corresponding output port. It will be done. Note that in order to simplify write control, there is also a method of writing to all buffers regardless of the destination of the input cell. The ATM cross-connect device shown in FIG. 6 is characterized by a cross-point buffer structure in which buffers having the parallel buffer structure shown in FIG. 5 are arranged in a matrix. The configuration shown here is logically equivalent to that shown in FIG. 5, and buffers with the same symbols in both figures perform the same operations. On the other hand, the difference lies in the device division; the parallel buffer configuration shown in Figure 5 centrally arranges buffers for output, and the parallel buffer configuration shown in Figure 6
The cross-point buffer configuration shown in Figure 1 makes each buffer present at a cross-point an independent module.

[0006] In either configuration, since a buffer is provided corresponding to each output port, cells can be read out independently at each output port. Therefore, compared to simply extending the basic configuration shown in Figure 4,
Even if the number of input/output ports increases, it can be handled without increasing the operating speed of the buffer. In other words, the capacity can be easily expanded by adding modules while the buffer operating speed remains constant. In addition, in FIG. 6, the configuration when adding input/output ports (capacity expansion) is shown by broken lines.

[0007]

[Problems to be Solved by the Invention] In the parallel buffer configuration shown in FIG. The extension range of is relatively small. Furthermore, in the cross-point buffer configuration shown in FIG. 6, each buffer is an independent module, so the above-mentioned limitations associated with an increase in the number of input/output ports can be avoided. However, the number of required modules and the number of connection links connecting the modules increase in proportion to the square of the number of input/output ports, and the scale of the entire device increases dramatically, resulting in the achievable capacity as shown in Figure 4.
The limit was several times the configuration shown in .

[0008] Furthermore, when increasing the scale by combining a plurality of buffers, it is necessary to control cell reading across the plurality of buffers. In the cross-point buffer configuration shown in FIG. 6, for example, buffers 43aa, 43ab, 43a
c writes cells independently in each buffer, but reads them in the order in which they arrive. This read control is performed by the buffers 43aa, 43ab, 43
A control unit that controls the entire ac (Fig. 6, a demultiplexing unit (DM
X) contained in 45a) and is executed in buffer 43aa
, 43ab, and 43ac are sequentially scanned to check the presence or absence of a cell in the buffer. If a cell is present, the operation of reading one cell and scanning to the next buffer is repeated. In this case, the control unit specifies the buffer location and
The time required to check the presence or absence of cells in that buffer is
Must be less than 1 cell time. On the other hand, in the cross-point buffer configuration, each buffer is configured as an independent module, so when the distance between them is several hundred meters, the response time of the control system (propagation delay time of control signals) is 1 cell. There were times when time was exceeded. This indicates that the response time of the control system is a major obstacle to increasing capacity.

The present invention uses an ATM cross-connect device (FIG. 4) with a small circuit scale and a common buffer configuration, but removes the control section as a basic module, and in an expansion format in which a plurality of these modules are connected, an increase in the circuit scale can be avoided. It is an object of the present invention to provide an ATM cross-connect device that can increase capacity without being affected by response time of a control system.

0010

[Means for Solving the Problems] The invention according to claim 1 includes a plurality of basic modules each having a plurality of input ports and an output port and a common buffer thereto, and an output port of each of the basic modules. a spatial switch network that takes in cells, routes them, and outputs them to predetermined output ports; and a control means that controls cells sent from each of the basic modules to the spatial switch network to avoid cell contention within the spatial switch network. It is characterized by having the following.

[0011] The invention as set forth in claim 2 is the ATM cross-connect device as set forth in claim 1, wherein the control means determines the output port number of the destination of the cell input to each basic module and the address of the accommodated buffer. is input, the cell sending timing for each output port is adjusted, and the address of the buffer accommodating the cell to be sent at each timing is outputted as a read address.

0012

[Operation] By connecting a plurality of basic modules with a space switch network, the invention as claimed in claim 1 can realize expansion of input/output ports for each basic module, and can minimize increases in circuit scale and equipment scale. It can be suppressed. In addition, by controlling the cells sent from the basic module to the space switch network for each output port, the control means avoids cell contention within the space switch network, enables normal routing, and avoids a drop in throughput. can do.

[0013] According to the second aspect of the invention, in the control means for controlling contention between basic modules, the output port number of the destination of the cell and the address of the buffer in which the cell is accommodated are sent as a cell sending request and a cell sending permission signal. use Therefore, compared to processing buffer specification information, buffer occupancy status, and cell transmission instruction signals used in conventional buffer control, faster processing and pipeline processing are possible, and the propagation delay of these control signals is The influence of time on throughput reduction can be minimized.

[0014]

Embodiment FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. Note that in the present invention, a configuration (
The basic module is a configuration in which the control section 44 is removed from the ATM cross-connect device shown in FIG.

In the figure, cell multiplexed input port 1
1 are the respective basic modules 12a, 12b, 12
connected to c. The output port of each basic module and the space switch network 13 are connected via a connection link 14, and the output port 15 is connected to the space switch network 13. Each basic module has a control section 16a, 16b, 16, respectively.
c is connected, and a common control unit 18 is further connected to each control unit via a control link 17. Note that the number of input/output ports corresponding to each of the basic modules 12a, 12b, and 12c is assumed to be k.

Cells arriving at the input port 11 are temporarily accommodated in a buffer within the basic module 12. at the same time,
The output port number of the destination and the address of the buffer containing the cell are notified from each control unit 16 to the common control unit 18. Further, each control unit 16 reads the cell at the buffer address instructed by the common control unit 18 and sends it to the space switch network 13. Space switch network 1
3, the cell is routed according to the destination output port number added to the beginning of the cell. Note that in the process of sending cells to the output port 15 according to the destination, cell contention in the space switch network 13 is resolved by a control method described later, and the cell is correctly routed to a predetermined output port.

An example of the configuration of the common control section 18 is shown in FIG. 2 below. In Figure 2, the control section of each basic module (Figure 1,
16a to 16c), cell sending request signals (cell destination output port number and accommodated buffer address) are sent to the corresponding queues 21a and 16c, respectively, via the control link 17.
21b and 21c, and a meeting takes place. The cell sending request signal 22 at the head of each queue 21 is input to control circuits 23a, 23b, and 23c corresponding to each output port, and cell sending times are calculated for each output port. This sending time signal 24 is input into sending control tables 25a, 25b, and 25c corresponding to each output port. Each output control table 25 returns a predetermined buffer address to the control unit corresponding to each basic module via the control link 17, and also outputs a shift control signal 26 to the corresponding queue 21.

The characteristic operation of this embodiment will be explained below with reference to FIG. The cell sending request signal corresponding to each basic module is temporarily accommodated in the queue 21. Each control circuit 23 corresponding to an output port assigns to the cell sending request signal 22 at the head of each queue 21 a time when the cell can be sent from the requested output port. Each transmission control table 25 corresponding to an output port determines whether or not it is possible to transmit cells from the corresponding basic module at the time specified by this transmission time signal 24, and if possible, requests the cell transmission. accept. That is, buffer addresses are stored in the table so that the address (buffer address) corresponding to the specified basic module is sent at that time, and when the time comes, the buffer address is sent to the corresponding basic module. Further, when the sending control table 25 receives a cell sending request, it sends a shift control signal 26 to the corresponding queue 21, removes the first cell sending request signal 22, and advances the queue by one. Note that at a certain time, the number of cells sent out from each basic module is
If the number of output ports of each basic module is less than k, it is determined that the transmission request cell can be transmitted from the output port.

The configuration and operation of the common control section 18 have been described above, and its processing is executed once every cell time. In addition, since the control circuit 23 of the common control unit 18 has a simple control operation, its internal processing time is also 1
It can be made sufficiently small relative to the cell time. Therefore, when each basic module 12 writes an input cell to its buffer and at the same time the control unit 16 continuously sends its buffer address to the common control unit 18, the control unit 16 of each basic module 12 corresponds to the cell to be sent. It is possible to continuously receive buffer addresses from the common control unit 18. That is, each basic module 12 may continuously read the corresponding cells from the buffer under the control of the common control unit 18.

By the way, in such control, control information flows in a pipeline between the basic module 12 and the common control unit 18, so the propagation delay time required for transmitting and receiving cell address information (buffer address) is It may be one or more cells. Further, although the propagation delay time is a fixed delay time, it is sufficiently small compared to the queuing time and has little effect on throughput.

As described above, the ATM cross-connect device of the present invention has a configuration in which a plurality of basic modules with built-in buffers are connected via a spatial switch network, and the circuit scale is smaller than that of the conventional configuration shown in FIGS. 5 and 6. It can be made much smaller. Here, FIG. 3 shows throughput and average delay time characteristics when k=4 in the conventional configuration and the configuration of the present invention. In FIG. 3, the horizontal axis is throughput, the vertical axis is average delay (in cell units), and numerals 31 and 32 are throughput and average delay time characteristics corresponding to the conventional configuration and the configuration of the present invention, respectively. The configuration of the present invention can achieve a maximum throughput of 90% or more, similar to the conventional configuration, and can achieve high throughput with a small circuit scale.

[0022]

[Effects of the Invention] As explained above, the present invention connects a plurality of basic modules via a space switch network, and controls the output of the basic modules so that routing within the space switch network is performed normally. By doing so, high throughput can be achieved.

Furthermore, in the conventional technology, the circuit scale or device scale increased in proportion to the square of the number of input/output ports, but since the ATM cross-connect device according to the present invention also uses a spatial switch network with a small circuit scale, It is possible to minimize the increase in circuit scale or device scale in response to an increase in the number of input/output ports. That is, a large-capacity ATM cross-connect device can be easily and economically realized.

Furthermore, in the configuration of the ATM cross-connect device of the present invention, the propagation delay time of the control signal between the basic module and the common control section may be one cell time or more, so that it can also support high-speed operation. In addition, there is a large degree of freedom in the circuit arrangement position, which has the excellent effect of facilitating device design.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration example of a common control unit.

FIG. 3 is a diagram showing throughput/average delay time characteristics when k=4.

FIG. 4 is a block diagram showing the basic configuration of a conventional ATM cross-connect device.

FIG. 5 is a block diagram showing the configuration of a conventional ATM cross-connect device with expanded input/output ports.

FIG. 6 is a block diagram showing the configuration of a conventional ATM cross-connect device with expanded input/output ports.

[Explanation of symbols]

11 Input port 12 Basic module 13 Space switch network 14 Connection link 15 Output port 16 Control section 17 Control link 18 Common control section 21 Queue 22 Cell sending request signal 23 Control circuit 24 Sending time signal 25 Sending control table 26 Shift control signal 31 Conventional Throughput/average delay time characteristics corresponding to the configuration 32 Throughput/average delay time characteristics corresponding to the configuration of the present invention 40 Cell 41 Input port 42 Multiplexer (MUX) 43 Buffer 44 Control unit 45 Demultiplexer (DMX) 46 Output port

Claims (2)

[Claims] 1. A plurality of basic modules, each of which has a plurality of input ports and output ports, and a buffer common to these, and cells of the output ports of each of the basic modules are taken in, routed, and output to a predetermined output port. 1. An ATM cross-connect device comprising: a spatial switch network; and a control means for controlling cells sent from each of the basic modules to the spatial switch network to avoid cell contention within the spatial switch network. 2. The ATM cross-connect device according to claim 1, wherein the control means inputs the output port number of the destination of the cell input to each basic module and the address of the accommodated buffer, and 1. An ATM cross-connect device characterized in that the ATM cross-connect device is configured to adjust the sending timing of each cell and output the address of a buffer containing the cell to be sent at each timing as a read address.