JPH04245518A - Information processor - Google Patents

Abstract

PURPOSE:To suppress the power consumption without having consciousness of a user when a normal operation mode is switched to a power saving mode by providing a rest mode seemed as if an information processor was working to the user between the normal operation mode and a conventional power saving mode. CONSTITUTION:A portable information processor is provided with a means which monitors whether a manual input key switch is depressed or not, a means which sets the time limitation to the monitoring means, a means which controls the supply of a clock to a CPU, and a power supply provided for the internal parts circuits of the information processor or a means which controls the supply of signals.

Description

[Detailed description of the invention]

0001

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a portable information processing device that reduces power consumption.

0002

[Prior Art] Conventionally, portable information processing devices that can operate on batteries usually can operate for longer periods of time when powered by a battery built into the device itself. As such, many devices are taking measures to reduce power consumption as much as possible, such as using more semiconductors with MOS structure, increasing the capacity of rechargeable batteries, etc.
Various efforts have been made to improve the efficiency of power supply circuits.

[0003] In addition to improving the circuit parts themselves, it is also possible to stop the operation of one or both of the circuits related to the internal functions of the device and the main circuit parts that are not in use, depending on the usage state of the user. Therefore, additional circuits were installed to minimize wasteful power consumption.

0004

[Problems to be Solved by the Invention] Among the conventional information processing devices described above, those with a power saving mode have a power saving mode.
As a method of entering the mode, the user restricts the operation of all or part of the circuit at the initial setting stage.

[0005] Furthermore, the software monitors time and key inputs, and when a certain period of time has elapsed since the last key input, the software controls the electrical input of a predetermined signal or power supply to the internal circuit. Methods were taken such as cutting off the situation.

For this reason, if the setting time before entering the power saving mode is long, the effect of reducing power consumption will be reduced, and if the setting time is short, the device will enter the power saving mode cumbersomely during processing. There was a problem in that it was difficult to use.

On the other hand, in the actual usage environment of the device, for example, there may be times when the user gets up from his or her seat and does not input keys, or when the user is using the device. However, I often find myself gathering my thoughts while looking at the device's display screen. In reality, the total amount of time when no device is in operation is a non-negligible amount of time compared to the time when the device is actually operating while performing key inputs. In this case, from the perspective of the device, it is sufficient that the screen is displayed, so there is a problem in that other internal circuits or component circuits that do not perform this operation waste power.

[0008]

[Means for Solving the Problems] In order to solve the above problems, an information processing device of the present invention supplies a driving clock to an internal circuit section constituted by a central processing unit and its peripheral LSIs, and In an information processing apparatus having a normal operation mode state in which power and predetermined signals are supplied to each component circuit section inside the apparatus, in the normal operation mode state, the keyboard After a certain period of time has elapsed since the last key input from the computer, the supply of clocks for driving the internal circuitry of the device is stopped to reduce power consumption, and at this time, the user is given the same operation as before. means for changing to a rest mode for controlling other internal circuits of the device so that the device appears to behave in the same way as when the keyboard is in the rest mode; If there is no key input from the card within a certain period of time, the supply of power or the predetermined input signal to the circuit section or component circuit section inside the device is stopped, thereby further reducing power consumption. In connection with controlling the effective operating time of a circuit for detecting a key input from the keyboard in order to determine the mode to change to the next mode, The apparatus is characterized by comprising means for controlling the supply of power and the supply of predetermined input signals to the internal circuit section of the apparatus and each component circuit section.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be explained below according to an embodiment of FIGS. 1 and 2. FIG. 1 is a block diagram showing an apparatus according to an embodiment of the present invention. The portable information processing device in FIG. 1 includes a keyboard unit 106 as input means, a control circuit 105, an LCD panel 109 and control circuit 105 as output means, and a video RAM 10 for recording screen data.
8 and these are connected to the CP via the system bus 107.
Connected to U101.

[0010] Here, in order to make the present invention easier to understand, in the following explanation, sleep mode and rest mode are based on the following definitions.

First, as is well known, during normal operation of the device, a driving clock is supplied to the internal circuit section constituted by the CPU and its peripheral LSI, and at the same time, a driving clock is supplied to each component circuit section inside the device. Power and predetermined signals are supplied.

During this normal operation, after a certain period of time has elapsed since the last key input, the supply of clocks for driving the internal circuitry of the device is stopped to reduce power consumption, and at the same time Other internal circuits of the device are controlled so that the device appears to the user to be behaving in the same way as when it is in operation. This state of the device will be called rest mode.

[0013] Next, if there is a key input from this rest mode, the operation returns to the normal operation in which the supply of the drive clock has started, but if there is no key input, the operation returns as before. After a certain period of time has elapsed, the supply of power and predetermined signals to each component circuit within the device is also stopped, further reducing power consumption. This state will be called sleep mode.

In the present invention, by providing a new power consumption saving mode called rest mode between the normal operation mode and the conventional sleep mode,
The configuration is such that power consumption can be suppressed more effectively.

In FIG. 1, 104 is a rest mode control register, and this rest mode control register 1
04 when entering the above-mentioned rest mode or
When exiting from the rest mode, the clock control circuit 102 is set to prohibit or permit system drive clock output to be sent to the CPU 101, and further procedures necessary for entering and exiting the rest mode are performed.

[0016] Also, a system clock generation crystal 1
03 supplies a driving clock to the clock control circuit 102 and the rest mode control register 104, and especially when the rest mode is entered, the driving clock is supplied to the CPU 101 and other internal circuits. Since it is necessary for the rest mode control register 104 to continue operating even when the rest mode control register 104 is not in use, a clock is directly supplied to the rest mode control register 104.

On the other hand, the sleep mode control register 11
1, when entering sleep mode or exiting sleep mode, the power supply circuit 117 of the entire device, the LCD
Operation prohibition/permission is set for the inverter 116, which is the power source of the backlight panel 110 of the panel 109, and each I/O 115.

In FIG. 1, during so-called normal operation when used by a user, the original oscillation output of the crystal 103 is converted into a rectangular wave output by the clock control circuit 102.
It is supplied to the CPU 101 as a system driving clock.

By the way, the rest mode control register 1
The clock control bit 04 allows the clock control circuit 102 to output the clock.

In this state, for example, when the user leaves the seat, if there is no input from the keyboard unit 106 within a certain period of time, that is, the keyboard control section 1
05 does not send an interrupt output to the rest mode control register 104, the rest mode control register 104 sends a rest mode interrupt signal to an interrupt controller (not shown), and the system BIOS
sends a processing stop (HLT) signal to the CPU 101.

[0021] As a result, the CPU 101 stops processing, but at this time a signal indicating the HLT state is output from the CPU 101, and the rest mode control register 104 recognizes this signal and sends the clock to the clock control circuit 102. The clock control circuit 102 sends a stop signal to the CPU.
System drive clock output to 101 is stopped.

However, in this state, the supply of the system drive clock is simply stopped, and the power supply to the other internal circuits and component circuits connected to the system bus 107, the LCD panel 109, and the backlight EL 110 is interrupted. , the state is the same as normal operation, and the display screen at the time of the last key input is maintained. This state is the already mentioned rest mode.

When a key input is received from the keyboard unit 106 while the apparatus is in this rest mode, the keyboard control section 105 sends a message to the rest mode control register 104. A keyboard interrupt signal is then sent.

The rest mode control register 104 recognizes this keyboard interrupt signal and sends a clock transmission permission signal to the clock control circuit 102, and the clock control circuit 102 transmits a system drive signal to the CPU 101. Resume clock transmission. Furthermore, the rest mode control register 104 sends an interrupt signal for canceling the HLT to the CPU 101 from this state, and the device returns to the normal operating state.

Furthermore, when the device is in the rest mode and no key input is made from the keyboard unit 106 within a certain period of time, the circuit section or component circuit section inside the device The supply of power or a predetermined input signal to the device is stopped, and the mode shifts to a mode that further reduces power consumption. This state is the power consumption saving mode called the sleep mode or standby mode as described above.

Next, FIG. 2 is an operational flowchart of the processing portion related to power saving of the embodiment shown in FIG. 1.

In FIG. 2, the processing section surrounded by judgment step 201 to step 204 monitors whether there is a key input during normal operation, and when the value of timer counter step 202 reaches Max t1. In this case, as explained in FIG. 1, the rest mode is entered after following the steps of issuing a rest mode interrupt, issuing an HLT command, and stopping the clock.

The value of timer counter step 202 is
If there is a key input before Max t1 is reached, t1 is reset and further processing is performed to continue counting.

Next, from judgment step 208 to step 21
The processing part surrounded by 0 is the processing part that determines the next mode to be entered depending on whether there is a key input during rest mode, and the value of the timer counter step 209 is Max.
When t2 is reached, the procedure for shifting to sleep mode is taken as explained in FIG.

The value of timer counter step 209 is
If there is a key input before Max t2 is reached, t2 is reset, and as explained in Figure 1, the following steps are performed: issuing a keyboard interrupt → sending a clock → issuing an HLT release interrupt. Return to normal operation.

[0031]

[Effects of the Invention] As explained above, according to the present invention, between the normal operation mode and the conventional power consumption saving mode,
By introducing an intermediate mode concept such as rest mode, power consumption can be further reduced without the user being aware of it when transitioning from normal operation to power saving mode. environment can be provided.

Further, according to the present invention, by focusing on the characteristic that a semiconductor with a MOS structure consumes power only during switching operation, power consumption is reduced by particularly controlling the supply of system driving clocks to the CPU and its peripheral LSIs. can be reduced.

[0033] In connection with controlling the effective operating time of the circuit for detecting the key input for determining the next mode to be entered, the device internal circuit section and each component circuit section,
By controlling the supply of power to and the supply of predetermined input signals, power consumption can be reduced.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram showing a device according to an embodiment of the present invention.

[Fig. 2] Operation flowchart of main parts of an apparatus according to an embodiment of the present invention.
This is a diagram.

[Explanation of symbols]

101 CPU 102 Clock control circuit 103 System clock generation crystal 104
Rest mode control register 105 Keyboard control circuit 106 Keyboard unit 107 System bus 108 Video RAM 109 LCD panel 110 EL panel 111 Sleep mode control register 201 Key input in normal operating state Step 204 to determine whether the timer has counted up in the normal operating state Step 208 to determine whether or not the timer has counted up in the rest mode Step 210 to determine whether or not the key input has been performed in the rest mode Step 210 to determine whether the timer has counted up in the rest mode

Claims (1)

[Claims] [Claim 1] A driving clock is supplied to an internal circuit section constituted by a central processing unit and its peripheral LSI, and a power supply and predetermined signals are supplied to each component circuit section inside the device. In an information processing device having a normal operation mode state, when the information processing device is in the normal operation mode state and a certain period of time has elapsed since the last key input from the keyboard; In addition to stopping the supply of driving clocks to the device's internal circuitry to reduce power consumption, it also stops other device's internal circuitry so that it appears to the user that the device is behaving as if it were operating. means for changing to a rest mode to control; and a means for changing to a rest mode to control the device; means for stopping the supply of power or the predetermined input signal to the circuit section or component circuit section and changing to a sleep mode to further reduce power consumption, and for determining the next mode to shift to. In connection with controlling the effective operating time of the circuit for detecting key input from the keyboard,
An information processing device comprising means for controlling power supply and predetermined input signal supply to the device internal circuit section and each component circuit section.