JPH04180386A - Color system discriminating circuit - Google Patents

Abstract

PURPOSE:To offer the color system discriminating circuit giving stable operation without erroneous discrimination even under the weak electric field by discriminating whether or not the 'Lo' state of an ID signal is temporary and remaining unchanged when judging this phenomenon as temporary. CONSTITUTION:A synchronizing pulse generation circuit 55 generates a synchronizing pulse II to take the synchronization of rising by taking a clock CK of a period when an identification detection signal ID is 'Lo'. At this point, a mask pulse generation circuit 54 detects and judges whether or not the 'Lo' state of the identification signal ID is temporary, generating the mask pulse to mask the synchronizing pulse II when judged as temporary. Thus, the color discrimination signal ID synchronizing with the reference signal and not taking to 'Lo' when the identification detection signal ID becomes temporally 'Lo' can be obtained.

Description

Detailed Description of the Invention [Objective of the Invention (Industrial Application Field) The present invention is directed to a multi-system color television receiver that receives color television signals of different formats such as PAL/SECAM/NTSC. , relates to a color system discrimination circuit that automatically switches between these systems.

(Prior Art) FIG. 8 is a block diagram of a conventional color method discrimination system.

A color signal extracted from the composite video signal is supplied to the input terminal 1, and is demodulated by a PAL/NTSC/SECAM demodulation circuit 2.3.4.

The color burst detection output obtained by the IM tone circuit 2.3.4 is input to the ident detection circuit 5.6.7, and when an ident in each color system is detected, “Hl
”, and if it is not detected, an ident detection signal ID is obtained that becomes “LO”.

The color method is determined using each ident signal I obtained here.
This is achieved by applying D to the discrimination logic routine 12, and the discrimination output is PAL/NTSC/SECA.
SW1B is switched to determine which output of each M demodulation circuit is to be supplied to the matrix circuit.

However, in reality, as shown in FIG. 8, the discrimination circuit 12 does not directly use the ident signal ID, but uses the color method discrimination signal DI, which passes the ID through a discrimination signal generation circuit 8.9.10. . FIG. 9 shows an example of a circuit related to generation of a conventional color system discrimination signal, and FIG. 10 shows a timing chart thereof, which will be explained below. As mentioned above, the reason why the ident signal ID is not used directly for color system discrimination, but the color discrimination signal DI after being shaped by the circuit shown in Fig. 2 is used is mainly for the following reasons (1) and (2). .

(1) When a certain system is being received, in reality, only the compatible ident signal JD is not set, but a plurality of ident signals ID may be set. Therefore, the priority order of the methods is set in the discrimination logic routine 12,
This is being addressed.

However, if the ident signal ID is directly used for discrimination, there is a possibility of erroneous discrimination because the timing of the ident signal ID in each method is completely asynchronous. Therefore,
It is necessary to retype the identification signal ID of each system using a certain clock signal to achieve synchronization.

(2) Since the eyetent signal ID is very susceptible to the effects of noise, weak electric fields, etc., using the eyetent signal ID directly for discrimination may cause misjudgment. It is necessary to have a means to judge whether the Adent signal 10 that is currently standing is stable or just happened to occur for a moment.

Therefore, in the conventional circuit, each identification signal ID is synchronized using a certain clock as a reference clock, and the discrimination signal DI is set to "R3" only when the identification signal ID becomes H1° continuously during one clock, thereby improving stability. Detection is performed using

In other words, by using the reference clock as the clock signal CK and the ID bar as the reset signal, the Q output a of the D-FF 15 and the clock signal CK are ANDed with the clock signal CK.
”. Also, the detection output is set as input in R5-FF16, and the identification signal ID is Lo.
By resetting at the time when `` is reached, it is possible to obtain an output C in which the rising edge of ID is synchronized with CK.

To synchronize the falling part, output C is “Lo” with AND20.
R5-FF1 clock signal CK during the period '
This can be achieved by using a reset input of 7.

As a result, the identification signal ID continues for one clock.
A color system discrimination signal DI is obtained which rises at the clock pulse at the time when H1' is detected and falls at the next clock pulse when the ident signal ID becomes "Lo".

As described above, when obtaining the discrimination signal DI in the conventional circuit, if the identification signal rD becomes Lo-, the discrimination signal DI is always set to .Lo. at the next clock timing. In other words, even if the identification signal ID momentarily becomes "Lo" due to a weak electric field, etc., the discrimination signal DI will be set to "Lo", making it impossible to distinguish the method that is actually being received. As a result, color fading occurs frequently under weak electric fields, which is a fatal drawback.

(Problem to be solved by the invention) In the conventional color method discrimination circuit, the color discrimination signal is set to "Lo" even when the ident signal momentarily becomes Lo' due to a weak electric field, etc. There was a problem with frequent color fading at the bottom.

SUMMARY OF THE INVENTION An object of the present invention is to provide a color type discrimination circuit that operates stably even under a weak electric field and does not cause erroneous discrimination.

[Structure of the Invention] (Means for Solving the Problems) The color system discrimination circuit of the present invention determines whether the signal is a color signal or a monochrome signal based on the broadcast system being received, and generates a first detection signal. means for generating a first clock serving as a reference; and determining that the first detection signal is a color signal when the first detection signal continues within one period of the first clock, and detecting a second detection signal. means for generating a signal; means for generating a first synchronization pulse for synchronizing rising edges of the first clock and the first detection signal based on the second detection signal; a first memory means that is set by a pulse and reset when the first detection output is a black and white signal; and generating a pulse for synchronizing the rise of the first clock and the first detection signal based on the output of the first memory means. , by the third detection signal,
means for generating a second synchronization pulse for masking this pulse; and a second memory set by the output of the first synchronization pulse or the first memory means and reset by the second synchronization pulse. and means for deriving the output of the second memory means as a color system discrimination signal.

(Function) In this invention, when the ID signal becomes "Lo", it is determined whether this phenomenon is temporary or not, and -
If it is determined that the situation is temporary, it is not set to "Lo".

(Embodiment) An embodiment of the present invention will be described in detail with reference to the drawings.

In FIG. 1, the identity detection signal ID and the reference clock CK are input to the continuity detection circuit 51, and it detects whether the identity detection signal ID is continuously at "HIo" within one clock.The detection results are synchronized. Pulse generation circuit 5
The synchronizing pulse 1 is supplied to the clock CK along with the clock CK, and the synchronizing pulse 1 is generated at the timing of the clock CK at the time when the detection is made. In other words, the synchronization pulse I is a pulse for synchronizing the rise of the color discrimination signal DI with the clock CK. By using this as a set signal for R5-FF53 and using the ID bar as a reset signal, it is synchronized with the clock CK. It has a smooth rising part, and the tK ID is "Lo"
Then, set the identification detection signal ID to R5-FF so that it remains "Lo" unless synchronization pulse 1 occurs again.
It can be obtained from the output of 53.

The falling portion can be obtained by the synchronization pulse generation circuit 55. That is, the synchronization pulse generation circuit 55 generates the synchronization pulse (2) for synchronizing the falling edge by taking the tarlock CK during the period when the identity detection signal ID is "Lo".Here, the mask pulse When the ident detection signal ID becomes "Lo", the generation circuit 54 detects and determines whether this is instantaneous or not, and if it is determined that it is instantaneous, it masks the synchronization pulse ■. Generates a mask pulse.

In other words, by masking the synchronization pulse ■ that determines the falling edge of the color discrimination signal D1, when the ident detection signal ID momentarily becomes "Lo", the color discrimination signal D1 becomes "Lo". It is possible to prevent this from happening.

The ident detection signal ID and synchronization pulse (2) obtained as described above are provided as set/reset inputs of R5-FF56, respectively. This allows synchronization with the reference clock, and the identity detection signal ID momentarily goes to Lo''.
In this case, it is possible to obtain a color discrimination signal DI that does not become "Lo".

FIG. 2 shows a more specific example of the circuit shown in FIG. FIG. 3 shows a timing chart of each part of the second embodiment. When the ident signal ID becomes "Loo", the color discrimination signal DI is set to "Lo" only when the ident signal ID is still "Loo" at the timing of the immediately subsequent clock. In other words, the color discrimination signal DI is set to "Lo". In Figure 9, the reset input of R3-FF17 whose clock is synchronized with the falling part of the adent signal ID has a rising part which is synchronized with the clock (C)
Whereas the AND20 output of the inverted signal and the clock pulse was input, in Fig. 2, the third
As shown in the figure, when the identification signal ID becomes "Lo" and then returns to "H1" before the timing of the next clock CK, it can be operated to mask the reset input of R5-FF17. As a result, as shown in the figure, the color type discrimination signal DI can obtain an output that does not fall to 'Lo' under the above-mentioned premise.

In addition, if the next clock CK is reached without the identification signal ID returning to "Hlo", the R5-FF1
Since the reset input No. 7 is never masked, DI falls to "Lo" at that clock point as before.

FIG. 4 shows another embodiment of the present invention, and FIG. 5 shows a timing chart of each part thereof. Is this example an identification signal ID under a weak electric field?

This takes into consideration the possibility that H1'→"Lo"→"Hi" may be affected. The number of times within one clock is counted, and if it exceeds an arbitrary number, the color discrimination signal DI is set to "Looooo" at the timing of the next clock.
This is how it works. For example, the circuit shown in FIG. 4 uses a binary counter and is configured so that when the process is repeated three or more times, the color discrimination signal DI is set to 'Lo''.

The binary counter 21 counts the number of changes in the identification signal ID during one clock (CK).
When D reaches H1° for the third time, a detection pulse as shown in FIG. 5(d) is outputted from the AND 24. R3-FF2
2, the detection signal is inputted as a set signal, and the Q output of the D-FF 15 (FIG. 5(a)) is inputted as a reset signal. From this, the R5-FF 22 outputs a pulse (e) that can mask the falling synchronizing pulses of the color discrimination signal DI other than those immediately after the detection signal is generated. Pulse (e) is input to 0R25. 0R
The other input of 25 is an AND output of CK and ID bar (which masks the synchronization pulse except when the identification signal ID is "LO" at the timing of the clock CK).
f).

As a result, from the output of 0R25, it is possible to obtain a mask pulse (g) that detects and determines whether the change in the ident signal ID is temporary. From the above, if the ident signal ID repeats H1°-"Lo"-"Hl" three times or more, or at the timing of the next clock CK,
', it is set as "Lo", and when it is less than 3 times, it is possible to obtain a color discrimination signal that maintains the previous state, and it is possible to obtain the synchronizing pulse shown in Fig. 5 (h). .

FIG. 6 shows another embodiment, and FIG. 10 shows a timing chart of each part thereof. In this embodiment, by adding a second clock CK2 having a shorter period than the reference clock CK and counting the clock CK2 during the period in which the identification signal ID is "Loo", the identification signal ID is "Loo" for an arbitrary period of time or longer. If there is a color discrimination signal DI
is set to ``LO'' at the timing of the next clock CK.

The circuit configuration uses a binary counter as an example as in FIG. 4, uses CN3 as a clock input, and uses ID as a reset input. Since the circuit operation is similar to the circuit example shown in FIG. 4, a description thereof will be omitted.

As a result, if the ident signal ID is "°LO" during the period in which the clock CK2 is counted three times or more, it will be set as "°Lo", and if it becomes "Hi" again after counting less than three times, it will be changed to "Lo". A color discrimination signal DI as shown in FIG. 7 that maintains the state can be obtained.

Due to a weak electric field, etc., the ident detection signal ID changes from 'Hi' to 'Lo' to 'Hi' within one reference clock.
', if this is repeated several times, it is possible to detect and determine whether the state is temporary. That is, the discrimination signal DI that can be obtained from this
is suitable as an input for a logic circuit for color method discrimination by reducing the influence of weak electric fields and the like.

It goes without saying that further effects can be achieved by any combination of the circuits shown in FIGS. 2, 4, and 6.

[Effects of the Invention] As described above, according to the present invention, it is possible to provide an extremely good color system discriminating circuit which is less susceptible to the effects of weak electric fields, thereby reducing the frequency of color fading, and which is compatible with integrated circuits. I can do it.

[Brief explanation of drawings]

Fig. 1 is a circuit block diagram showing an embodiment of the present invention, Fig. 2 is a circuit block diagram concretely showing Fig. 1, Fig. 3 is a timing chart of each part of Fig. 2, and Fig. 4 is a circuit block diagram specifically showing Fig. 1. A circuit block diagram showing another embodiment of the invention, FIG. 5 is a timing chart of each part of the fourth embodiment, FIG. 6 is a circuit block diagram showing another embodiment, and FIG. 7 is a part numbered in the sixth figure. 8 is a conventional circuit block diagram, FIG. 9 is a circuit block diagram embodying the main part of FIG. 8, and FIG. 10 is a timing chart of the part shown in FIG. ID・・・・・・・・・Ident signal CK・・・・
・・・・・・・・・Clock signal 51・・・・・・・
...Continuity detection circuit 52...
Synchronous pulse generation circuit 53.56...R3-FF

Claims (4)

[Claims] (1) means for determining whether the signal is a color signal or a monochrome signal based on the color signal of the broadcasting system being received and generating a first detection signal; and means for generating a first clock serving as a reference;
means for determining that the first detection signal is a color signal and generating a second detection signal when the first detection signal continues within one cycle of the first clock; means for generating a first synchronization pulse to synchronize the rising edge of the first clock and the first detection signal; and a means for generating a first synchronization pulse set by the first synchronization pulse and reset when the first detection output is a black and white signal. a first memory means; a means for determining whether the first detection signal changes from color to a signal indicating black and white, and generating a third detection signal by determining whether the change is temporary; and the first memory means; When generating a pulse for synchronizing the rise of the first clock and the first detection signal based on the output of the third detection signal, a second synchronization pulse for masking this pulse is generated by the third detection signal. a second memory means that is set by the first synchronization pulse or the output of the first memory means and reset by the second synchronization pulse; and a color output of the second memory means. A color method discriminating circuit comprising means for deriving a signal for determining a method. (2) The color system discrimination circuit according to claim 1, wherein the third detection signal is the first detection signal. (3) The third detection signal is the first detection signal, and the fact that the number of changes in the first detection signal exceeds an arbitrary number is the output of the detecting means. Color method discrimination circuit. (4) The first detection signal is the third detection signal, and the first detection signal is the output of a means for detecting that the period of the detection signal indicating a monochrome signal exceeds an arbitrary period. 2. The color method discriminating circuit according to claim 1.