JPH04178855A - Personal computer - Google Patents

Personal computer

Info

Publication number
JPH04178855A
JPH04178855A JP2307766A JP30776690A JPH04178855A JP H04178855 A JPH04178855 A JP H04178855A JP 2307766 A JP2307766 A JP 2307766A JP 30776690 A JP30776690 A JP 30776690A JP H04178855 A JPH04178855 A JP H04178855A
Authority
JP
Japan
Prior art keywords
power
power supply
turned
data
power source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2307766A
Other languages
Japanese (ja)
Inventor
Isamu Yamazaki
勇 山崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Niigata Fuji Xerox Manufacturing Co Ltd
Original Assignee
Niigata Fuji Xerox Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Niigata Fuji Xerox Manufacturing Co Ltd filed Critical Niigata Fuji Xerox Manufacturing Co Ltd
Priority to JP2307766A priority Critical patent/JPH04178855A/en
Publication of JPH04178855A publication Critical patent/JPH04178855A/en
Pending legal-status Critical Current

Links

Landscapes

  • Power Sources (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE:To preserve data in processing even when malfunction or the failure of an external power source is generated and to continue operation at the time of restarting a device by saving data by a battery in the device when the supply of the external power source is disconnected during the period of data processing. CONSTITUTION:This personal computer is provided with a power source ON/ OFF detecting circuit 3 for detecting the ON/OFF of a DC power source by supplying power from the backup DC battery 4 at the time of turning off the power source of the device. A backup memory 8 to be driven by receiving power supply from a normally power supply circuit 6 to which power is always supplied from the battery even if the DC power source 2 is turned off by the signal of the circuit 3 and a program for saving necessary data to the memory 8 by operating a CPU 11 and a main memory 12 by power supply from a temporary power supply circuit 7 when the power source 2 is turned off are also included in the personal computer. Thereby, data can be saved at the time of power OFF. Consequently, data in processing can be prevented from being erased.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、パーソナルコンピュータに関し、特に、デー
タ処理中に装置の電源を切ってもデータか消えないよう
保護する手段を備えた装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a personal computer, and more particularly to a device provided with means for protecting data from being erased even if the power to the device is turned off during data processing.

〔従来の技術〕[Conventional technology]

従来、この種のパーソナルコンピュータでは、データ処
理中に電源スィッチを切ろうとすると、電源部を制御し
て、一連の処理が終るまでは電源電圧を保持し、終った
後に電源が自動的に切れるようになっている。
Conventionally, in this type of personal computer, if you try to turn off the power switch during data processing, the power supply section is controlled to maintain the power supply voltage until the series of processing is completed, and then the power is automatically turned off. It has become.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述したように、従来のパーソナルコンピュータは、通
常の電源を用いて、電源オフ時のデータセーフを行って
いる。このため外部から供給される電源が断たれると、
このセーブが行えなくなり、処理中のデータが消えてし
まうという欠点がある。
As described above, conventional personal computers use a normal power source to ensure data safety when the power is turned off. Therefore, if the power supplied from the outside is cut off,
The drawback is that this save cannot be performed and the data being processed will be lost.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のパーソナルコンピュータは、装置の電源オフ時
に、DC電源をバックアップするバックアップ用DC9
池と、DC電池から電力が供給され、DC電源のオン/
オフを検出する電源オン/オフ検出回路と、電源オン/
オフ検出回路の信号により、装置のDC電源がオフにな
ってもDC電池から常時電力が供給されている常時電力
供給回路と、常時電力供給回路により電力が供給され、
動作するバックアップメモリと、DC電源をオフにした
後、一時データのバックア′ツブを行うためにDC電池
から電力が供給され、CPU、メインメモリにこの電力
を供給する一時電力供給回路と、DC電源のオフ時に、
一時電力供給回路からの電力によりCPU、メインメモ
リを動作させ、必要なデータをバックアップメモリに退
避するプログラムとを官有している。
The personal computer of the present invention has a backup DC9 that backs up the DC power when the device is powered off.
Power is supplied from the pond and DC battery, and the DC power is turned on/off.
A power on/off detection circuit that detects power off and a power on/off detection circuit that detects power on/off.
In response to the signal from the off detection circuit, power is supplied by the constant power supply circuit, which is constantly supplied with power from the DC battery even when the DC power supply of the device is turned off, and the constant power supply circuit.
A backup memory that operates, a temporary power supply circuit that receives power from a DC battery to back up temporary data after the DC power is turned off, and supplies this power to the CPU and main memory, and a DC power supply. When off,
The government owns a program that operates the CPU and main memory using power from the temporary power supply circuit and saves necessary data to the backup memory.

〔実施例〕〔Example〕

本発明の実施例について図面に基ついて説明する。 Embodiments of the present invention will be described based on the drawings.

第1図は本発明の一実施例のパーソナルコンピュータの
ブロック図、第2区は第1図の電源のパワーオフ時のタ
イムチャート図、第3図は第1図の電源のパワーオン時
のタイムチャート図である。
Fig. 1 is a block diagram of a personal computer according to an embodiment of the present invention, Section 2 is a time chart when the power supply shown in Fig. 1 is turned off, and Fig. 3 is a time chart when the power supply shown in Fig. 1 is turned on. It is a chart diagram.

第1図において、外部AC電源1、DC電源2、CPU
II、メインメモリ12、ディスクメモリ13、ディス
クコントローラ14、ティスプレィ15、ティスプレィ
コントローラ16、キーボード17、キーボードコント
ローラ18、システムバス19は従来の一般的なコンピ
ュータと同様のものであり、電源オン時に、次のように
動作する。
In Figure 1, external AC power supply 1, DC power supply 2, CPU
II, main memory 12, disk memory 13, disk controller 14, display 15, display controller 16, keyboard 17, keyboard controller 18, and system bus 19 are similar to those of a conventional general computer, and when the power is turned on, It works like this:

ます、外部AC電源1よりA、 C電源がDC電源2に
供給され、DC電源2より各部に電力か供給される。そ
して、メインメモリ12に書込まれているプログラムに
よりCPUIIか内部処理を行う。ここで、キーボード
コントローラ18て制御されているキーボード17から
オペレータか操作を行うと、CPUIIでオペレータの
指示による一連の処理を行い、その結果をデイスプレィ
コントローラ16を通してティスプレィ15に表示する
。そして、その処理データはディスクコントローラ14
により制御されディスクメモリ13に保存される。
First, A and C power are supplied from an external AC power supply 1 to a DC power supply 2, and power is supplied from the DC power supply 2 to each part. Then, the CPU II performs internal processing according to the program written in the main memory 12. Here, when the operator performs an operation from the keyboard 17 controlled by the keyboard controller 18, the CPU II performs a series of processes according to the operator's instructions, and the results are displayed on the display 15 through the display controller 16. The processed data is then processed by the disk controller 14.
is controlled by and stored in the disk memory 13.

次に、電源オフ時の動作について、第1図、第2図を参
照して説明する。
Next, the operation when the power is turned off will be explained with reference to FIGS. 1 and 2.

第2図の100において、外部AC電源1が切れると、
DC電源2も切れ、このDC電源2より電力が供給され
ているディスクメモリ13、ディスクコントローラ14
、デイスプレィ15、デイスプレィコントローラ16、
キーボード17、キーボードコントローラ18は電力が
切れ、動作しなくなる。
At 100 in FIG. 2, when the external AC power supply 1 is turned off,
The DC power supply 2 is also turned off, and the disk memory 13 and disk controller 14 are supplied with power from the DC power supply 2.
, display 15, display controller 16,
The keyboard 17 and keyboard controller 18 lose power and become inoperable.

しかし、102,103に示すように電源オン/オフ検
出回路3および電源制御部5はDC電源4より電力が供
給されているのて動作することができる。
However, as shown at 102 and 103, the power on/off detection circuit 3 and the power control section 5 can operate because they are supplied with power from the DC power source 4.

そして、DC電源4より電源制御部5の常時電力供給回
n6を通してバックアップメモリ8に、一時電力供給回
路7を通してCPU]、1、メインメモリ12に電力を
供給する。
Then, power is supplied from the DC power supply 4 to the backup memory 8 through the constant power supply circuit n6 of the power supply control unit 5, and to the CPU], 1, and the main memory 12 through the temporary power supply circuit 7.

ここで、電源電圧のオン/オフ変化を電源オン/オフ検
出回路3が検出して、電源オフ信号を電源制御部5およ
びシステムバス19に送る。そして、102に示すよう
に、電源制御部5の終了処理期間信号がオンになる。
Here, the power on/off detection circuit 3 detects the on/off change in the power supply voltage and sends a power off signal to the power supply control section 5 and the system bus 19. Then, as shown at 102, the termination processing period signal of the power supply control unit 5 is turned on.

同時に、104に示すように、システムバス19を経由
して、CPtJllに入った電源オフ検出信号によりC
PUIIはバックアップメモリ8のプログラム格納部9
にあらかしめ書込まれている終了処理プログラムを作動
する。そして、この終了処理プログラムにより電源オフ
時になるまて処理されていたデータ、その他保存してお
くべき情報をデータ格納部10に格納する。
At the same time, as shown at 104, the power off detection signal entered into the CPtJll via the system bus 19 causes the C
PUII is the program storage section 9 of the backup memory 8
Runs the termination processing program written in advance. Then, by this termination processing program, the data that was being processed before the power was turned off and other information that should be saved are stored in the data storage section 10.

終了処理プロクラムの動作が終了すると、101の終了
処理期間信号がオフになり102に示すように一時電力
供給回路7の供給電源がオフになりCPUl1.メイン
メモリ12への電源の供給が停止される。この場合、1
03に示すように常時電力供給回路6の供給電源はその
まま残るのでバックアップメモリ8には電力が供給され
続ける。
When the operation of the termination processing program is completed, the termination processing period signal 101 is turned off, and as shown at 102, the power supply of the temporary power supply circuit 7 is turned off, and the CPU11. The supply of power to the main memory 12 is stopped. In this case, 1
As shown in 03, the power supplied by the power supply circuit 6 remains as it is, so power continues to be supplied to the backup memory 8.

次に、第1図、第3図により電源オン時の動作について
説明する。
Next, the operation when the power is turned on will be explained with reference to FIGS. 1 and 3.

第3図において、外部AC電源1がオンになり、DC電
源2かオンになるまでは108に示すように第2図の1
03に引続いて常時電力供給回路6の供給電源のみがオ
ンになっている。
In FIG. 3, when the external AC power source 1 is turned on, until the DC power source 2 is turned on, as shown at 108 in FIG.
Following 03, only the power supply of the constant power supply circuit 6 is turned on.

ここで、105に示すようにDC電源がオンになると、
107に示すように一時電力供給回87にDC電源が供
給され、CPtJll、メインメモリ12に電力が供給
される。そして、109に示すようにCPU動作により
開始処理プログラムが作動し、電源オフ時の処理でバッ
クアップメモリ8のデータ格納部10に保存されている
データをディスクコントローラ14を通してディスクメ
モリ13に書込み、データ復旧処理を行う。その後、通
常のデータ処理を行う。
Here, when the DC power is turned on as shown at 105,
As shown at 107, DC power is supplied to the temporary power supply circuit 87, and power is supplied to CPtJll and the main memory 12. Then, as shown at 109, the start processing program is activated by the CPU operation, and the data stored in the data storage section 10 of the backup memory 8 is written to the disk memory 13 through the disk controller 14 in the process when the power is turned off, and the data is restored. Perform processing. After that, normal data processing is performed.

また、108に示すようにDC電源がオンになると同時
に、常時電力供給回路6の供給電源はDC電池4からD
C電源2に切替わる。
Further, as shown at 108, at the same time as the DC power is turned on, the power supplied to the constant power supply circuit 6 is switched from the DC battery 4 to the DC power supply.
Switches to C power supply 2.

この間、106に示すように終了処理期間信号は変化し
ない。
During this time, the end processing period signal does not change as shown at 106.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明によれば、データ処理中に外
部電源の供給が断たれても、装置内部の電池によりデー
タをセーブできるので、誤動作や外部電源の故障が起き
ても処理中のデータが保存され、装置再開時にそのまま
動作を続けられるという効果かある。
As explained above, according to the present invention, even if the external power supply is cut off during data processing, the data can be saved by the battery inside the device, so even if a malfunction or external power failure occurs, the data being processed can be saved. This has the effect of allowing the device to continue operating as it is when the device is restarted.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例のパーソナルコンピュータの
ブロック図、第2図は第1図の電源のパワーオフ時のタ
イムチャート図、第3図は第1図の電源のパワーオン時
のタイムチャート図である。 1・・・外部AC電源、2・・・DC電源、3・・・電
源オン/オフ検出回路、4・・・DC電池、5・・・電
源制御部、6・・・常時電力供給回路、7・・・一時電
力供給回路、8・・・バックアップメモリ、9・・・プ
ログラム格納部、ユO・・・データ格納部、11・・・
CPU、12・・・メインメモリ、13・・・ティスフ
メモリ、14・・・ディスクコントローラ、15・・・
デイスプレィ、16・・・デイスプレィコントローラ、
17・・・キーボード、18・・・キーボードコントロ
ーラ、19・・・システムバス。
Fig. 1 is a block diagram of a personal computer according to an embodiment of the present invention, Fig. 2 is a time chart when the power supply shown in Fig. 1 is turned off, and Fig. 3 is a time chart when the power supply shown in Fig. 1 is turned on. It is a chart diagram. DESCRIPTION OF SYMBOLS 1... External AC power supply, 2... DC power supply, 3... Power on/off detection circuit, 4... DC battery, 5... Power supply control unit, 6... Continuous power supply circuit, 7... Temporary power supply circuit, 8... Backup memory, 9... Program storage section, UO... Data storage section, 11...
CPU, 12... Main memory, 13... Tisp memory, 14... Disk controller, 15...
Display, 16...Display controller,
17...keyboard, 18...keyboard controller, 19...system bus.

Claims (1)

【特許請求の範囲】  装置の電源オフ時に、DC電源をバックアップするバ
ックアップ用DC電池と、 前記DC電池から電力が供給され、前記DC電源のオン
/オフを検出する電源オン/オフ検出回路と、 前記電源オン/オフ検出回路の信号により、装置の前記
DC電源がオフになっても前記DC電池から常時電力が
供給される常時電力供給回路と、前記常時電力供給回路
により電力が供給され、動作するバックアップメモリと
、 前記DC電源をオフにした後、一時データのバックアッ
プを行うために前記DC電池から電力が供給され、CP
U、メインメモリにこの電力を供給する一時電力供給回
路と、 前記DC電源のオフ時に、前記一時電力供給回路からの
電力により前記CPU、前記メインメモリを動作させ、
必要なデータを前記バックアップメモリに退避するプロ
グラムとを有することを特徴とするパーソナルコンピュ
ータ。
[Scope of Claims] A backup DC battery that backs up a DC power source when the device is powered off; a power on/off detection circuit that is supplied with power from the DC battery and detects whether the DC power source is on or off; In response to the signal from the power on/off detection circuit, a constant power supply circuit that is constantly supplied with power from the DC battery even when the DC power supply of the device is turned off, and a constant power supply circuit that supplies power and operates. a backup memory that is powered by the DC battery for temporary data backup after the DC power source is turned off;
U. a temporary power supply circuit that supplies this power to the main memory; and when the DC power supply is turned off, the CPU and the main memory are operated by the power from the temporary power supply circuit;
A personal computer comprising: a program for saving necessary data to the backup memory.
JP2307766A 1990-11-14 1990-11-14 Personal computer Pending JPH04178855A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2307766A JPH04178855A (en) 1990-11-14 1990-11-14 Personal computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2307766A JPH04178855A (en) 1990-11-14 1990-11-14 Personal computer

Publications (1)

Publication Number Publication Date
JPH04178855A true JPH04178855A (en) 1992-06-25

Family

ID=17973015

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2307766A Pending JPH04178855A (en) 1990-11-14 1990-11-14 Personal computer

Country Status (1)

Country Link
JP (1) JPH04178855A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1324198A2 (en) * 2001-12-26 2003-07-02 Fujitsu Limited Processor and method of booting same
KR100521347B1 (en) * 1998-11-30 2006-01-12 삼성전자주식회사 A portable computer having a system control function when detaching a battery pack from the portable computer

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100521347B1 (en) * 1998-11-30 2006-01-12 삼성전자주식회사 A portable computer having a system control function when detaching a battery pack from the portable computer
EP1324198A2 (en) * 2001-12-26 2003-07-02 Fujitsu Limited Processor and method of booting same
EP1324198A3 (en) * 2001-12-26 2005-06-29 Fujitsu Limited Processor and method of booting same

Similar Documents

Publication Publication Date Title
US5379435A (en) Apparatus for providing continuity of operation in a computer
KR960035229A (en) Computer system and its control method
JPH0683491A (en) Electric-power-distribution control system of portable computer
JPH0458047B2 (en)
JPH0527880A (en) System restart device
JP2755209B2 (en) Input device for power saving control
KR950013264B1 (en) Automatic back-up and recovery device and method in computer systems
JPH0651858A (en) Program interrupting/restarting system
JPH04178855A (en) Personal computer
JP2000020182A (en) Power management method
JPH0728572A (en) Automatic data preserving device at power interruption
JPH06250939A (en) Data processor
JP2959655B2 (en) Control method of battery driven computer
JPS63184123A (en) Information processor
JPH10149236A (en) Method for recovering hibernation
JPH05282214A (en) System restart method and its device
JP2816748B2 (en) Power failure compensation type time clock
JPH0628267A (en) Information processor
JPH05210434A (en) Backup processing method
JPH0423019A (en) Information processor
JPH0566860A (en) Power source controller
JPH05233474A (en) Storage contents protection system
JP2000235436A (en) Computer system
JPH03212717A (en) Power supply control system
JPH06324770A (en) Controller equipped with extension equipment