JPH04136742U - memory device - Google Patents

Abstract

(57) [Summary] [Purpose] To realize a memory device that reduces data transfer time from ROM to RAM. [Structure] Through the column address selection circuit 1, all column address lines 101 that select readable/writable memory cells 3 are enabled, and through the row address selection circuit 2, the row address of the readable/writable memory cells 3 is enabled. When all lines 102 are enabled and a predetermined activation signal is input via the control line 103, predetermined data is transmitted from each nonvolatile memory cell 4 to the corresponding read/write memory cell 3. be transferred. By this data transfer, the data previously set in the nonvolatile memory cells 4 is written into the readable/writable memory cells 3 all at once. That is, in the present invention, for each nonvolatile memory cell of a ROM formed by nonvolatile memory cells, a RAM formed by a corresponding read/write memory cell is arranged in a one-to-one relationship. As a result, data transfer from the ROM to the RAM is performed at once, and the time required for data transfer is shortened.

Description

[Detailed explanation of the idea]

0001

[Industrial application field]

The present invention relates to memory devices, particularly in microcomputer systems. The present invention relates to a one-chip memory device that is readable/writable and initializable.

0002

[Conventional technology]

Traditionally, this type of memory device is used in microcomputer systems. Transfer by one transfer when initializing RAM including registers in The amount of data being processed is equal to the width of the data bus within the microcomputer system. Generally, the amount of data is limited.

0003

[Problem that the idea aims to solve]

In the conventional memory device described above, the RO is controlled by software by the CPU, etc. When data is transferred from M to RAM, the amount of data transferred in one transfer is Since the amount of data is limited to the width of the data bus, it takes a lot of time to transfer the data. The disadvantage is that it requires

0004

[Means to solve the problem]

The memory device of the present invention is used in a microcomputer system. In a memory device, at least R formed by non-volatile memory cells OM and a corresponding reading for the non-volatile memory cell in a one-to-one relationship. A RAM formed by writable memory cells.

[0005]

【Example】

Next, the present invention will be explained with reference to the drawings.

[0006] FIG. 1 is a block diagram showing one embodiment of the present invention. As shown in Figure 1, the book For example, in the case of a memory device with m rows and n columns, the column address line 10 of n columns 1, row address line 102 of m rows, control line 103 of m series, and data transfer of n series Corresponding to the transmission line 104, a column address selection circuit 1, a row address selection circuit 2, and m n number of read/write memory cells 3 and mn number of non-volatile memory cells 4. Prepared and configured.

[0007] In FIG. 1, a memory cell that can be read and written via a column address selection circuit 1 All the column address lines 101 for selecting 3 are enabled, and the row address selection circuit 2 All row address lines 102 of readable/writable memory cell 3 are enabled through Then, when a predetermined activation signal is input via the control line 103, each nonvolatile memory A data transfer line 104 is connected from the memory cell 4 to the memory cell 3 which can be read and written. Predetermined data is transferred via. This data transfer makes the data non-volatile in advance. The data set in memory cell 4 is written to memory cell 3, which can be read and written. be caught. That is, in the present invention, the RO formed by non-volatile memory cells For each non-volatile memory cell in M, a corresponding read/write in a one-to-one relationship By arranging a RAM formed by possible memory cells, the ROM Data transfer from to the RAM is performed all at once, reducing the time required for data transfer. Shrunk.

[0008]

[Effect of the idea]

As explained above, the present invention provides an RO formed by non-volatile memory cells. Data transfer from M to RAM formed by read/write memory cells. This has the effect of significantly shortening the time required for transport.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention.

[Explanation of symbols]

1 Column address selection circuit 2 Row address selection circuit 3 Readable and writable memory cells 4 Non-volatile memory cell 101 Column address line 102 row address line 103 Control line 104 Data transfer line

Claims (1)

[Scope of utility model registration request] 1. In a memory device used in a microcomputer system, at least a ROM formed of non-volatile memory cells and a ROM formed of non-volatile memory cells are provided in a one-to-one relationship with respect to the non-volatile memory cells. RAM formed by corresponding read/write memory cells
A memory device comprising: