JPH0395653A - Address error detecting method for data storage device - Google Patents

Abstract

PURPOSE:To detect an address error by providing a correspondence storage device to show the place where a circulating address is written and checking whether the address is read out of the same place or not by reference to the storage device. CONSTITUTION:When the data are read out of a main storage device 1, a controller 4 reads a busy address a2 out of a busy address storage device 3. An error detecting device 6 compares an address writing place with an address reading place obtained by the controller 4 to check whether the address is read out the same place as its written place or not by reference to an identifier which shows the writing place stored in the position of an address b2 of a corresponding correspondence storage device 5. Then a normal state is decided if the reading place is identical with the writing place. Then the data are read out of the position of the address a2, and the device 6 updates the identifier stored in the position of the address b2 of the storage device 5 corresponding to the address a2. When the writing place is not identical with the reading place, an error of the address a2 or the storage device 5 is decided and displayed. Thus the occurrence of the error can be recognized.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a data storage device in which addresses in a main storage device are rotated between an unused address storage device and a used address storage device to perform address management. The present invention relates to a method for detecting an address when an error occurs in a device.

[Conventional technology]

Conventionally, in buttons of this type of data storage device, error detection codes have been used to detect address errors b.

[Problem to be solved by the invention]

The above-mentioned conventional error detection method using an error detection code requires computation, and has the disadvantage that the computation is complicated and the amount of shihad increases in order to reduce the probability of occurrence of detection failure. Furthermore, it is impossible to reduce the probability of false detection to O, and once a false detection occurs, the erroneous address will circulate forever and data will be read multiple times with corrupted data. There were drawbacks.

The present invention provides a correspondence storage device that indicates the correspondence between an address and a location where the address is written, and when an address is read from the address storage device, this correspondence storage device is referred to and the address is The purpose of this invention is to detect errors by checking whether the data has been read from the same location as the location where the data was read, and to solve the above-mentioned problem.

[Means to solve the problem]

In order to achieve the above object, the present invention provides a corresponding storage device having at least the same address space as the main storage device for storing data, and when writing an address a of the main storage device to the address storage device, the address a The address of the corresponding storage device corresponding to address a is stored in the location , and when address a is read from the main memory, the address of the corresponding storage device corresponding to address a is stored in the location . An error in an address is detected by referring to an identifier indicating the location where the address a is written and checking whether the address a is read from the same location as the location where it was written.

[Effect]

In the present invention, addresses in the main memory are circulated between an unused address memory device and a used address memory device to perform address management, and the circulating addresses are stored in a write hole. A corresponding storage device is provided that indicates the location where the address is written, and by referring to this corresponding storage device when reading an address, it is checked whether the address is read from the same location as the location where the address was written. It can be detected.

〔Example〕

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a configuration diagram of an embodiment of the present invention.

In FIG. 1, 1 is a main storage device that stores data; 2 is a main storage device that stores data;
is an unused address storage device that stores unused addresses in the main storage device 1; 3 is an in-use address storage device that stores used addresses in the main storage device 1; and 4 is an unused address storage device that stores unused addresses in the main storage device 1. A management device that manages writing and reading of the medium address storage device 3; 5, a correspondence storage device that indicates the correspondence between an address and a location where the address is written; 6, an error detection device 13 that detects an address error;
is an input/output data signal line of the data storage device.

When the storage device is configured with random access memory (RAM), in the following explanation, address an is one address in main storage device 1, address alH is an unused address among addresses a, and address a2 is an unused address among addresses a. Address in use, address b is one address in the corresponding storage device 5, address b1 is the address corresponding to address a1 among the addresses, address b2
The address corresponding to address a2,
Address C indicates one address in the unused address storage device 2l or in the used address storage device 3.

Unlike the conventional method of detecting errors based on the information possessed by the address itself using error detection codes, the present invention uses information unrelated to the information possessed by the address itself, which is the location where the address is written. Since this is a method of performing error detection, even if a detection error occurs once, false 9 detection will be performed every time an address is read, so the probability of occurrence of a detection error can be reduced to approximately zero.

The operation of the first method of the address error detection method of the present invention will be described below. FIG. 2 is a diagram showing the flow of the error detection procedure of the error detection method, and FIG.
FIG. 2B is a flowchart for reading data from the main storage device 1. FIG.

The case of writing data will be described below using FIG. 1k and FIG. 2(a). When writing data to the main storage device 1 via the input/output data signal line 13, the management device 4 writes unused addresses from the storage device 2,
The unused address al is read out, the identifier indicating the write location stored in the address b1 position of the corresponding storage device 5 corresponding to the address a1 is referred to, and the error detection device 6 determines the write location and the information obtained from the management device 4. It compares the reading location with the writing location and checks whether the reading was performed from the same location as the writing location. If it is the same, it is determined to be normal, and the data is written to address a1 of the main storage device 1 and managed. The device 4 writes the address a1 in the used address storage device 3, and the error detection device 6 updates the identifier indicating the write location stored at the address b1 position of the corresponding storage device 5 corresponding to the address a1. If the writing location and the reading location are not the same, it is determined that an error has occurred in the address a1 or the corresponding storage device 5, and the occurrence of the error is displayed so that a person or a device can recognize it.

First, the case of reading data will be explained using FIG. 2(b).

When reading data from the main storage device 1, the management device 4
According to 9, the currently used address a2 is read from the currently used address storage device 3, and the error 9 detection device 6, the write location is compared with the read location obtained from the management device 4 to check whether reading was performed from the same location as the write location. If they are the same, it is determined to be normal and the address of the main storage device 1 The data is read from the location a2, and the management device 4 stores the address a in the unused address storage device 2.
2 is written, and the error detection device 6 updates the identifier indicating the write location stored in the address b2 position of the corresponding storage device 5 corresponding to the address a2. If the writing location and reading location are not the same, it is determined that an error has occurred in address a2 or the corresponding storage device 5,
The occurrence of an error is displayed so that a person or a device can recognize it.

The main storage device 1 and the corresponding storage device 5 each include at least one random access memory (RAM).
This can be achieved with When implemented with multiple RAMs, address a> and address b are in which RAM among the multiple RAMs.
It expresses both the fact that the address is in RAM and the address in the RAM.

FIG. 3 is a diagram showing a method of storing addresses in the unused address storage device 2 and the used address storage device 3. Third
In the figure, 7 is a memory, 8 is an area for storing one address a, 9 is a storage area for address a, and 10 is a storage area for separate information d. One horizontal column of the memory 7 corresponds to one address. The numbers on the left side of the memory 7 indicate addresses.

FIG. 3(a) shows a method of storing only one address a of the main memory device 1 in one address C of the address memory device 6D,
As a memory, first-in first-out (F
IFO) memory or RAM can be used. F
When an IFO memory is used, each of the unused address storage device 2 and the used address storage device 3 is constituted by at least one FIFO memory. Multiple FIFOs
If a memory is used, the management device 4 has a function of selecting FIFO memory.

The writing location of address a is represented by an identifier indicating the FIFO memory to which address a is written.

When a RAM is used, both the unused address storage device 2 and the used address storage device 3 are constituted by at least one RAJtlI. The management device 4 is an address pointer control circuit for writing and reading unused addresses and used addresses (it manages a pair of pointers indicating address positions to be written into RAM and address positions to be read), and controls writing order, reading order, etc.
There are at least two circuits for controlling unused addresses and for used addresses. Furthermore, when configured with a plurality of RAMs, it has a memory selection function. The writing location of address a is RA where address a is written as 1 and b.
It is represented by at least one of an identifier indicating M or an identifier indicating an address pointer control circuit corresponding to the write location.

FIG. 3 fb) is a method in which a plurality of addresses a of the main memory device 1 can be stored in one address C of the address storage device, and a RAM can be used as the memory. Both the unused address storage device 2> and the used address storage device 3 are constituted by at least one RAM, and the management device 4 has an address pointer control circuit corresponding to each vertical column of the memory 7. Furthermore, when configured with a plurality of RAMs, it has a memory selection function. Address a writes 1 to the write location of address a! RAM
or an identifier indicating the address pointer control circuit corresponding to the writing location, or an address a
is expressed by at least one bit position of address C where 1 is written.

FIG. 3(c) shows a method of storing one address a of the main memory 1 in one address C of the address storage device and separate information d associated with the address a at the time of writing, and the memory is a FIFO memory. Sled or RAM can be used. When using FIFO memory, the unused address storage device 2 and the used address storage device 3 are
Each of them is configured with at least one FIFO memory. When configured with multiple FIFO memories, the management device 4 has a memory selection function. The writing location of address a is expressed by at least one of an identifier indicating the FZFO memory to which address a is written, or separate information d associated with address a at the time of writing.

When RAM is used, both the unused address storage device 2 and the used address storage device 3 are constituted by at least one RAM. The management device 4 has at least two address pointer control circuits for writing and reading unused addresses and used addresses. Furthermore, if a plurality of RAMs are used, it has a memory selection function. The writing location of address a is determined by at least one of an identifier indicating the RAM to which address a is written, an identifier indicating the address pointer control circuit corresponding to the writing location, or separate information d associated with address a at the time of writing. express. Alternatively, it is also possible to use the method shown in FIG. 3(b) by setting the address a and the separate information d as one set and replacing the address a with this one set.

FIG. 4 is a diagram showing a method of storing an identifier indicating a location where an address is written into the corresponding storage device 5.

As an example, a location is represented by an identifier such as "A", "I", "K", "O". 4(b) shows the corresponding storage device 5
FIG. 4 is a diagram showing a method of storing an identifier indicating a location at a location of an address.

In FIG. 4(a), as an example, the bits of the address are sequentially indicated from left to right by the identifier "A", "I", "U", "Work".
"'1" is written in the bit corresponding to the identifier indicating the storage location, and "0#" is written in the other bits.Multiple bits may be made to correspond to the identifier indicating one location. .

In the case of FIG. 4(a), an identifier "u" indicating a location is stored at address b=o. In this case, firstly, the address a'! f - A method of checking whether "1" is stored in the bit corresponding to the identifier indicating the read location, and secondly, checking whether "0" is stored in all bits other than the bit corresponding to the identifier indicating the read location of address a. There is a method of checking whether the address is stored, and a third method of checking both the first and second states.In the case of Fig. 4(b), the identifier itself indicating the location is inserted at the address position. Therefore, the identifier "U" indicating the location is stored at address b=o.

FIG. 5 is a diagram showing a method of realizing the main storage device 1 and the corresponding storage device 5 using the same memory. It is sufficient if the corresponding storage device 5id has the same address space as the main storage device 1, so both can be realized with one memory. In FIG. 5, reference numeral 11 indicates a main memory area for storing data, and 12 indicates a corresponding memory area for storing an identifier indicating the write location of address a. As a method of storing an identifier indicating the writing location of address a in the corresponding storage area 12, two methods shown in FIG. 4 are possible.

There may be an area α that is not defined as an address write location in the address storage device. however,
When area α exists and an address is written to area α, it is written to the defined location in the corresponding storage device 5! When an identifier indicating that there was no write trench is stored and an address is read from area α, it is checked whether an identifier indicating that there was no write trench is stored at the defined location. If an address is written in the area α or if an address is read from the area α, the storage contents of the corresponding storage device 5 are not updated or an error check is performed.

Next, a second method of the address error detection method of the present invention will be explained. The configuration of the device is the same as that of the previous embodiment,
The storage contents of the corresponding storage device 5 are updated each time address a is written to the address storage device, but address a is read from the address storage device to check whether it has been read from the same location as the address a was written to. Rather than doing it all at once, it is done intermittently according to specific rules or randomly.

In this method, the time required for detection after an erroneous address may be 9 times longer than in the first method, but the probability of detection failure can similarly be reduced to approximately zero.

〔Effect of the invention〕

As explained above, the present invention is a data storage device that performs address management by circulating addresses in a main memory device between an unused address storage device and a used address storage device. An address error is detected by providing a correspondence storage device that indicates the correspondence between the mixed locations, and referring to this correspondence storage device when reading an address, and checking whether reading is performed from the same location as the write location. Therefore, it can be expected that the probability of occurrence of false detection failure can be reduced to almost zero.

[Brief explanation of drawings]

Figure 1 is a configuration diagram of an embodiment of the present invention, Figure 2 (a) is a flowchart when writing data to the storage device 1, Figure 2 (b)
3 is a flowchart when reading data from the storage device 1, FIG. 3 is a diagram showing a method of storing an address in the address storage device, and FIG. FIG. 5 is a diagram showing a method of realizing the main storage device 1 and the corresponding storage device 5 using the same memory. 1... Main storage device, 2... Unused address storage device, City 3... Used address storage device, 4... Management device, 5
... Corresponding storage device, 6... Error detection device, 7... Memory, 8... Area for storing one address, 9... Address storage area, 10... Other information Storage area, 11.
. . . Main storage area, 1 2 . . . Corresponding storage area, 1 3 . . . Input/output data signal line FIG. 2 (a) One implementation of the present invention f! Configuration diagram of iI1 Figure 1 Figure 2 Figure (1)) (a) (b) 8 (C) Figure 3 showing the method of storing addresses in the At9 address storage device Figure 7 (a) 7 (b)

Claims (1)

[Claims] 1. A main memory device (1) in which data is written or read by specifying an address a, and an unused address memory that stores an unused address a1 of the main memory device (1). a device (2), and a busy address storage device (2) that stores the busy address a2 of the main storage device (1).
3), and a management device (4) that manages writing and reading of the unused address storage device (2) and the used address storage device (3), the main storage device (1)
When writing data to the main storage device (1), the management device (4) reads the unused address a1 from the unused address storage device (2) and stores the address a1 in the main storage device (1).
1, the management device (4) writes address a1 to the in-use address storage device (3), and when reading data from the main storage device (1), the management device (4) ) reads the in-use address a2 from the in-use address storage device (3),
In the data storage device, data is read from the location of address a2 of the main storage device (1), and address a2 is written to the unused address storage device (2) by the management device (4), A corresponding storage device (5) that stores the address corresponding to address a in the location of at least one of the unused address storage device (2) and the used address storage device (3). and when writing address a to at least one of the unused address storage device (2) and the used address storage device (3), the position of address b of the corresponding storage device (5) corresponding to address a. stores an identifier indicating the writing location of address a, and when reading address a from at least one of the unused address storage device (2) and the used address storage device (3), the above-mentioned correspondence corresponding to address a is stored. The error detection device (6) checks whether the address a is read from the same location where it was written by referring to the identifier indicating the location where the address a is stored in the storage device (5). A method for detecting an address error in a data storage device, characterized in that an error in an address a is detected by: 2. In the compatible storage device (5) of claim 1, by representing the identifier indicating the writing location of address a by the bit position of address b corresponding to address a, it is possible to determine whether the identifier is read from the same location as the writing location, or , address a is not read from a location other than the write location, or by checking both read locations.
1. A method for detecting an address error in a data storage device, characterized in that an error in the address error is detected by an error detection device (6).