JPH03181103A - Hybrid integrated circuit board resistor - Google Patents
Hybrid integrated circuit board resistorInfo
- Publication number
- JPH03181103A JPH03181103A JP1321788A JP32178889A JPH03181103A JP H03181103 A JPH03181103 A JP H03181103A JP 1321788 A JP1321788 A JP 1321788A JP 32178889 A JP32178889 A JP 32178889A JP H03181103 A JPH03181103 A JP H03181103A
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- trimming
- resistors
- short
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 12
- 238000009966 trimming Methods 0.000 abstract description 25
- 239000011159 matrix material Substances 0.000 abstract description 4
- 230000002265 prevention Effects 0.000 abstract 4
- 230000007547 defect Effects 0.000 description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- VNNRSPGTAMTISX-UHFFFAOYSA-N chromium nickel Chemical compound [Cr].[Ni] VNNRSPGTAMTISX-UHFFFAOYSA-N 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000010297 mechanical methods and process Methods 0.000 description 1
- 229910001120 nichrome Inorganic materials 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910001925 ruthenium oxide Inorganic materials 0.000 description 1
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Non-Adjustable Resistors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は、混成集積回路基板上に形成する抵抗の構成
に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the configuration of a resistor formed on a hybrid integrated circuit board.
第４図は従来の混成集積回路基板抵抗のトリミング前の
上面図、第５図は第４図の基板抵抗のトリミング後の上
面図である。FIG. 4 is a top view of a conventional hybrid integrated circuit substrate resistor before trimming, and FIG. 5 is a top view of the substrate resistor of FIG. 4 after trimming.
図において、（１）は酸化ルテニウム（ＲｕＯ□：厚膜
基板）、ニッケル、クロム（ＮｉＣｒ：薄膜基板）等の
材料によ多構成された抵抗体、（２）は電極、（７）は
次に動作について説明する。電極（２）間に形成された
抵抗体（１）によυ、誘電体基板上に抵抗が形成される
。さらに、抵抗体（１１形成時のバランキ調整及び回路
構成上必要に応じて第５図に示すような粗調整トリミン
グ（７）及び微調整トリミング（８）によう抵抗値の調
整がなされる。なお、トリミングは機械的方法、レーザ
トリミング等及び手加工、自動化等の方法で実施されて
いる。In the figure, (1) is a resistor made of materials such as ruthenium oxide (RuO□: thick film substrate), nickel, chromium (NiCr: thin film substrate), etc., (2) is an electrode, and (7) is the following: The operation will be explained below. A resistance is formed on the dielectric substrate by the resistor (1) formed between the electrodes (2). Furthermore, the resistance value is adjusted as shown in FIG. 5 by coarse adjustment trimming (7) and fine adjustment trimming (8) as necessary for the balance adjustment when forming the resistor (11) and the circuit configuration. The trimming is performed by mechanical methods, laser trimming, manual processing, automation, etc.
従来の混成集積回路基板抵抗は以上のように構成されて
いるので、トリミング時にシいて、トリミング量と抵抗
値の関係が不明瞭であシ、且つ、オーバトリミング、さ
らには開放状態までオーバカットするなどの問題点がめ
った。Since the conventional hybrid integrated circuit board resistor is configured as described above, the relationship between the amount of trimming and the resistance value is unclear during trimming, and the resistor may be overtrimmed or even overcut to an open state. Problems such as these were rare.
この発明は上記のような問題点を解消するためになされ
たもので、トリミング量と抵抗値の関係が明確にできる
とともに、オーバカントを防ぐことを目的とする。This invention was made to solve the above-mentioned problems, and aims to clarify the relationship between the amount of trimming and the resistance value, and to prevent overcrowding.
な単位抵抗体を直列及び並列に接続するとともに、短絡
線及び開放不良防止用抵抗のラインを備えたものである
。In addition to connecting unit resistors in series and in parallel, the circuit is equipped with a shorting line and a resistor line for preventing open defects.
この発明に釦ける混成集積回路基板抵抗は、微小な単位
抵抗体が直列及び並列に接続され、短絡線及び開放不良
防止用抵抗のラインが接続される。In the hybrid integrated circuit substrate resistor according to the present invention, minute unit resistors are connected in series and in parallel, and a short circuit line and a resistor line for preventing open defects are connected.
以下、この発明の一実施例を図について説明する。第１
図は混成集積回路基板抵抗のトリミング前の上面図、第
２図は第１図の基板抵抗のトリミング後の上面図、第３
図は第２図に示すトリミング実施後の基板抵抗の等価回
路図である。An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure is a top view of the hybrid integrated circuit board resistor before trimming, Figure 2 is a top view of the board resistor in Figure 1 after trimming, and Figure 3 is a top view of the hybrid integrated circuit board resistor after trimming.
The figure is an equivalent circuit diagram of the substrate resistance after trimming shown in FIG. 2.
図に卦いて、ｒｌ）は抵抗体、（２）は電極、（３）は
開放不良防止用抵抗、（４）は短絡線、（５）は連結縁
、（６）はトリミング部である。In the figure, rl) is a resistor, (2) is an electrode, (3) is a resistor for preventing open defects, (4) is a shorting line, (5) is a connecting edge, and (6) is a trimming portion.
次に動作について説明する。２直列×２並列の抵抗体マ
トリックスの場合にかいては、必要に応じて、抵抗体（
１）及び短絡線（４）をトリミングすることによう電気
的抵抗値として合計６通シの値（０Ω、 ０．４Ｒ，０
，６６Ｒ，０，８６Ｒ，Ｒ，２Ｒ：単位抵抗体（１）１
個をＲΩとして）が得られる。Next, the operation will be explained. In the case of a 2 series x 2 parallel resistor matrix, the resistors (
1) and the short-circuit wire (4), a total of six electrical resistance values (0Ω, 0.4R, 0
, 66R, 0, 86R, R, 2R: Unit resistor (1) 1
RΩ) is obtained.
なか、上記実施例は抵抗体ｍが２直列×２並列の構成を
示したが、現実的には抵抗値の精細なトＩＪ ミング幅
を得るために多数のｍＸｎ行列にすることによシ、高ｎ
度な抵抗値が得られる。In the above embodiment, the resistor m is arranged in two series x two parallel configurations, but in reality, in order to obtain a fine IJ trimming width of the resistance value, a large number of mXn matrices are used. High n
A high resistance value can be obtained.
さらに、計算機によ、り所望の抵抗値を得るためのトリ
ミング箇所を簡単に算出することが可能となるため、オ
ーバカントを防ぐことができるとともに自動化が容易と
なる。Furthermore, since it is possible to easily calculate the trimming location to obtain a desired resistance value by using a calculator, overcount can be prevented and automation can be facilitated.
また、開放不良防止用抵抗（３）を備えたことにより開
放不良をなくすことができる。Furthermore, by providing the resistor (3) for preventing open defects, open defects can be eliminated.
なお・、以上の説明に釦いては混成集積回路基板抵抗と
して説明したが、チップ抵抗、抵抗マトリックス等への
応用も可能であることは言うまでもない。Although the above explanation has been made as a hybrid integrated circuit board resistor, it goes without saying that it is also possible to apply the present invention to chip resistors, resistor matrices, and the like.
以上のようにこの発明によれば、抵抗体をマトリックス
状に配し、短絡線、開放不良防止用抵抗を備える構成と
したので、トリミング作業を容易に且つ精度の向上が計
れ、自動化が容易となシオーバカントによる開放軍区を
なくすことができる。As described above, according to the present invention, the resistors are arranged in a matrix, and the structure is equipped with a short circuit line and a resistor for preventing open defects, so that the trimming work can be easily performed, the accuracy can be improved, and automation can be easily achieved. It is possible to eliminate open military zones due to strong Siobakant.
第１図はこの発明の一実施例による混成集積回路基板抵
抗のトリミング前の上面図、第２図は第１図の基板抵抗
のトリミング後の上面図、第３図は第２図に示すトリミ
ング実施後の等価回路図。
第４図は従来の混成集積回路基板抵抗のトリミング前の
上面図、第５図は第４図の基板抵抗のトリ不良防止用抵
抗、（４）は短絡線、（５）は連、ｉｉ！ｉｉ！、＋６
１はトリミング部である。
な釦、図中、同一符号は同一、または相当部分を示す。1 is a top view of a hybrid integrated circuit substrate resistor according to an embodiment of the present invention before trimming, FIG. 2 is a top view of the substrate resistor of FIG. 1 after trimming, and FIG. 3 is a top view of the substrate resistor shown in FIG. 2. Equivalent circuit diagram after implementation. Fig. 4 is a top view of a conventional hybrid integrated circuit board resistor before trimming, Fig. 5 is a resistor for preventing tri-failure of the board resistor of Fig. 4, (4) is a shorting line, (5) is a connection, ii! ii! ,+6
1 is a trimming section. In the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
抵抗体を直列及び並列に接続し、トリミングを行うこと
を特徴とする混成集積回路基板抵抗。1. A hybrid integrated circuit substrate resistor formed on a dielectric substrate, which is characterized in that minute unit resistors are connected in series and in parallel and trimmed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1321788A JPH03181103A (en) | 1989-12-11 | 1989-12-11 | Hybrid integrated circuit board resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1321788A JPH03181103A (en) | 1989-12-11 | 1989-12-11 | Hybrid integrated circuit board resistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03181103A true JPH03181103A (en) | 1991-08-07 |
Family
ID=18136421
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1321788A Pending JPH03181103A (en) | 1989-12-11 | 1989-12-11 | Hybrid integrated circuit board resistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03181103A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6751030B2 (en) | 2002-06-04 | 2004-06-15 | Canon Kabushiki Kaisha | Zoom lens and image-taking apparatus |
| WO2013047724A1 (en) * | 2011-09-29 | 2013-04-04 | ローム株式会社 | Chip resistor and electronic equipment having resistance circuit network |
| WO2013099379A1 (en) * | 2011-12-28 | 2013-07-04 | ローム株式会社 | Chip resistor |
-
1989
- 1989-12-11 JP JP1321788A patent/JPH03181103A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6751030B2 (en) | 2002-06-04 | 2004-06-15 | Canon Kabushiki Kaisha | Zoom lens and image-taking apparatus |
| WO2013047724A1 (en) * | 2011-09-29 | 2013-04-04 | ローム株式会社 | Chip resistor and electronic equipment having resistance circuit network |
| US9224731B2 (en) | 2011-09-29 | 2015-12-29 | Rohm Co., Ltd. | Chip resistor and electronic equipment having resistance circuit network |
| US9735225B2 (en) | 2011-09-29 | 2017-08-15 | Rohm Co., Ltd. | Chip resistor and electronic equipment having resistance circuit network |
| US10224391B2 (en) | 2011-09-29 | 2019-03-05 | Rohm Co., Ltd. | Chip resistor and electronic equipment having resistance circuit network |
| US10833145B2 (en) | 2011-09-29 | 2020-11-10 | Rohm Co., Ltd. | Chip resistor and electronic equipment having resistance circuit network |
| WO2013099379A1 (en) * | 2011-12-28 | 2013-07-04 | ローム株式会社 | Chip resistor |
| US9627110B2 (en) | 2011-12-28 | 2017-04-18 | Rohm Co., Ltd. | Chip resistor |
| US10410772B2 (en) | 2011-12-28 | 2019-09-10 | Rohm Co., Ltd. | Chip resistor |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0552043B2 (en) | ||
| WO1981000484A1 (en) | Fabrication of film resistor circuits | |
| US4528546A (en) | High power thick film | |
| US20020130761A1 (en) | Chip resistor with upper electrode having nonuniform thickness and method of making the resistor | |
| JPH03181103A (en) | Hybrid integrated circuit board resistor | |
| JP3190120B2 (en) | Measuring resistor and manufacturing method thereof | |
| EP0398364B1 (en) | Thick-film element having flattened resistor layer | |
| JPH085522Y2 (en) | Chip resistor | |
| JPH02303013A (en) | Capacitance value adjustment method of capacitor built in board | |
| JPH07193342A (en) | Electronic component mounting circuit board | |
| KR200147419Y1 (en) | The structure of resistor | |
| JPH02276207A (en) | Electronic circuit regulator | |
| JPH07320915A (en) | Chip type network resistor | |
| JPH0454460Y2 (en) | ||
| JPH09260113A (en) | Resistor and manufacture thereof | |
| JPS59171153A (en) | Method of composing pattern of hybrid integrated circuit | |
| JPH05223515A (en) | Manufacture of thin film resistance for strain detection | |
| JPH09326540A (en) | Electronic circuit board with resistor pattern | |
| JPH02163990A (en) | Hybrid integrated circuit device | |
| JPH02110902A (en) | Resistance value correcting method | |
| JPH0689801A (en) | Chip type resistor | |
| JPH0391902A (en) | Method of forming resistance film for chip r network | |
| JPH02264460A (en) | Hybrid integrated circuit device | |
| JPH0350704A (en) | Resistor formation and correction thereof | |
| JPS6240787A (en) | Thick film chip resistor |