JPH03171359A - Electronic equipment with communication function - Google Patents

Abstract

PURPOSE:To always retrieve the display the data stored in a memory in the correct order by storing the data received via a reception means after the data already stored in the memory in response to the mode data. CONSTITUTION:A memory 46 which stores respective data in accordance with each type of them, and a reception means 47 receives the mode data showing the types of data and the data main body added to the mode data are provided. The data received by the means 47 are stored after the data already stored in the memory 46 in accordance with the mode data. Then the data stored in the memory 46 are stored for each mode data in the fixed order. Thus it is possible to always retrieve and display the data stored in the memory 46 including the received data in the correct order.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to electronic devices with a communication function that transmit and receive data between devices each equipped with a memory.

[Prior art] In recent years, free data such as personal schedule data, address book data with phone numbers attached to names and addresses, business card data including company names, and comments that you want to remember are becoming increasingly popular. Many electronic devices have been commercialized, such as electronic notebooks that store information and recall and display the information as needed. All of these electronic devices have internal memory that stores the above-mentioned various data, and by connecting multiple electronic devices, they have the ability to send and receive data between the memory phases of each electronic device. There are some things.

In electronic equipment that sends and receives data between the phase ILs mentioned above, for example, after inputting data using a large AT device that can be easily operated manually, the data is transferred to a small, easily portable device. By transferring data, it is possible to simplify data input and to make it more efficient.

The electronic device receiving the data sequentially writes and stores the sent data in the free space in the western memory where no data is stored yet.

[Problem that the invention attempts to solve]

Generally, address book data and business card data are arranged alphabetically or in alphabetical order by name, and schedule data is [l]
They are stored in memory in the order in which they are assigned, and can be displayed sequentially by operating a key switch.

l, Kashi τ, already in the same mailbox (this Alf Tbe...ll
If the data is stored in the order of date, Aiueo condyle, and date, and then the data sent via data communication is added to the empty space and stored, the data will be arranged in the order up to that point. There is a risk that the order will be disrupted and it will not be possible to search and display the order.

This invention was made in view of the above circumstances! Means for Solving Problem 1 The purpose is to provide an electronic device with a communication function that can search and display data in memory in an orderly manner, including data that has been transferred. That is, the present invention includes a memory that stores each data according to the data type, and a receiving means that receives the code data indicating the data type and the data body attached to the mode data 1. After the received data obtained by the means is written consecutively to the data already stored in the memory according to the mode f, each data in the memory is written in a certain order in each mode data group. Sort according to the following.
, so you can always search and display the data in the memory in the correct order while checking the transferred data.

[Example: This invention is described below?] An example of a wristwatch having a child's notebook function will be described with reference to the drawings.

Figures 1 and 2 show its external structure, and 1l is the wristwatch case. This watch case 1l is made of metal such as stainless steel or synthetic resin, and has an n,'7 glass 12 attached to its upper surface as an exterior case, and a dot marix liquid crystal display 13 is disposed below it. Also, on the left side of the watch case 11, there is a push button switch S1.
At the bottom of the 2nd mark 1'Mal glass 12 there is a push button switch 52~
S5 is provided. Furthermore, a connector section 15 for data communication with other electronic devices to be described later is formed on the right side of the case 1l of the wristwatch. ．． The connector portion l5 of No. 7 has two conductive vials 17.7 which serve as connection terminals in the long holes l6 each having a semicircular shape at both ends. 17 is provided.

Figure 3 shows an electronic notebook 2l that can be connected to the connector section 15.
This is an illustration. Here, the electronic notebook 21 has a calculation function, a telephone number memory for storing telephone number data, a schedule memory for storing schedule data, and a free data memory for storing free data such as arbitrary comments. . The electronic wristwatch 21 is made up of a left case 21a and a right case 21bε connected to form a single body, and is large enough to be held in the hand when folded, and FIG. 3 shows the opened state. On the left side 21a of the electronic notebook 21, there is a dot matrix liquid crystal display 22, which is used to input numerical values and calculate =1.
The right case 21I) is provided with a character key 24 consisting of, for example, an Alleftebet key for character input 0. These numerical values/four arithmetic operation keys 2
3.Use the cry letter key 24 to enter phone number data and schedule.
-1. -You will have to input the free data and free data.

Further, a not-shown connector is provided on the upper side of the left case 21a, and is connected to the interface 2G via a cable 25. This interface 26 is
The cable 27 converts the voltage of the data signal sent through the cable 25, and the converted data signal 1 is a pressure value. It is connected to the connector part l5 of No. 11.

The following FIG. 4 is a diagram showing the detailed connection structure of the connector section 15.

In the figure, the elongated hole 16 is formed by a bottomed resin vibrate 31, and this vibrator 3N is a watch case l1.
It is buried in the side surface, and a conductive bottle 17 is loosely inserted into the bottom 31a. This pin i7 has a flange 17a formed at one end on the front side of the pipe 31.
A spring 32 is installed between the bottle 17a and the bottom 31a of the pipe 3l so as to be inserted through the body of the bottle 17. The pin l7 passes through the waterproof packing 33 on the lower surface side of the pipe 3l, and a stepped portion 27b is provided near the other end to prevent the pin from coming off.
is engaged, while the other end 17c faces a terminal 35 electrically connected to an electronic circuit, which will be described later. Above pipe 3
When nothing is inserted into long hole l6 of l, spring 3
Due to the elasticity of 2, the flange 17a is located on the same plane as the outer peripheral surfaces of the wristwatch case 11 and the pipe 31, and the other end surface 17c of the pin I7 is separated from the terminal 35 and faces the long hole of the pipe 3I. When the jack 36 is inserted into the pin 16 as shown in the figure, the jack terminal 313a suppresses the bottle 17 to the left in the figure, and the other end surface 17c is in contact with the terminal 35, and the cable 27 and the electronics inside the case 11 are The circuit is electrically connected.

In addition, 37 is watch case 11! 38 is a waterproof packing that maintains an airtight state between the back cover 37 and the wristwatch case l1.

In the above-described structure, the configuration of the electronic circuits provided in the case 11 of the arm B is as shown in FIG.

In the figure, 4l is an oscillation circuit that oscillates a near-frequency pulse that serves as a reference for various operations and time measurement.

The reference frequency pulse oscillated by the oscillation circuit 4l is frequency-divided by a frequency division/timing signal section 42 to produce various timing signals, which are sent to a control section 43 controlled by the CPU. This control section 43 controls the operation of other circuits according to the key force f3 from the key force section 44, which is made up of the pushbutton switches 81 to S5, in accordance with the timing signal from the frequency division/timing signal section 42. Then, the ROM 45 storing a microprogram for operation control is addressed and the microprogram is read, while input/output is performed by addressing to the RAM 40 storing various data. Further, the control unit 43 transmits and receives data to and from the communication circuit unit 47, while driving the buzzer drive circuit 48.
No. 3 and display data are output to the display control unit 49, respectively. The buzzer drive circuit 48 drives the speaker 50 to emit sound in response to a drive signal from the control unit 43.

The display control section 49 decodes the display data sent from the control section 43 to obtain a drive signal, and uses this drive signal to drive and control the display section 5l consisting of the liquid crystal display l3 to display time, communication data, etc. Display and output.

The communication circuit section 47 is connected to the interface 26 via the connector section 5, and sends and receives data to and from an external device 52 such as the electronic notebook 21.

Although this external device 52 is not shown, the watch case l
CPU, ROM, RAM as well as the structure of the electronic circuit inside
The data sent from this external device 52 via the interface 26 and the connector section l5 is received by the communication circuit section 47, and then sent to the RA by the control section 43.
It is stored in M46.

The following FIG. 6 shows the detailed structure of the RAM 46, and the RAM 4B consists of a register area 46aSn, 3 story number memories 46b, a schedule memory 46c, a free data memory 40d, and a work area 4[ie.

The register area 46a further includes a display register, a display mode (M) register, a clock register, an FO register, and an FO register.
It consists of L register, N register, PO register, Pl register, P2 register, Ll register and L2 register. The display register stores display data, the display mode register stores display mode data, and the timer 1 register stores current 115 clock data. Display mode 1/Jister M consists of a quaternary counter,
The display mode data, which is the count value, is the time data table 71, 1l. rDJ for ¥, "1" when displaying phone number data, "2" for snow 7゛joule data display H:i,
When the free day 9 is displayed, "3" will be displayed, and these values will be cycled for each update setting. FOI no register is in reception mode 11! f,,Fil register is feed 13 mode 1
It is a Nolag 1 Nojistor with a value of 1 for 1 and 1 respectively. In addition, the N1 register is in transmission mode n! j(.: 1 nojistor for distinguishing the data to be sent i′; 5
P register P2 register is used to specify one of the many data stored in telephone number memory 46b5, scale call memory 4Qe, and free data memory name 6 (1). Furthermore, the Lll register is a flag register that is set to "1" in the telephone number mode IN, and the L2 register is set to "1" in the schedule mode U.S.

The phone number t'' memory 413b is a memory for storing phone number data, and stores data consisting of a set of name, pronunciation, address, phone number, and comment 1.
4. Store multiple sets in IIl1 or alphabetical order. , schedule call memory 46e is a memory for storing schedule call data, and includes date and time ε schedule call memory 46e. - file contents and 1,
Multiple sets of data are stored in chronological order. , the free data memory 48d is a memory for storing arbitrary comment data, and stores the data in the order in which they are entered manually.

Next, the external unit 25i52 and the communication circuit section 47 shown in FIG.
The basic format of the data transferred in 141 and stored in RAM 46 will be explained with reference to FIG.
20 Interf J, according to chair standards.

As shown in the figure, all data consists of a 1 by 1 - start code a, 2 bytes of byte number data b, 14 bytes of address cs, 2 bytes of mode data, bood d, and N bytes of data C that differs for each mode (this data (There are cases where e exists (1, there are cases where it does not exist) and a 2-byte diagonal sum f for charge detection is constructed as one data block. When transferring data, please follow the basic format above.
The mode data data tab ['l tsuku] shown in Figure 8 (A) is placed at the beginning of the data block (transmission (iL)), and then
) Arrange the length data shown in any number of blocks (after 2,
Finally, a data tab for the end data shown in FIG. 8(C) is placed.

In this embodiment, the mode data shown in FIG.
Which of the free data is f ;) -: First Moe data block, byte number data b is r02J, address C is ro000J, mode data hood d is "02" indicating mode data, data The part e is changed by 5z depending on the mode.

In addition, in the actual data shown in FIG. 8(B), because data b is short by N bytes of data e because of by 1, the first digit 1 by 1 of ad 1 nos C is the lower seed jaw in that mode. ;J'X data. For example, if this actual data is data in telephone number mode, the lower type is ε, which indicates any of name data, pronunciation data, address data, telephone number data, and comment data, and the data indicating this lower type is It is stored in the first digit, and the following three bytes become the actual address. The mode data code d following this address C becomes "00" indicating that it is a real code, and the data e continues for N bytes as described above.

The data block of the end data shown in FIG. 8(C) functions even when the data indicating registration in the memory is passed at the end of the transfer, and the byte number data b is "
00'', address C becomes roo00J, mode data code d becomes ``01'' indicating the final r data, and then data e is omitted and checksum f is arranged.

Next, the operation of the above embodiment will be explained.

FIG. 9 is a flowchart showing the overall processing content,
This is a process that can be executed at a specific timing, and at the beginning, as shown in step AOI, it is determined whether the flag "1" indicating the reception mode is set in the FO register of the register area 48a of the RAM 4B. do. If it is determined that the flag is set, it means that the mode is reception mode, and the process then proceeds to step AO2 to perform reception processing.

Details of this receiving process are shown in FIG. The reception process starts reception in synchronization with the ON code signal sent from the other party's device, and at the beginning, the step BOI
After receiving one data block and temporarily holding it in the work area 46e of the RAM 413, in the next step BO2, an OFF code signal indicating that one block of data has been received is transmitted to the other party's device. When the other party's device receives the OFF code, it stops transmitting the next data until it receives the ON code. Thereafter, in step BO3, it is determined whether the data block sent is end data appended to the end of a series of data communications or not by checking whether the mode data code d in the data block is "01". Judgment will be made accordingly. If it is determined No here, the process proceeds to step BO4, where it is determined whether or not the data block is mode data located at the beginning of data communication based on the mode data code d in the data block.

When the mode data code d is "02" and it is determined that the data block is mode data, the process proceeds to step BO5, where data e in the data block is read out, and the following actual data is data of what mode. A flag "1" is set in the LL register and the L2 register according to the result of the judgment. In this case, if the data e indicates the telephone number mode, Ll
Set the flag "1" in the register, set the flag "1" in the L2 register if the content indicates the schedule mode,
If the content indicates free data mode, do not set it in either the Ll register or the L2 register. Thereafter, in step BOB, an ON code is sent to the other device to prompt transmission of the next data block, and the process returns to step BOI.

In this step BOI, the actual data following the mode data is set to 1.
A data block is received and held in the work area 46e of the RAM 4B. In the following step BO2, an OFF code signal is transmitted, and in step BO3, it is determined that the data block sent is not end data, and then in step BO4, if it is determined that it is not mode data, this data block is actual data. Therefore, the process proceeds to step BO7. In step BO7, N bytes of the data e in the data block held in the work area 48e are transferred to the telephone number memory 46b1 according to the mode according to the contents of the Ll register and the L2 register.
Schedule memory 48c and free data memory 46
d in an empty area where no data is stored. Thereafter, in step BOB, an ON code is sent to the other device to prompt transmission of the next data block, and the process returns to step BOI.

Below, the above process is repeatedly executed on the code that receives the data block of actual data, and the RA
M46 phone number memory 46b1 schedule memory 4
6c and free data memory 48d.

Then, the reception of the data block of the actual data is completed, and then the end data is received. After receiving the data block in step BOI and transmitting an OFF code signal in step BO2, if it is determined in step BO3 that it is an end code, the process proceeds to step BO8. In step BO8, a drive signal is sent to the buzzer drive circuit 48 to cause the speaker 50 to emit a first alarm sound indicating that the series of data reception has been completed. Thereafter, in step BO9, it is determined whether the flag "1" is set in the LL register of the register area 46a, that is, whether the received data is telephone number data.

If the flag "1" is set in the LL register and the received data is telephone number data, then in step BIG, the telephone number data stored in the telephone number memory 46b of the RAM 4B is converted to the name data in the data. Editing is performed to rearrange the data in alphabetical order, and the data arrangement that has been disturbed by data reception is tidyed up.

Figure 12 shows the basic concept of this editing process.
As shown in FIG. 12 (1), when data rAJ rDJrFJ is recorded in the memory, if new data rBJ rcJ rEJ is added to the received data and stored, The data array is rAJrDJ rFJ as shown in Figure 12 (2).
The order is rBJ f'cJ I''EJ.

Therefore, if these data are edited and sorted into alphabets 1 and 1, Figure 12 (3)
rAJ rBJ rcJ rDJr as shown in
It is assumed that the data is stored in the correct order: EJ rFJ. The basic concept of Fig. 12 shows an example of rearranging data in alphabetical order, but this is, for example, a telephone number memory 46Th of RAM 4G), and the name data in each telephone number data is composed of kana characters. If the schedule memory 46e is 1f, it will be rearranged in alphabetical order, and if it is in the schedule memory 46e, it will be rearranged in chronological order according to the date and time data in each schedule data.

After completing the above step BIO processing, a certain LSL. t
Lit in register area 46a at step BO9
After a judgment is made that the flag "1" is not set in the /register and the received data is not telephone number data, step Bll is reached. In step Bll, it is determined whether the flag "1" is set in the register L21/register of the register area 4Ga, that is, whether the received data is schedule data or not. The flag "1" is set in the L2 register, and the received data is in the schedule 5-
If it is file data, then in step B12 the RAM is
An editing process is performed to rearrange the schedule data that has been completely stored in the 4G scheduler memory 40e according to the order of the date and time data in the data, and the data ε received by data reception and the previously stored data are Tidy up all data arrays.

After completing the process of step Bl2, or after determining that the flag "1" has not been set in the L2 register of register area 4[ia in step Bll and that the received data is not schedule call data, step Bl3
leading to. In step B13, a drive signal is sent to the buzzer drive circuit 48 to generate a second alarm sound indicating that the editing process in the memory accompanying data reception has been completed.
The sound is emitted at the lever (i) shown in FIG. 10, and the process is completed.

Note that if it is determined in step BO9 and step Bll that the received data is neither telephone number data nor schedule call data, the received data is free data that can be added to any comment. In particular, the data arrangement in the free data memory 46d is not changed, and the data is stored in the free data memory 4Bd in the order in which it is received.

When the reception process is completed as described above, the process proceeds from step AO2 to step AO3 in FIG. judge whether If there is human power on the key, then the process proceeds to step AO4 to perform key processing corresponding to the human power on the key.

FIG. 11 shows the details of the key processing, and at the beginning of the processing, it is first determined in step COI whether the fully operated key is the pushbutton switch SI or AN.

If it is determined that it is the push button switch S1, the process proceeds to step CO2, where the content of the display mode register in the register area 46a is updated by "+1", and the updated display mode l/register is set. LCD display based on the content! For example, change the display in t3 from time data display mode to telephone number data display mode,
Alternatively, the mode is changed from the telephone number data display mode to the schedule data display mode, and the process is then terminated.

If it is determined in step J2 that the fully operated key is not the push button switch Sl, then in step CO3 it is determined whether the fully operated key is the push button switch S2. If it is determined that the push button is the push button switch S2, then the process advances to step CO4 and the current display mode specified by the display mode register M among the PO registers to P2 registers in the register area 46a is selected. Only the content corresponding to the item is updated by "+1", and the address designation of the corresponding area of either the corresponding telephone number memory 46b1 schedule memory 46c or free data memory 48d is updated based on the updated pointer. The data is read out and displayed on the liquid crystal display l3, and this processing is completed.

Further, if it is determined that the operated key is not the push button switch S2 in step CO3, then it is determined in step CO5 whether the operated key is the push button switch S3. If it is determined that it is the press button switch S3, the process proceeds to step CO6 and the register area 46a is pressed.
The contents of the Fl register are inverted from "0" to "1" or from "1" to "0", and this processing is completed.

The key photographed in step CO5 above is the push button switch S
If it is determined that it is not 3, then proceed to step CO7.
It is determined whether the photographed key is the push button switch S4. If it is determined that the button is the down switch S4, the process proceeds to step CO8, and the F button in the register area 48a is pressed.
Determine whether the flag "1" is set in the l register, that is, whether the transmission mode is set. If it has not been set, the operation of this push button switch S4 is invalidated and the process ends, but if it has been set, the process proceeds to step CO9 and the amount of data to be transmitted in the transmit mode of the register area 46a is determined. Select N
Update the contents of the register by "+1".

This N register is composed of a ternary counter, and when the content is "0", all the data stored in each memory of the telephone number memory 48b1 schedule memory 48c and free data memory 46d is converted to "1". At times, all data stored in any one of the telephone number memory 40b, schedule memory 4Gc, and free data memory 46d is transferred, and when the number is "2", one piece of data displayed is transferred. Once the update settings of the N register can be followed, this process ends.

Furthermore, if it is determined that the key operated in step CO7 is not the pushbutton switch S4, then step C
It is determined whether the key operated by IO is the push button switch S5. If it is determined that it is the push button switch S5, the process proceeds to step Cll and changes the contents of the FO register in the register area 48a from "0" to "1" or "1".
” to “0” and this process ends.

Furthermore, if it is determined that the key operated in the above step ClO is not the push button switch S5, then the photographed key is not one of the push button switches Sl-55. After performing key processing corresponding to the operated key, the processing shown in FIG. 11 is ended.

As shown above, the push button switch Sl- of the key manual section 44
35. At the Samurai point where the key processing corresponding to the other key operations is completed, the operation also ends in FIG.

Further, if it is determined in step AO3 of FIG. 9 that there is no key manual power from the instant button switches 81 to S5 of the key human power section 44 and other keys, the process proceeds to step AO5 to determine whether or not it is time to measure the time. is determined based on the presence or absence of a timing signal from the frequency division/timing signal section 42.

If it is not the clock timing, the process in FIG. 9 is ended as it is, but if it is determined that it is the clock timing, the process proceeds to step AO6, where the time data of the clock register in the register area 46g is updated and set as a clock process. In addition to obtaining the current time data, in the time display mode, the time data, which is the display data held in the display register, is also updated and set, and the process shown in FIG. 9 is thus completed.

Next, the operation during data transmission will be explained.

FO of register area 48a at step AOI in FIG.
If the register is "0" and it is determined that the reception mode is not set, the process proceeds to step AO7 and checks whether the flag "1" is set in the Fl register, that is, whether the transmission mode is set. Determine whether or not there is. If it has not been set, the process directly goes to step AO3 without performing the transmission operation, and thereafter performs key processing and time measurement processing as necessary, and ends this processing.

If it is determined that the flag "1" is set in the Fl register in step AO7, and that the transmission mode is set by operating the push button switch 33, then the process proceeds to step A[lg, where the register Determine the contents of the N register in area 48a. As mentioned above, this N1 register is for determining the transmitted data, and its contents are "
0", the process proceeds to step A091m, and the mode data as shown in FIG. 8(A), R A
M 4B phone number memory 41, schedule call memory 4Bc) and free data memory 4M each memory 5
Read out all the data that you have in your memory.
) is sent from the next communication circuit section 47.
~ executes the data transmission f3 to the external g equipment 52, and thus ends the process of FIG. 9.

Also, if it is determined in step △08 that the content of the N1 register is "l", the process proceeds to the next step AID.
R A M 40 phone number {zu memory 461), schedule call memory 413e and free data memory 48d
Read all the stored data according to the contents of the Ll register and L2 register.
The data block is then sent to the word circuit section 47, where a data block as shown in FIG. 8 is created and sent to the external device 52.
The data overconfidence is executed, and the process of FIG. 9 is thus completed.

Kira, step A (at step 18, the content of the N register is "2"
If it is determined that this is the case, then proceed to step All again and select the memory specified by the contents of the Lll register and L2 register among the telephone number memory 41, schedule call memory 4Ge, and free data memory 46d of the RAM 4G. of,
Only one set of data stored in the position indicated by the pointer of the PO register to the P2 register λ is read out and passed through the /i circuit section 471. : Send, and here, the external device 52/S. After the data transmission is executed, the process shown in FIG. 9 is completed.

In the above embodiment, the electronic notebook 21 is shown as an example in FIG. 3 as the external device 52 that can be connected. Main body device 6l5 keyboard 62 and external memory storage and 1, 1 floppy disk, Izuku system i &
Personal computer pico consisting of G3, cable 6
4 may be used to connect L-1, or even the device L on the main body side.
11. In this embodiment, the tongo notebook function (-f) arm u.
It goes without saying that it is not limited to ¥ verbs.

In addition, in 17, even if the data is pre-stored in the memory and is edited with the received data, even if it is previously received data, a data input switch is also installed, and this data input switch is used to input data manually. It may be data.

Further, in the above embodiment ':A, data is exchanged by wire, but it is of course possible to transmit and receive data by radio, infrared rays, ultrasonic waves, etc.

(Effects of the Invention) As detailed above, according to the present invention, there is insufficient memory to store each data according to the data type, mode data indicating the data type, and data body exemplified by this mode data. After completing the reception f3 manual calculation, the received data obtained by the receiving means is written and stored in succession to the data already stored in the memory according to the mode data, and then each data in the memory is stored. We provide an electronic device with a communication function that can always search and display the data in the memory in an orderly manner, including the data that has not been transferred, by sorting the data into a memory cell according to a certain order. can do.

[Brief explanation of the drawing]

The drawings show one embodiment of the present invention, in which Fig. 1 is a plan view showing the external configuration, Fig. 2 is a side view of the same, and Fig. 3 is a perspective view showing the external appearance of an electronic notebook that can be connected to an external device. The figure is a sectional view showing the specific structure of the connector part, Figure 5 is a block diagram showing the configuration of the electronic circuit, Figure 56 is a diagram showing the configuration of the RAM in Figure 5, and Figure 7 is a diagram showing the structure of the RAM in Figure 5. Figure 8 (A) is a diagram showing the basic format of the data block, and Figure 8 (B) is a diagram showing the data format of mode data.
) is a diagram showing the data format of the actual data, Figure 8 (
C) is a diagram showing the data format of the end data, No. 9
10 is a flowchart showing the contents of the reception process in FIG. 9, FIG. 11 is a flowchart showing the key processing in FIG. 9, and FIG. 12 is a flowchart showing the contents of the key processing in FIG. FIG. 13, which is a diagram showing the basic concept of editing processing, shows an example of connection of other external devices. 1l...watch case, 12...watch glass, l3
...Liquid crystal display, 15...Connector part, 1
B...long hole, l7...bottle, 2l...electronic notebook,
22...Liquid crystal display section, 23...Numeric/arithmetic operation keys 24...Character keys 25, 27. 84... Cable, 2B... Interface, 3I... Vibrator, 32... Spring, 33, 311... Waterproof packing, 34... Pin removal prevention member, 35... Terminal, 3B
... Jack, 37... Back cover, 4l... Oscillation circuit, 42... Frequency division/timing signal section, 43... Control section, 44... Key human power section, 45... R OM,
4G--RAM, 46a--Register area, 48b--Telephone number memory, 46C--Schedule memory, 48d--Free data memory, 4
8e...Work area, 47...Communication circuit section, 48
...Buzzer drive circuit, 49...Display control section, 50.
...Speaker, 5l...Display unit, 52...External device, 61...Main device, 62...Keyboard, 63...
...Floppy disk device.

Claims (2)

[Claims] (1) A memory that stores each data according to the data type; a receiving means that receives mode data indicating the data type and the data body attached to the mode data; and a receiving means that receives the received data obtained by the receiving means. a write control means for writing and storing the data already stored in the memory in accordance with the mode data; 1. An electronic device with a communication function, comprising: editing means for sorting each item in a fixed order. (2) Claim (1) characterized in that the editing means sorts each mode data in a different order.
) Electronic devices with communication functions described in ).