JPH03101248A - Semiconductor device - Google Patents

Abstract

PURPOSE:To make it difficult to develop crystal defects or leak in an element substrate whereon an element is formed and to improve element properties by sucking stress which is produced at a treatment substrate side, to a supporting substrate having crystal defects during heat treatment to relax the stress. CONSTITUTION:A supporting substrate 1 is provided with an insulating film 2a and has crystal defects, and an element substrate 3 is provided with an insulating film 2b. After the insulating films 2a, 2b are mechanically brought into contact with each other, they are laminated and bonded by annealing treatment. An interface between the insulating film 2a and the insulating film 2b becomes a bonding surface 4 of lamination bonding. Then, the element substrate 3 is ground and polished. The element substrate 3 is selectively etched to form a trench 5 in the element substrate 3. After cleaning treatment, insulating films 6, 7 are formed inside the trench 5 to acquire a trench isolation structure. Since the supporting substrate 1 is made to have a crystal defect 8, it is possible to suck and relax stress, etc., which is applied to the supporting substrate 3 through heat treatment during the process. Accordingly, crystal defects do not develop easily in the element substrate 3.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor device, and relates to a trench and a bonding S.
OI (Silicon On In5ulator)
) The present invention can be applied to a semiconductor device having a substrate, and particularly relates to a semiconductor device that can make it difficult to generate crystal defects due to stress applied to an element substrate during heat treatment.

In order to increase the speed of semiconductor devices, especially bipolar transistors, it is effective to reduce the parasitic capacitance that contributes to the device, such as the capacitance between a diffusion layer or metal wiring and a silicon substrate. An effective means for achieving this is an SOI structure semiconductor device in which a silicon thin film serving as an element substrate is formed on a support substrate via an insulating film to realize a complete element isolation structure.

Furthermore, as the dimensions of transistors become smaller due to the demand for miniaturization of elements, it becomes impossible to maintain balance unless the dimensions between transistors in an LSI are reduced. For example, MOS
- In the case of LSI, the dimensions between the transistors are small, and in addition, there is a LSI on the surface that functions as an element M'pTJ region.
In a structure in which a thick field oxide film made of OCO3 is provided, punch-through between transistors becomes a problem. In order to make this bunch-through less likely to occur, it may be possible to increase the surface concentration of the element substrate between the transistors, but this increases the junction capacitance and adversely affects the operating speed.

Further, CMO3 is being used to improve performance, but the normal LOCO3 system is prone to latch-up.

As a method for solving this problem, a semiconductor device with a trench isolation structure has been proposed. Also, L.O.
If GO3 is used, there is a problem that the element area becomes narrower by the bird's beak, but if a trench is used, this problem does not occur and the element area can be formed efficiently.

The present invention particularly relates to a semiconductor device having this trench and a 5OI5 plate. Note that in the present invention, a field oxide film of LOGO3 without trenches and a field oxide film of 5
The present invention can also be applied to a semiconductor device having an OIi plate.

[Prior Art] First, a conventional semiconductor device (not an SOI substrate) having a trench will be described below with reference to the drawings.

4 and 5 are diagrams for explaining an example of a conventional semiconductor device, and FIG. 4 is a sectional view showing the structure of an example of the conventional example;
FIGS. 5(a) and 5(d) are diagrams illustrating an example of a conventional manufacturing method. The illustrated example semiconductor device is applied to a semiconductor device having a trench isolation structure.

In these figures, 31 is a substrate made of St, etc., 32
is SiOz film, 33 is Si3N film, 34 is PSG
35 is a resist film, 36 is an opening, 37 is a trench, 38 is an insulating film made of Sin, etc., 39 is a conductive film made of poly-Si or the like, and 40 is an insulating film made of SiO□ or the like.

Next, the manufacturing method will be explained.

First, as shown in FIG. 5(a), a film 32 having a thickness of 1000 μm, for example, is formed on a substrate 31 having a thickness of 600 to 700 μm, for example, by a CVD method.
After sequentially forming 000 Si3N, a film 33, and a PSG film 34 having a film thickness of, for example, 1 μm, a resist is applied on one side of the PSG film 3 to the substrate 31, and a resist film 35 is formed by exposure and development. Form.

Next, as shown in FIG. 5(b), using the resist film 35 as a mask, the PSG film 34 and the Si3N
After selectively etching the 4-inch film 33 and the 5-inch film 32 to form an opening 36 and removing the resist film 35, the substrate 31 is selectively etched by, for example, RIE using the Si, N, film 33 as a mask. A trench 37 having a width of, for example, 1 μm and a depth of, for example, 2 to 3 μm is formed. At this time, the PSG film 34 is also removed.

Next, as shown in FIG. 5C, after forming an insulating film 38 in the trench 37 by, for example, thermal oxidation,
A conductor film 39 having a thickness of, for example, 2 μm is formed by depositing polySt so as to cover the trench 37 using the D method.

Next, as shown in FIG. 5(d), after etching back the conductor film 39 by, for example, RIE and burying the conductor film 39 only in the trench 37, Si3N is etched back by, for example, thermal oxidation.
Then, using the film 33 as a mask, the conductive film 39 is selectively oxidized to form an insulating film 40 over the trench 37. Then, S
After removing the i, N, film 33, the SiO□ film 32 is removed and planarized to obtain a trench isolation structure as shown in FIG. At this time,
The insulating film 40 is also partially removed. Then, a semiconductor device is completed by forming a MOS transistor or the like in the element region of the substrate 31.

A conventional semiconductor device having this trench 37 has a LOC
Compared to the case using O3, the element area does not become smaller by the bird's beak, and there is an advantage that the element area can be formed efficiently.

Next, a conventional semiconductor device having a trench and a Sol substrate will be described below with reference to the drawings.

6 and 7 are diagrams for explaining another example of a conventional semiconductor device, FIG. 6 is a sectional view showing the structure of another example of the conventional example, and FIGS. 7(a) to (C) FIG. 2 is a diagram illustrating another example of the manufacturing method of the conventional example.

The illustrated example semiconductor device is applied to a semiconductor device having a trench isolation structure.

In these figures, 41 is a support substrate made of Si or the like;
42a and 42b are insulating films made of Sin, etc., and 43 is S.
An element substrate consisting of i, etc., 44 is an insulating film 42a and an insulating film 4
2b, an adhesive surface formed by bonding adhesive at the interface of 2b, 45 a trench formed only on the element substrate 43, 46 an insulating film made of, for example, Sin and mainly for insulating between the element substrates 43, 47 poly-Si, etc. An insulating film consisting of an insulating film is used here, but it may also be a conductive film for a buried electrode.

Next, the manufacturing method will be explained.

First, as shown in FIG. 7(a), an insulating film 42a having a thickness of, for example, 0.5 μm is formed on a supporting substrate 41 having a film thickness of, for example, 600 μm by, for example, thermal oxidation. For example, the element substrate 43 has a volume of 600 μl.
An insulating film 42b having a thickness of, for example, 0.5 μm is formed thereon.

Next, as shown in FIG. 7(b), the supporting substrate 41 on which the insulating film 42a is formed and the element substrate 43 on which the insulating film 42b is formed are mechanically brought into contact with each other. , and bonded together by annealing at about 1200°C for 2 hours. Here, the insulating film 42a
The interface between the and insulating film 42b is bonded to the adhesive surface 4
It becomes 4. Next, the element substrate 43 is coated with a film thickness of, for example, 3 μI.
Grind and polish until the following.

Next, as shown in FIG. 7C, trenches 45 are formed by selectively etching the element substrate 43 by, for example, RIE. The trench 45 here has a width of, for example, 1 μl and a depth of, for example, 3 μm.

Next, by forming insulating films 46 and 47 within the trench 45, a trench isolation structure as shown in FIG. 6 can be obtained. Then, a semiconductor device is completed by forming a MOS transistor or the like on the element substrate 43.

In conventional semiconductor devices using this SOI substrate, by using element isolation using trenches 45, it is possible to completely isolate between elements such as MOS transistors, improving radiation resistance, preventing heat-up, and improving the substrate It had a number of advantages, including the ability to increase speed by reducing capacity.

[Problem to be solved by the invention]

In a conventional semiconductor device (not a Sol substrate) having the above-mentioned trench, the substrate 31 is
Since the trench 37 is formed in the substrate 31, the stress applied to the substrate 31 is much larger than that in the case where the trench 37 is not formed. Therefore, crystal defects are easily generated in the substrate 31 as shown by the dotted lines X1 and X2 (this There is a problem in that leakage occurs due to crystal defects and device characteristics deteriorate.

Specifically, as shown in FIG. 5(a), when the same films are attached to the front and back surfaces of the substrate 31, the stress does not work because it cancels vectorially. 5
As shown in FIG. 8(b), when a trench 37 is formed on one side, stress (expansion stress) is applied from the side surface of the trench 37 toward the inside of the substrate 31, that is, to Yl shown in FIG. 8(a).
This is likely to occur as shown in FIG. arrow Y1 by membrane
Expansion stress exists as in This is because the thermal expansion coefficient of the poly-Si surface is large in the poly-Si constituting the buried insulating film 39 and the single-crystal Si constituting the substrate 31, so that expansion stress acts on the substrate 31 side as indicated by the arrow Y1.

Furthermore, especially when etching back the insulating film 40, it is sufficient if the front and back sides can be removed at the same time, but if the etching is done on one side at a time, the warpage becomes large. The stress at this time is thought to be about 109 dyn/cm''.

Furthermore, in a conventional semiconductor device having a trench and a Sol substrate, as shown in FIG.
There is a problem in that stress exists as shown by arrow Y2 due to the film embedded in the periphery, stress acts on the element substrate 43, and crystal defects are generated in the element substrate 43. The crystal defects caused by this stress cause leakage and deteriorate the element characteristics. Ta.

Note that here, the supporting substrate 41 under the insulating films 42a and 42b is
As mentioned above, an ordinary silicon substrate or glass substrate that does not generate crystal defects due to heat treatment or the like is used. Further, stress such as expansion stress is likely to occur particularly when the coefficients of thermal expansion of each layer are different.

Specifically, when the poly-Si surface constituting the buried 'f@ edge film 47 is oxidized, it expands, so that expansion stress acts on the element substrate 43 side as indicated by arrow Y2. And various (
For example, during heat treatment (during element formation), stress is applied to the element substrate 43, so crystal defects are likely to occur in the element substrate 43. For this reason, this crystal defect may cause leakage at the pn junction.

Note that crystal defects X1 and x2 shown in FIGS. 8(a) and (b)
depends on the surface orientation of the substrate and runs only in a certain direction.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a semiconductor device in which crystal defects are less likely to occur on an element substrate on which an element is formed, leakage is less likely to occur, and element characteristics can be improved. do.

[Means to solve the problem]

In order to achieve the above object, a semiconductor device according to the present invention includes a semiconductor device having an insulating film between a support substrate and an element substrate.
The support substrate has crystal defects.

The support substrate and element substrate according to the present invention can be preferably applied when made of a semiconductor such as Si, and GaA
It is also possible to use a compound semiconductor such as s-based or rnp-based compound semiconductor.

The insulating film according to the present invention can be preferably applied to a 5in2 structure formed by thermal oxidation.
, CVD5 i, Na 2 , PSG, tantalum oxide (TazOs), or the like. Alternatively, an insulating film may be formed in the silicon substrate by implanting oxygen ions into the silicon substrate and annealing the same.

In the present invention, the support substrate and the element substrate may be bonded together with an insulating film interposed therebetween.

[Effect]

The present invention is configured such that the supporting substrate l has crystal defects 8, as shown in FIG.

Therefore, stress such as stress generated on the element substrate 3 side during various heat treatments can be absorbed and relaxed by the supporting substrate 1 in which crystal defects are formed, so that crystal defects are not generated in the element substrate 3. This makes it possible to make it difficult to cause leakage, thereby making it possible to improve device characteristics.

[Example〕 Hereinafter, the present invention will be explained based on the drawings.

1 to 3 are diagrams for explaining one embodiment of a semiconductor device according to the present invention, FIG. 1 is a cross-sectional view showing the structure of one embodiment, and FIGS. 2(a) to 3(C) are FIG. 3 is a diagram for explaining the manufacturing method of one embodiment, and FIG. 3 is a diagram for explaining the effects of one embodiment.

The illustrated example semiconductor device is applied to a semiconductor device having a trench isolation structure.

In these figures, 1 is a support substrate made of Si, 2a is
, 2b is an insulating film made of Sin, etc., 3 is an element substrate made of Si, etc., 4 is an adhesive surface formed by bonding at the interface between the insulating films 2a and 2b, and 5 is formed only on the element substrate 3. The trench 6 is made of, for example, 5tot, and is mainly an insulating film for insulating between the element substrates 3, and the trench 7 is made of poly-Si, P.
The insulating film is made of SG or the like, and although the insulating film is used here, it may be made of a conductive film for a buried electrode. 8 is a crystal defect formed on the support substrate l.

Note that although the insulating films 6 and 7 are formed in the trench 5 here, it is also possible to form an additional insulating film on the insulating film 7.

Next, the manufacturing method will be explained.

Conventionally, it is 0.5 to 2. A support substrate made of silicon that contains an oxygen concentration of OXIO"cm-3 and does not generate crystal defects even after heat treatment was used, but here it contains a high concentration of oxygen and crystal defects will occur when heat treatment is applied. A support substrate 1 made of silicon is used.Support substrate 1
The preferred oxygen concentration for efficiently generating crystal defects is 1.8XIO"cm-' or more, and more preferably 2.OXIO"ca+-' or more. Note that the element substrate 3 is the same as a conventional element substrate or 1.6
It is made of silicon containing a low concentration of oxygen of O"CDl-" or less.

Then, as shown in FIG. 2(a), for example, at 1100°C.
When performing thermal oxidation of a certain degree, ramping is started at a low temperature (below 600'C), the ramp-up rate is set to be 4"C or less, and a film thickness of, for example, 0.5 μm is formed on a support substrate 1 with a film thickness of, for example, 600 μm. An insulating film 2a is formed. At this time, crystal defects are generated in the support substrate 1 having oxygen precipitation nuclei due to thermal oxidation at about 1100°C.
The film thickness is, for example, 600 μm due to normal thermal oxidation at about °C.
An insulating film 2b having a film thickness of, for example, 0.5 μm is formed on the element substrate 3 of
form. At this time, although the element substrate 3 is subjected to heat treatment, crystal defects do not occur because the oxygen content is low and low-temperature ramping is not used.

Next, as shown in FIG. 2(b), the supporting substrate 1 on which the insulating film 2a is formed, and the element substrate 3 on which the insulating film 2b is formed, is mechanically separated from the insulating films 2a and 2b. After contacting them, they are bonded and bonded by annealing at about 1200°C for 2 hours. Here, the interface between the insulating film 2a and the insulating film 2b becomes the bonding surface 4 by bonding. Next, the element substrate 3 is ground and polished until the film thickness becomes, for example, 3 μm or less.

Next, as shown in FIG. 2(C), for example, plasma Rr
Trenches 5 are formed in the element substrate 3 by selectively etching the element substrate 3 using E. The trench 5 here has a width of, for example, 1 μm and a depth of, for example, 3 μm.Next, cleaning is performed to remove damage to the inner surface of the trench 5 caused by plasma and etching residue (SiO, etc.) generated during etching. Perform processing.

Next, by forming an insulating ffa 6.7 in the trench 5, a trench isolation structure as shown in FIG. 1 can be obtained.

Then, a semiconductor device is completed by forming MOS transistors and the like on the element substrate 3.

That is, in the above embodiment, since the support substrate 1 is configured to have crystal defects 8, the element substrate 3 is affected by heat treatment during the process (thermal oxidation, annealing treatment for activating the diffusion layer, CVD manufacturing). Stress such as stress can be absorbed and relaxed by the support base 't5-1 having crystal defects 8, and crystal defects can be made less likely to occur in the element substrate 3. Therefore, it is possible to make it difficult for leaks to occur,
Device characteristics can be improved. As for the crystal defects in the element substrate 3, as shown in FIG. It was found that it was decreasing.

Note that in the above embodiment, the trench 5 is used as the element isolation region.
Although the present invention is not limited to the case of a semiconductor device with a Sol structure having Good too.

Although the above embodiment describes the case where silicon containing high concentration oxygen is used for the support substrate 1 to generate crystal defects, the present invention is not limited to this, and the support substrate 1
Alternatively, silicon containing carbon may be used to generate crystal defects.

In this case, heat treatment for forming oxygen precipitation nuclei as in the case of silicon substrates containing oxygen is not necessary, and crystal defects can be generated by heat treatment at about 1000°C. Also,
When forming a silicon ingot, silicon wafers that contain carbon usually have poor characteristics and are not desirable, so by controlling the pulling speed, etc., the silicon wafer is rolled to prevent carbon from being included in the silicon. However, if silicon containing carbon is used for the support substrate 1 to generate crystal defects, the portion containing carbon can also be used, so it is necessary to prevent carbon from being included in the silicon as described above. There is no need to control the
An advantage is that silicon ingots can be formed at low cost. The preferable carbon concentration for generating crystal defects in the supporting substrate 1 is 2 x 1016 cm.
−' or more.

Further, as a method for generating crystal defects in the support substrate 1, crystal defects may be generated in the support substrate 1 by implanting ions such as A, , N, , O□, etc. The support substrate 1 is typically polished by 10 to 20°C before final polishing.
Although the lapping damage is removed by wet etching of about μm, it is also possible to leave the lapping damage without performing the wet etching.

In the above embodiment, the Sol structure is described in which the insulators t1g2a and 2b are bonded together, but the present invention is not limited to this, and any Sol structure may be used.
It may also be applied to SIMOX.

〔Effect of the invention〕

According to the present invention, it is possible to make it difficult to generate crystal defects in the element substrate, to make it difficult to cause leakage, and to improve the element characteristics.

[Brief explanation of drawings]

1 to 3 are diagrams for explaining one embodiment of a semiconductor device according to the present invention, FIG. 1 is a cross-sectional view showing the structure of one embodiment, and FIG. 2 is a diagram illustrating a manufacturing method of one embodiment. FIG. 3 is a diagram for explaining the effects of one embodiment, FIGS. 4 and 5 are diagrams for explaining an example of a conventional semiconductor device, and FIG. 4 shows the structure of an example of a conventional semiconductor device. FIG. 5 is a diagram for explaining the manufacturing method of one example of the conventional semiconductor device, FIG. 6 and FIG. 7 are diagrams for explaining another example of the conventional semiconductor device, and FIG. FIG. 7 is a cross-sectional view showing the structure of another example, FIG. 7 is a diagram explaining a manufacturing method of another example of the conventional example, and FIG. 8 is a diagram explaining the problems of the conventional example. 1...Support substrate, 2a, 2b...Insulating film, 3...Element substrate, 4...Adhesive surface, 5...Trench , 6.7...Insulating film. Fig. 1 Fig. 2 Fig. 2 A sectional view showing the structure of an example of the conventional example Fig. 4 Fig. 4 A sectional view showing the structure of another example of the conventional example Fig. 6 Fig. 6

Claims (3)

[Claims] (1) A semiconductor device comprising a support substrate made of a semiconductor material, an element substrate made of the semiconductor material on which an element is to be formed, and an insulating film between the support substrate and the element substrate, A semiconductor device characterized in that the support substrate has crystal defects. (2) The semiconductor device according to claim 1, wherein the trench is formed in the element substrate. (3) The semiconductor device according to claim 1, wherein the field oxide film is formed on the element substrate.