JPH028248U - - Google Patents

Info

Publication number
JPH028248U
JPH028248U JP8745988U JP8745988U JPH028248U JP H028248 U JPH028248 U JP H028248U JP 8745988 U JP8745988 U JP 8745988U JP 8745988 U JP8745988 U JP 8745988U JP H028248 U JPH028248 U JP H028248U
Authority
JP
Japan
Prior art keywords
clock signal
frequency
divided clock
input signals
synchronization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8745988U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8745988U priority Critical patent/JPH028248U/ja
Publication of JPH028248U publication Critical patent/JPH028248U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図はこの考案による多重化装置の一例を示
す回路図、第２図はその動作の説明に供するため
のタイムチヤート、第３図は従来の多重化装置を
示す回路図、第４図はその動作の説明に供するた
めのタイムチヤートである。 Fig. 1 is a circuit diagram showing an example of a multiplexing device according to this invention, Fig. 2 is a time chart for explaining its operation, Fig. 3 is a circuit diagram showing a conventional multiplexing device, and Fig. 4 is a circuit diagram showing an example of a multiplexing device according to this invention. This is a time chart for explaining its operation.

Claims (1)

【実用新案登録請求の範囲】 最終信出力信号と同速度のクロツク信号と、そ
れを分周して得られた分周クロツク信号と、その
分周クロツク信号に同期して複数の入力信号が与
えられ、その複数の入力信号を上記分周クロツク
信号で選択して時系列的に切替えて多重化する多
重化装置において、 上記分周クロツク信号による選択の前後に、上
記分周クロツク信号の非選択時のエツジに同期し
て上記複数の入力信号をそれぞれ取込むデータラ
ツチが設けられたことを特徴とする多重化装置。[Claims for Utility Model Registration] A clock signal having the same speed as the final signal output signal, a frequency-divided clock signal obtained by frequency-dividing the clock signal, and a plurality of input signals provided in synchronization with the frequency-divided clock signal. In a multiplexing device that selects a plurality of input signals using the frequency-divided clock signal and switches and multiplexes them in time series, the frequency-divided clock signal is deselected before and after the selection using the frequency-divided clock signal. A multiplexing device characterized in that a data latch is provided for respectively capturing the plurality of input signals in synchronization with the edge of time.
JP8745988U 1988-06-29 1988-06-29 Pending JPH028248U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8745988U JPH028248U (en) 1988-06-29 1988-06-29

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8745988U JPH028248U (en) 1988-06-29 1988-06-29

Publications (1)

Publication Number Publication Date
JPH028248U true JPH028248U (en) 1990-01-19

Family

ID=31312072

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8745988U Pending JPH028248U (en) 1988-06-29 1988-06-29

Country Status (1)

Country Link
JP (1) JPH028248U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003218790A (en) * 2002-01-18 2003-07-31 Hitachi Ltd Optical transmitter and signal generator

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61167239A (en) * 1985-01-21 1986-07-28 Nec Corp Data speed converting circuit
JPS62256541A (en) * 1986-04-30 1987-11-09 Fujitsu Ltd Digital signal transmission system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61167239A (en) * 1985-01-21 1986-07-28 Nec Corp Data speed converting circuit
JPS62256541A (en) * 1986-04-30 1987-11-09 Fujitsu Ltd Digital signal transmission system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003218790A (en) * 2002-01-18 2003-07-31 Hitachi Ltd Optical transmitter and signal generator

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