JPS5634267A - Synchronizing circuit - Google Patents

Synchronizing circuit

Info

Publication number
JPS5634267A
JPS5634267A JP11056779A JP11056779A JPS5634267A JP S5634267 A JPS5634267 A JP S5634267A JP 11056779 A JP11056779 A JP 11056779A JP 11056779 A JP11056779 A JP 11056779A JP S5634267 A JPS5634267 A JP S5634267A
Authority
JP
Japan
Prior art keywords
synchronizing signal
signal
output
dff
rsff
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11056779A
Other languages
Japanese (ja)
Inventor
Kazumi Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11056779A priority Critical patent/JPS5634267A/en
Publication of JPS5634267A publication Critical patent/JPS5634267A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Abstract

PURPOSE:To generate a mormal output synchronized with the synchronizing signal even if the asynchronizing signal is input at any timing of the synchronizing signal, by providing an RSFF, a TFF, and a DFF. CONSTITUTION:The rise point and the fall point of output 6 of DFF 23 are determined by control signals 2 and 4 of control circuit 25, and a signal synchroninged with synchronizing signal CK is botained as output 6 of DFF 23 because control signals 2 and 4 synchronize with synchronizing signal CK. RSFF 22 is always set and reset only once for one pulse of data signal D by TFF 24, and malfunctions dependent upon multiple set are not generated. Thus, even if data signal S is input at any relative timing to synchronizing signal CK, RSFF 23 is set and reset synchronously with synchronizing signal CK by control signals 2 and 4 and TFF 24, and the output synchronized with synchronizing signal is obtained in the output of next-stage DFF 23.
JP11056779A 1979-08-29 1979-08-29 Synchronizing circuit Pending JPS5634267A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11056779A JPS5634267A (en) 1979-08-29 1979-08-29 Synchronizing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11056779A JPS5634267A (en) 1979-08-29 1979-08-29 Synchronizing circuit

Publications (1)

Publication Number Publication Date
JPS5634267A true JPS5634267A (en) 1981-04-06

Family

ID=14539097

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11056779A Pending JPS5634267A (en) 1979-08-29 1979-08-29 Synchronizing circuit

Country Status (1)

Country Link
JP (1) JPS5634267A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59181863A (en) * 1983-03-24 1984-10-16 ジ−メンス・アクチエンゲゼルシヤフト Method and device for reproducing high transmission speed digital signal
JPS601291U (en) * 1983-06-17 1985-01-08 川久保 陽太 Small fish automatic processing equipment
JPS6411134U (en) * 1987-07-09 1989-01-20
JPH01131636A (en) * 1987-11-18 1989-05-24 Hidekazu Oda Apparatus for boiling food
JPH0356395U (en) * 1989-10-05 1991-05-30

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59181863A (en) * 1983-03-24 1984-10-16 ジ−メンス・アクチエンゲゼルシヤフト Method and device for reproducing high transmission speed digital signal
JPS601291U (en) * 1983-06-17 1985-01-08 川久保 陽太 Small fish automatic processing equipment
JPS6329438Y2 (en) * 1983-06-17 1988-08-08
JPS6411134U (en) * 1987-07-09 1989-01-20
JPH0411613Y2 (en) * 1987-07-09 1992-03-23
JPH01131636A (en) * 1987-11-18 1989-05-24 Hidekazu Oda Apparatus for boiling food
JPH0374566B2 (en) * 1987-11-18 1991-11-27
JPH0356395U (en) * 1989-10-05 1991-05-30

Similar Documents

Publication Publication Date Title
ES430489A1 (en) Synchronizing circuit including two flip-flops and circuit means to protect a synchronized signal from an unstable state of the flip-flops
CA993056A (en) Pulse transforming circuit arrangements using a clock pulse responsive delayed inverter means
ATE3740T1 (en) SYNCHRONIZING CIRCUIT FOR VIDEO CLOCK OSCILLATORS.
JPS5634267A (en) Synchronizing circuit
CA1030620A (en) Circuit arrangement for synchronizing an output signal in accordance with a periodic pulsatory input signal
JPS5381059A (en) Digital phase synchronizing system
JPS53110436A (en) Logic circuit for asynchronous signal synchronization
JPS5431260A (en) Digital control phase synchronizing device
JPS564938A (en) Phase synchronizing circuit
JPS5232222A (en) Sampling pulse producting circuit
JPS53133354A (en) Phase synchronizing circuit
JPS5696526A (en) Timing signal generating system
DE3786921D1 (en) DIGITAL CHIP WITH INPUT DATA SYNCHRONIZATION.
JPS5324256A (en) Fulse formation circuit square signal
JPS55132190A (en) Burst signal separating circuit
JPS52119276A (en) Delayed synchronizing pulse generator
JPS56119578A (en) Digital type vertical synchronizing circuit
JPS5616925A (en) Control system for clock switching
JPS5742230A (en) Clock switching device
JPS56138366A (en) Video signal switching device
JPS6443872A (en) Synchronizing circuit
JPS5397759A (en) Phase synchronizing circuit
JPS52119002A (en) Signal processing circuit
JPS524811A (en) Pulse demodulator
JPS5793723A (en) Phase alteration system