JPH0263345A - Congestion control system for self routing speech path equipment - Google Patents

Abstract

PURPOSE:To prevent any congestion from being caused in the inside of a speech path by controlling the state of input information inputted to a buffer memory even against a traffic having a burst property as in the case of data communication. CONSTITUTION:An output terminal state detection means STij detects the state at every output terminal of a self routing switch Sij and a congestion state detection means CCi detects the congestion state based on the result of detection of the output terminal state detection means STij. Furthermore, a control means Gij controls the state of inputting input information based on the result of the detection of the congestion state detection means CCi. The congestion state at every output terminal of the self routing switch Sij is detected by the congestion state detection means CCi from the state of the output terminal state detection means STij and the control means Gij controls the state inputting the input information in response to the result of detection by the congestion state detection means CCi. Thus, no congestion can take place in the inside of the channel.

Description

[Detailed description of the invention] [Table of contents] Overview Industrial field of application Prior art (Figs. 13 to 15) Means for solving the problems to be solved by the invention [Figs. 1, 2 ( ,)(b
)] Action [Figure 1, Figure 2 (a), (b)] Example Description of the first embodiment (Figures 3 to 7) Description of the second embodiment (Figures 8 and 9) Third Description of Embodiments (Figures 10 to 12) Effects of the Invention [Summary] Concerning a congestion control method for controlling the width state of a self-routing channel device, it is useful for bursty traffic such as data communication. In order to prevent congestion from occurring within the communication path by controlling the state in which input information is input to the buffer memory, the state of each output terminal of the self-routing switch is detected. a congestion state detection means for detecting a congestion state based on the detection result of the means; and a control means for controlling the state in which input information is input to the buffer memory based on the detection result of the means. In addition to these means, a traffic identification means is provided to identify whether the input information is burst traffic or real-time traffic, and if the input information is real-time traffic, the control means is bypassed. The apparatus is configured to include a switching means for inputting input information and for inputting the input information via a control means when the input information is burst traffic.

The present invention relates to a congestion control method for a self-routing channel device for controlling the congestion state in a self-routing channel device that sends input information to a designated output terminal.

Self-routing channels are particularly useful for high-speed packet switching and asynchronous transfer mode (ATM).
When switching to a different outgoing line for each packet or cell (asynchronous transfer block) at high speed, such as in ousTransfer Mode) exchange, and when it is not desirable to centrally control the communication path from outside using software. , is suitable. In a self-routing channel, a correspondence table is created between the identification signal of each call and its outgoing line number, and when a call with a certain identification number arrives, the correspondence table is checked to find out the outgoing line number, and the call is routed to the corresponding outgoing line. The exchange is carried out by sending it to

[Industrial application field]
[Prior Art] The present invention is based on control information added to input information. something is proposed. In the circuit shown in FIG. 13, for example, there are three 3×3 unit self-routing switches Sij on the input side, intermediate side, and output side, and the primary link LIIILI□.

Ll, is the incoming line switching, and connects the three output terminals to the first input terminal of each of the intermediate switches 82□ to S23, and
The next link L2□~L231 L31~L, 3 also conforms to this. The secondary links M, ~M, connect the three output ends of the intermediate switch S21 to the three switches S on the outgoing side,
It is connected to each first input end of □~S33, and the secondary links M2, ~M231, M31~M33 also follow this.

In this self-routing call path, R goes first, then S goes □.

S 21 """ S 2 :l If 33□ is installed, S 12 and Sl.

The installation of S construction, , and 333 was done by simply installing L 21 ~ L 231 L 31 ~ T-' without making any changes to the existing parts.
3. This can be done by simply connecting the wires as shown.

Also, for example, there are three paths that lead incoming line #9 to outgoing line #3: Sll, S21, and S3□, Si3, S2□, and S31, S□, and S23 and S31, and S□ and Sat. The traffic between them can be distributed to 82□ to S23, and if the traffic is concentrated in S2□ and there will be a delay, the path may be changed to pass through S2□ or S23.

FIG. 14 shows a configuration example of the 3×3 unit self-routing switch of FIG. 13. Ii is a control information detection circuit, Dj is an information delay circuit, DMi is a demultiplexer, DECi is a control information decoding circuit, Fj, j are FIFO memories (buffer memories), SLi is a selector, DSi is a FIFO
This circuit receives the request signal Kij of the memory Fij and controls the selector SLi.

The signals entering the input terminals #1 to #3 are in the form of the input information element control information described above, and the detection circuit Ii extracts this control information and sends it to the decoding circuit DECi.

If the self-routing communication path 4 has a three-stage configuration, the control information is - RH□ for the second stage, RH2 for the second stage, and R1 for the third stage.
Since there are three types of −l3, the detection circuit Ij selects the corresponding control information +
Extract RH.

The decoding circuit DECj outputs the input control information to the output terminal i.
If so, the demultiplexer is operated to send the information to the relevant FI F○ memory Fij.

For example, if the control information of input #1 indicates output terminal #2, the decoding circuit DEC□ is connected to the demultiplexer DM.
, to input input #1 to F2□.

When the control circuit DS unit receives information in the FIF○ memory F unit, ~F unit, it operates selector SL□ and outputs the information #1
△Send. The same applies to others.

For example, the control circuit DS constantly scans the signal Kjj from the FIFO memory Fjj to the filter 1, and when 1j is detected in the request signal, it operates to output the contents of the FIFO memory through the selector SLj. Alternatively, the request signal Kjj is sent to the control circuit D as an interrupt.
When an interrupt occurs, the control circuit D Si outputs the contents of the FIFO memory through the selector.

In this way, each self-routing switch Sjj in a three-stage configuration, for example, is controlled based on the control information added to the input information.
The input information can be autonomously switched and sent to the output terminal specified by the control information.

[Problems to be Solved by the Invention] However, in such conventional self-routing communication path devices, consideration is not given to the case where the link load within the communication path becomes unbalanced. If an unbalance occurs in the communication path, there is a problem in that it causes an internal communication path, resulting in a reduction in throughput.

Therefore, a cross-traffic control method for a self-routing communication path device has been proposed in which the internal paths of the communication path are allocated so that the link loads within the communication path are balanced, thereby minimizing the number of internal paths of the communication path.

A block diagram of the ravine control method of such a self-routing channel device is shown in FIG. 15.

In FIG. 15, 1 is a self-routing channel device, and this self-routing channel device 1 includes, for example, 3
It consists of x3 unit self-routing switches Sij, and has the same configuration as shown in FIG.

2 is an incoming highway, 3 is an outgoing highway, and these input highways 2 and output highways 3 each have a plurality of highway configurations (symbols i#1 to i#9 and o#1 to o
(See #9).

Reference numeral 4.4' denotes a signal processing device, and each signal processing device 4.4' performs processing up to Rake 2 (for example, error correction processing on the signal).

SL is a link load storage device, and this link load storage device 5L stores the current state of the link load, and the stored contents are updated at the time of call setup, for example.

6 is a virtual channel number conversion device (VCN conversion device), and this VCN conversion device 6 converts the virtual channel number /< V CN for cells on the input highway into a vertical cell channel number vCN' for cells on the output highway; Furthermore, the routing path TAG as the routing control information of the self-routing channel 1
It has the function of adding

Reference numeral 7 denotes a call processing device, and this call processing device 7 assigns a vertical cell channel number VCN to a call, that is, to a requesting terminal, in response to a call setup request control signal inputted through the signal processing devices 4 and 4'. , VCN', and determines which input highway 2 to enter and which output highway 3 to exit from, and accesses the link load storage device 5L at the time of set call up, and selects the determined input highway-2 and output highway. 3, and determines the routing path TAG with the lightest load.

In a self-routing channel device having such a configuration, each self-routing switch Sij in a multi-stage configuration autonomously switches based on the routing path TAG added to the input information, and outputs the output terminal indicated by the routing path TAG. At this time, at least the self-routing switch S, which constitutes the first stage on the input side, S□213,
and a self-routing switch S2 constituting the second stage.
1°S 221 Multiple links L construction between S 23 0
．． L□2゜L 1)+ Lu1l L22t I-+z
3+ Lu1l Lxz+ Li2 is stored in the self-routing switch S so that the path with the lightest load among the plurality of links Ljj is selected based on this stored information at the time of call set-up.
Switching of ij is performed.

However, in the congestion control method of the self-routing channel device shown in FIG. Regarding traffic, there is a problem in that the sudden occurrence of a burst causes link load imbalance, causing congestion within the communication path and reducing throughput.

The present invention is an attempt to solve such problems, and even for bursty traffic such as data communication, there is no possibility of collision to the same output terminal.

To provide a congestion control method for a self-routing communication path device that prevents congestion from occurring inside a communication path by controlling the state in which input information is input to a buffer memory that suppresses waiting and discarding information. The purpose is

[Means for Solving the Problem] Also in the case of the present invention, autonomous switching is performed based on control information added to input information input from an input terminal, and input information is sent to an output terminal instructed by the control information. The self-routing channel device is equipped with a self-routing switch SiJ that outputs input information to an output terminal specified by control information.

By the way, FIG. 1 is a principle block diagram of the present invention corresponding to claim 1, and in this FIG. 1, 5Tij is an output terminal state detection means, and this output terminal state detection means 5T
ij detects the state of each output terminal of the self-routing switch Sjj.

CCi is a congestion state detection means, and this 1a-shaped state detection stage CCi detects a congestion state based on the detection result of the output terminal state detection means 5Tij.

Gij is a control means, and this control means Gij controls the state in which input information is input based on the detection result of the ms state detection means CCi.

FIG. 2(a) is a block diagram of the principle of the present invention corresponding to claim 2. In FIG. 2(a), the width-span condition detection means CCi and the control means Gij are the same as those shown in FIG. 1. Although they have almost the same functions, the invention corresponding to claim 2 further includes a traffic identification means TDij and a switching means CH.
It has ij.

Here, the traffic identification means TDij identifies whether the input information is burst traffic or real-time traffic, and the switching means C)Iij determines whether the input information is real-time traffic according to the traffic identification means TDij. If the input information is identified as burst traffic, the control means Gij is bypassed and the input information is input, and if the input information is identified as burst traffic by the traffic identification means TDij, the input information is passed through the control means Gij. This allows you to input the following information.

FIG. 2(b) is a principle block diagram of the present invention corresponding to claim 3, and in this FIG. 2(b), the congestion state detection means CCi, the control means Gij, the traffic identification means T
Dij and switching means CHij have substantially the same functions as those shown in FIG. 2(a), but in the invention corresponding to claim 3, there is further a A buffer BFij is provided that can delay bursty traffic and input it to the control means Gij.

[Operations] First, in the one shown in FIG.
Then, the convergence state of each output terminal of the self-routing switch Sij is detected from the state of the output terminal state detection means 5Tij, and in accordance with the detection result by the width state detection means CCi, the control means Gij Control the state in which information is entered.

Furthermore, in the one shown in FIG. 2(a), the congestion state detection means CCi detects the congestion state of each output terminal of the self-routing switch Sjj from the state of the output terminal state detection means 5Tij, and this cap-like state is detected by the congestion state detection means CCi. According to the detection result by the detection means CCi, the control means Gij controls the input information to the buffer memory Fjj. At this time, the traffic identification means TDij determines whether the input information is burst traffic or not. If the traffic identification means TDij identifies the input information as real-time traffic based on the identification result of the 1-rahinoku identification means TDij, the switching means The CHij allows the input information to be input by bypassing the control means Gij, and when the input information is identified as burst traffic by the traffic identification means TDij, the switching means CHij inputs the input information via the control means Gij. Have them enter information.

Furthermore, in the case shown in FIG. 2(b), when the burst traffic is input to the control means Gjj, the burst traffic is transferred to the buffer BF.
It is input after being delayed by ij.

[Example] Hereinafter, the present invention will be described in detail with reference to the drawings.

(a) Description of the first embodiment Fig. 3 is a block diagram showing the overall configuration of the first embodiment of the present invention. The path device 1 has 3×3 self-routing switches Sij, and each self-routing switch Sij has a configuration as shown in FIG. 4, the description of which will be given later.

Furthermore, in FIG. 3, 2 is an incoming highway, and this input highway 2 has a configuration of nine highways, as shown by i#1 to i#9 in FIG.

3 is the outgoing highway, and this outgoing highway 3 is the third outgoing highway.
As shown by o#1 to o#9 in the figure, there are nine highways.

Reference numerals 4 and 4' designate signal processing devices, and each signal processing device 4, 4' performs processing up to Rake 2 (for example, error correction processing for signals).

5 is a storage device, and this storage device 5 stores information (including programs) necessary for processing a call.

Reference numeral 6 denotes a VCN conversion device, which converts the vertical cell channel number VCN for the cell on the input highway 2 into a virtual channel number VCN' for the cell on the output highway 3, and further converts the virtual channel number VCN' for the cell on the output highway 3, and further converts the routing of the self-routing channel 1. It has a function of adding a routing path TAG as control information.

Reference numeral 7 denotes a call processing device, and this call processing device 7 responds to a call setup request control signal inputted through the signal processing devices 4 and 4' to process a call, that is, requesting subscriber terminals 8-1 to 8. -n, 9-1 to 9-n, V in the storage device 5
Verticel channel numbers VCN and VCN' are given based on the CN management table to determine which input highway 2 to enter and which output highway 3 to exit from.

Note that the VCN management table is based on the subscriber accommodation location number (L
N) and correspondingly the perch cell channel number VC.
N, VCN', routing path TAG, and communication request load are stored.

In addition, 10.10' is a signal separation device that separates the control signal of the call setup request, and each signal separation device @10.1
For example, a configuration similar to that of the self-routing call system 1 shown in FIG. 13 is used as 0'.

By the way, each self-routing switch Sij has a fourth
As shown in the figure, a control information detection circuit Ii, an information delay circuit Di, a demultiplexer DMj, a control information decoding circuit DECi, an output terminal state detection device 5Tij, a selector S
Li, a selector control circuit DSj, a cap-shaped state detection circuit CCi, a cell arrival control device Gij, and an output terminal state detection device [5Tij is a FIFO memory (
buffer memory) Fij.

Note that the control information detection circuit 11, the information delay circuit Dj, the demultiplexer DMi, the control information decoding circuit DECi,
FIFO memory (buffer memory) Fjj, selector S
Since Li and the selector control circuit DSi are the same as those explained in FIG. 14, their explanations will be omitted.

Here, the output terminal state detection device S Tij detects the state of each output terminal of the self-routing switch Sij, and the congestion state detection circuit CCi outputs the width state of each output terminal of the self-routing switch Sij. The cell arrival control device Gij detects the state of the terminal state detection device 5Tij, and the cell arrival control device Gij controls the arrival time and number of cells, for example, based on the detection result of the one-width state detection device CCi. It controls the state in which input information is input to the buffer memory Fij in the state detection device 5Tij.

Next, these output terminal state detection devices 5Tjj.

Narrow state detection circuit CCi and cell arrival control bag [Gi
To explain Tij in more detail, first, as shown in FIG.
It is constructed by providing counters CTij and CT'ij for counting the number of cells input/output to and from the buffer memory Fjj under the control of observation equipment [, OBi, which will be described later], before and after ij.

In addition, the narrow width state detection circuit CCi is connected to the l1Il side device OB.
i, a comparison device CM i , and a control device CNTi, and the cell arrival control device Gij includes two switches S
Wij, S W 'ij and a switch control device 5CTij.

Observation instrument @ OB i has counters CTij, CT'
1j (7) Control and counter CTij, CT'
From the results sent from Fij, calculate the number of discarded cells, the number of cells in the buffer memory Fij, and the usage efficiency, and calculate the calculation results (all calculation results or a part of the calculation results may be used). is sent to the comparator CMi.

The comparison device CMi compares the threshold value for determining width narrowness with the result sent from the observation device OBi, and sends the result (result indicating whether it is congestion or not) to the control device CNTi.

The control device CNTi, based on the result of the comparison device CMi,
Switch 5W of cell arrival control device Gij in case of congestion
This is to control ij to be on the b side.

The switch 5Wjj is controlled by the control device CNTi of the thin width state detection circuit CCi, and is switched to the a side in normal times (when the width is not wide) and to the b side when the width is cap-shaped.

The switch SW'ij cooperates with the switch control device 5CTij to control the arrival interval or the number of arrivals of cells when the width is narrow. For example, the cell arrival interval control is executed as follows. That is, the switch control table [5CTi
When j detects that one cell has passed through switch SW'jj, it turns off switch SW'ij for a certain period of time.
), then turn it on again, and so on. This situation is schematically shown in FIG. 6.

Furthermore, control of the number of arriving cells is executed as follows. That is, the switch control device 5CTij periodically observes a fixed time interval and controls the on/off time of the switch SW'ij so that one cell passes through the fixed time interval. Fig. 7 schematically shows how the darning is done.

In FIGS. 6 and 7, it can be seen that cells that arrive at the time indicated by the solid line pass through, but cells that arrive at the time indicated by the dotted line are discarded.

With the above configuration, in this self-routing channel device, the routing bus TA added to the input information
Each self-routing switch Si in a three-stage configuration based on G
Routing path TAG by autonomous switching at j
The input information is sent to the output terminal specified by the self-routing channel device 1.
The following narrow control is performed in each self-routing switch Sij. ° That is, the buffer memory Fi
Counters CTij and CT' provided before and after j
ij counts the number of cells input to and output from the buffer memory Fij, and these counters CTij.

Based on the results sent from CT'ij, the observation device ○Bi of the narrow state detection circuit CCi calculates the number of discarded cells, the number of cells in the buffer memory Fij, and the usage efficiency, and uses these calculation results. It is sent to the comparator WCMi. Then, the comparison device CMi compares the threshold value for determining a divergence with the result sent from the observation device OBi, and sends the result (result of whether it is a convergence or not) to the control device i1.
Send CN Ti.

Furthermore, in this control device CNTi, based on the result of the comparator CMi, the cell arrival control device Gj
Control is performed so that the switch 5Wij of j is set to the b side.

Note that when the width is not wide, the switch 5Wij is on the a side.

When the width is narrow with the switch 5Wij on the b side, the switch SW'ij controls the switch control device 5CTij.
In cooperation with the cell arrival interval or the number of arrivals,
Control is performed as shown in Figure 7.

In this way, the narrow state detection means CCi detects the narrow state of each output terminal of the self-routing switch Sij from the state of the output terminal state detection device 5Tij, and the narrow state detection means CCi detects the narrow state from the state of the output terminal state detection device 5Tij. Therefore, the cell arrival control device Gij controls the state in which input information is input to the buffer memory Fij, so even for bursty traffic such as data communication, the input information to the buffer memory Fij is controlled. The state of input can be controlled, thereby making it difficult for narrow widths to occur inside the communication path, and as a result, it is possible to improve throughput.

(b) Description of Second Embodiment FIG. 8 is a block diagram of a self-routing switch as a second embodiment of the present invention.
Since the same reference numerals as in FIG. 4 indicate substantially the same parts, a description of the same reference numerals will be omitted.

Now, in this second embodiment, the difference from the first embodiment described above is that the cell arrival control table [before Gij, real-time traffic cells such as voice, etc., and burst cells such as data traffic] If the cell is identified as real-time traffic, the cell arrival control device Gij is bypassed and the cell is input to the buffer memory Fij (output terminal state detection device fffsTij). , if the cell is identified as bursty traffic, the cell is routed through the cell arrival controller Gij to the buffer memory Fi.
A device (traffic identification/cell switching device) CIi that has a function of inputting to the output terminal state detection device 5Tij (output terminal state detection device 5Tij)
j is provided, and the rest is almost the same as the first embodiment described above.

That is, this traffic identification/cell switching device Cl1j is
Service identification information in control information BSI [see Figure 9(a)] A traffic identification means for identifying whether a cell is burst traffic or real-time traffic; If it is identified as burst traffic, the cell arrival control device 1Gij is bypassed and the cell is input to the buffer memory Fij (output terminal state detection device [11STij)], and the traffic identification means identifies the cell as burst traffic. If the cell is sent to the buffer memory F via the cell arrival control device Gij.
It has the function of a switching means for inputting to the output terminal state detection device 5Tij (output terminal state detection device 5Tij).

Note that the buffer memory Fij (output terminal state detection device 1
sTij), the cell arrival controller G
There are two routes, the route from Cl1j and the route from Cl1j, which bypasses the cell arrival control device Gij, but each route is actually connected to the buffer memory Fij (output terminal state) via an OR gate. is input to the detection device 5Tij).

With this configuration, the congestion state detection means CCi detects the congestion state of each output terminal of the five self-routing switches 5Tij by the counter CTij of the output terminal state detection device 5Tij.
, CT' ij according to the detection result of the width condition detection means CCi.

The cell arrival control device Gij controls the state in which input information is input to the buffer memory Fij (output terminal state detection device 5Tij), but at this time, the traffic identification means of the traffic identification/cell switching device Cl1j, It is identified from the service identification information BSI whether the cell is burst traffic or real-time traffic, and based on the identification result of this traffic identification means, the switching means of the traffic identification/cell switching device CTij performs the traffic identification/cell switching device CTij. When the cell is identified as real-time traffic by the means, the cell arrival control table [Gij is bypassed and the cell is input to the buffer memory Fij (output terminal state detection device 5Tij), and the cell is identified by the traffic identification means as real-time traffic. If the traffic is identified as bursty traffic, the cell is routed through the cell arrival control device Gij to the buffer memory Fij (
The signal is inputted to the output terminal state detection device 5Tij).

As a result, in this second embodiment, almost the same effect as in the first embodiment described above can be obtained, and even if a cap-like shape occurs in the internal link of the communication path due to burst traffic, real-time traffic is not affected. It is possible to realize narrow width control, that is, control such that all real-time traffic is input to the buffer memory Fij without being discarded.

As a result, even if congestion occurs in an exchange system that handles data and voice in combination, the quality of voice calls and other communications will not deteriorate.

Note that the service identification information BSI may be included in the input information as shown in FIG. 9(b).

(C) Description of Third Embodiment FIG. 10 is a block diagram of a self-routing switch as a third embodiment of the present invention, and FIG. 11 is a block diagram showing in detail the main parts of the third embodiment of the present invention. There is, but this 10th
In FIG. 11, the same reference numerals as those in FIG.

Now, this third embodiment is an improvement of the above-mentioned second embodiment, and therefore, the branch state detection means CC1, the control means Gij, the traffic identification means TDi, ]+switching means CHij are the same as the above-mentioned second embodiment. This embodiment has almost the same functions as the second embodiment, but differs from the second embodiment in the following points. That is, in this third embodiment, the control means Gij and the switching means CH
A means for controlling bursty traffic between Gij and Gij
A buffer BFj,j that can input the signal with a delay is provided.

Further, the switch control device 5CTij controls the switch SW'
ij is controlled to be turned on and off at certain predetermined time intervals, and also controlled so that no cells are sent out from the buffer BFij while the switch SW' ij is off. This situation is schematically shown in FIG. 12. That is, in the second embodiment described above, what is shown by the dotted arrow in FIG. 12 (■).

2) were discarded, but in this third embodiment, the data indicated by 2 and 3 are not discarded, but are delayed and outputted from the buffer BFij.

As a result, in this third embodiment, in addition to obtaining the same effect or advantage as the second embodiment described above, bursty traffic such as data is appropriately delayed by the buffer BFij when the width is narrow, so that bursty traffic This has the advantage of reducing the amount of data discarded and avoiding an increase in traffic due to retransmission.

(d) Others Also in the first embodiment described above, a buffer BFij may be provided before the control means G1j to prevent cells from being discarded when congestion occurs.

[Effects of the Invention] As detailed above, first, according to the convergence control method of the self-routing channel device of the present invention as claimed in claim 1,
In the third state detection means, the width state of each output terminal of the self-routing switch is detected by the output terminal state detection means, and the control means inputs input information according to the detection result of the width state detection means. Since the state in which input information is input can be controlled even for bursty traffic such as data communication, congestion is less likely to occur within the communication path.
As a result, there is an advantage that throughput can be improved.

Further, according to the width control method of the self-routing channel device of the present invention according to claim 2, in addition to the narrow width state detection means and the control means, the width control method includes the traffic identification means and the switching means. In addition to the effects obtained by the cap-shaped control method described in Section 1, width control is realized that does not affect the real-time performance of voice etc. even if the width of the internal link of the communication path becomes narrow due to burst traffic. There are advantages that can be achieved.

Furthermore, according to the congestion control method of the self-routing channel device of the present invention according to claim 3, narrow state detection means;
Control means, traffic identification means.

In addition to the switching means, there is provided a buffer that is interposed between the control means and the switching means and can delay and input bursty traffic to the control means. In addition to the effects obtained, there is an advantage that there is less discarding of bursty traffic, which avoids an increase in traffic due to retransmission.

[Brief explanation of the drawing]

1, 2(a) and 2(b) are block diagrams of the principle of the present invention, FIG. 3 is a block diagram showing the overall configuration of the first embodiment of the present invention, and FIG. 4 is a block diagram of the principle of the present invention. A block diagram of a self-routing switch as a first embodiment. FIG. 5 is a block diagram showing in detail the main parts of a first embodiment of the present invention. FIG. 6 is a diagram showing an example of cell arrival interval control, FIG. 7 is a diagram showing an example of cell arrival number control, FIG. 8 is a block diagram of a self-routing switch as a second embodiment of the present invention, and FIG. Both a) and (b) are diagrams showing cell configuration examples, FIG. 10 is a block diagram of a self-routing switch as a third embodiment of the present invention, and FIG. 11 is a main part of the third embodiment of the present invention. FIG. 12 is a diagram showing an example of cell arrival interval control, and FIG. 13 is a block diagram showing a conventional example. FIG. 14 is a block diagram showing the configuration of a unit switch, and FIG. 15 is a block diagram of a branch control device considered in the process of devising the present invention. In the figure, 1 is a self-routing channel device, 2 is an input highway, 3 is an output highway, 4.4' is a signal processing device, and 5 is a storage device. 6 is a VCN conversion device, 7 is a call processing device, 8-1.8-2.8-n, 9-1.9-2.9n are terminals, 10.10' is a signal separation device, and BFij is a buffer. CCi is a width narrow state detection circuit (width narrow state detection circuit means) C
Hij is a switching means, Cl1j is a traffic identification/cell switching device, CMi is a comparison device, CNTij is a control device, CTij, CT' ij are counters, Di is an information delay circuit, and DECi is a control information decoding circuit. DMi is a demultiplexer, DSi is a selector control circuit, Fij is a FIFO memory (buffer memory), Gij
is a cell arrival control device (control means). Ii is a control information detection circuit. OBi is an i-measurement device, Sij is a self-routing switch, 5CTij is a switch control device, SLi is a selector, 5Tij is an output terminal state detection device (output terminal state detection means), S Wij, SW' ij are switches, TDij
is a traffic identification means. 7' 2 sites〈Hippo Nissuke Ripro Nku Map Figure 1 Time Opening - Le Interest Interval Sashiyama Stop + lt Hosu 已 Figure 6 F Rushi J Arrival @ Makibisai Kokelt Showing National Policy 7 Figures (a) (b) 7ru'a IE showing calmness Figure 9 Cell interest gap control Qllt Hole Figure 12 - ('vm quantity -・ Dimension Gψ s Q) O'1

Claims (3)

[Claims] (1) In a self-routing channel device (1) that autonomously switches based on control information added to input information entering from an incoming terminal and sends the input information to an outgoing terminal instructed by the control information. , a self-routing switch (Sij) that outputs the input information to the output terminal specified by the control information, and an output terminal state detection means that detects the state of each output terminal of the self-routing switch (Sij). (STij), and congestion state detection means (CCi) that detects a congestion state based on the detection result of the output terminal state detection means (STij).
And, based on the detection result of the congestion state detection means (CCi),
Control means (Gi) for controlling the state in which the input information is input
j) A congestion control method for a self-routing channel device. (2) In a self-routing channel device (1) that autonomously switches based on control information added to input information entering from an incoming terminal and sends the input information to an outgoing terminal instructed by the control information. , a self-routing switch (Sij) that outputs the input information to the output terminal specified by the control information, and an output terminal state detection means that detects the state of each output terminal of the self-routing switch (Sij). (STij), and congestion state detection means (CCi) that detects a congestion state based on the detection result of the output terminal state detection means (STij).
And, based on the detection result of the congestion state detection means (CCi),
Control means (Gi) for controlling the state in which the input information is input
j), and a traffic identification means (TDij) for identifying whether the input information is burst traffic or real-time traffic; If it is identified as traffic, the control means (Gij) is bypassed and the input information is inputted, and the traffic identification means (TDij) is inputted.
), when the input information is identified as the burst traffic, switching means (CHij) is provided for inputting the input information via the control means (Gij). ,Congestion control method for self-routing channel equipment. (3) The control means (Gij) and the switching means (CHij)
The bursty traffic is controlled by the control means (Gi
3. The congestion control system for a self-routing communication path device according to claim 2, characterized in that a buffer (BFij) is provided which can be inputted into the self-routing channel device with a delay.