JPH02220189A - Portable ic card terminal equipment - Google Patents

Abstract

PURPOSE:To decrease the current consumption of an IC card without a data transmission fault by supplying a frequency slower than the rated clock frequency of the IC card, and data-communicating at the data transmitting speed delayed with respect to the rated data transmission speed at the same ratio as that of the supplied clock frequency to the IC card. CONSTITUTION:In a processing execution period 22 when an IC card 2 executes a processing corresponding to a command 20, a handy terminal 16 impresses the frequency somewhat lower than the rated clock frequency, for example a clock frequency fa = 2.4576MHz to be 1/2 of the rated clock frequency, to the IC card 2 by a clock control circuit 4, and in a command waiting period 23, a clock frequency f' = 614.40kHz is impressed to the IC card 2 by the clock control circuit 4. A microprocessor 9 controls a serial communication interface circuit (SCI) 5, and transmits the data at the 1/8 transmission speed of the rated data transmission speed by the SCI 5. Thus the current consumption of the IC card is reduced to about 1/8.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a portable IC card terminal device, and more specifically, in a battery-powered portable terminal device, an attached IC card terminal device is used.
The present invention relates to a portable IC card terminal device that can reduce power consumption when driving a C card.

[Prior Art] Conventional IC cards exchange data with external devices, such as a host computer, which is one of the external devices, an IC card reader/writer, or a terminal device (hereinafter, including these). When an IC card is inserted into a terminal device (represented by a terminal device), the IC card's internal control program decodes commands sent from the terminal device, and accesses the memory according to the contents, such as writing, reading, and erasing data. This is done according to a sequence in which the command is executed and the result is returned to the terminal device as a response to the command. In this case, the terminal device is always in a master state, and the IC card is a slave, and there is a command waiting state in which it operates while waiting for a command sent from the terminal device.

In such conventional IC cards, the power consumption is approximately 50mW if it has a built-in 1-chip IC.
For those with a built-in 2-chip IC, the output power is approximately 210 mW. This means that the power consumption of desktop computers, etc. is 0.3~
It can be said that the power consumption is relatively large compared to that of about 15 mW.

On the other hand, in recent years, IC cards have been given various functions so that they can be used for various purposes such as banks, hospitals, and credit cards. This is required for IC cards. Furthermore, in order to satisfy various demands, IC cards are being used by being attached to portable terminal devices.

[Problem to be solved] When an IC card is used in a terminal device such as a handheld terminal device, the terminal device usually
It is a battery-powered terminal device with an IC card terminal (hereinafter referred to as a "handy terminal"), and is equipped with a relatively large-capacity battery. Not only does this increase the weight of the handheld terminal, which is an obstacle to reducing the weight, but also, in the case of an IC card with a built-in rechargeable battery, as the power consumption of the IC card increases, the number of times the IC card must be charged also increases. Moreover, when a large rechargeable battery is used, it becomes difficult to downsize the handy terminal to the extent that it can fit in a pocket.

The present invention solves the problems of the prior art, and is capable of driving an IC card for a long time even when power is supplied to the IC card using a small capacity battery, etc.
An object of the present invention is to provide a portable IC card terminal device that can be easily miniaturized.

[Means for Solving the Problems] Portable IC of the present invention for achieving the above purpose
The card terminal device is characterized by a clock signal generation circuit that generates a clock signal (hereinafter referred to as a clock) with a frequency lower than the rated clock frequency set on the IC card, and the ratio of the frequency of this clock to the rated clock frequency. Sends data to the IC card at the transmission speed of the corresponding ratio,
It is equipped with an interface for receiving data from an IC card, and transmits and receives data to and from the IC card by supplying a low frequency clock to the IC card.

[Function] By the way, the current consumption of the microprocessor built into an IC card increases in proportion to the higher the clock frequency. Therefore, IC cards reduce the clock frequency for the purpose of lowering the current consumption. However, since data transmission and reception operations are performed based on the clock, the handy terminal will not be able to transmit data with the IC card at the rated transmission speed. )/(rated clock frequency), data transmission is possible.

Therefore, with the above configuration, it is possible to reduce the clock frequency supplied to the IC card, thereby reducing its power consumption. However, in this case, the processing speed within the IC card decreases. Therefore, it takes a lot of time to transmit a large amount of data to and from the IC card and read/write data to and from the IC card. In such a case, in order to reduce current consumption without significantly reducing processing speed, a means is provided to generate multiple clock frequencies, including a clock at the rated frequency or a slightly lower frequency and a clock even lower than these. When the IC card is executing a specific process, the IC card is operated at the rated frequency or at a clock frequency that is not significantly lower than the rated frequency, thereby suppressing a decrease in processing speed.

Therefore, for example, while the IC card is in the command waiting state, the clock frequency can be significantly lowered to supply a low frequency clock to reduce power consumption, and when executing a specific process, the clock frequency can be lowered to a lower frequency close to the rated clock frequency. Processing can be executed without significantly reducing the processing speed compared to normal cases.

Note that with an IC card, the command waiting time is longer than the command processing time, so as mentioned above, by significantly lowering the clock frequency while waiting for a command, the average current consumption can be increased (reduced). In this case, there is no risk that the information in the RAM in the IC card will be lost, unlike when the power supply to the IC card is cut off to reduce power consumption. While waiting, press L on your IC card.
It is also possible to further reduce power consumption by specifically stopping the clock supply within the normal operating range of the SI.

Some LSIs in IC cards have built-in oscillators to generate write/erase operation sequences for writable non-volatile memory (e.g. EEPROM), and this oscillator is usually synchronized with the IC card supply clock. operate independently. Therefore, when writing/erasing data to such an EEPROM, the internal control program of the IC card operates in synchronization with the operating sequence of this oscillator, but the internally stored writing/erasing The control program itself operates at the rated clock frequency supplied externally to the IC card.

As a result, if the clock frequency decreases, the EEPR
There is a drawback that writing/erasing data to OM becomes impossible.

In such cases, writing data to EEPROM/
In order to erase normally and reduce current consumption, EE
For IC cards with a built-in PROM, a clock is supplied to the IC card at the rated clock frequency only while writing/erasing data, and at other times, a clock at a frequency lower than the rated clock frequency is supplied. power consumption can be reduced.

[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment in which a portable IC card terminal device according to the present invention is applied to a handy terminal.
Fig. 2 is an external view of the handy terminal, Fig. 3 is its operation timing chart, and Fig. 4 is an EE
A timing chart showing an example of a data writing process when a FROM is built-in, and FIG. 5 is an operation timing chart of an example of writing data to an EEFROM in a handy terminal to which the present invention is applied. It is.

In FIG. 1, 16 is a handy terminal with an IC
A card 2 is installed, and data is exchanged with this IC card 2. The handy terminal 1θ includes a microprocessor 9,
It has a tC card interface circuit 1 serving as an interface between the microprocessor 9 and the IC card 2, a power supply control circuit 8, a display control circuit 101, a keyboard interface circuit 11, and a memory 12. A display device (LCD) 13 is connected,
Keyboard interace time 11 is keyboard 14
is connected.

In the power supply control circuit 8, a power switch 9 and a battery 7 are connected, and the power of the battery 7 is set to "0N10" of the power switch 9.
FF" is supplied to each of the circuits that constitute the handy terminal 16. Power is then supplied to the IC card 2 from the battery 7 via the IC card interface circuit 1 under the control of the microprocessor 9. Ru.

The IC card interface circuit 1 and the IC card power supply control circuit 3 supply power to the IC card 2 according to a control signal, and generate a clock signal of a rated clock frequency (=f), which is reduced to, for example, 178. A clock control circuit 4 has a built-in 1/8 frequency divider circuit that generates a clock with a frequency of 178 (=f'), which is the rated frequency, and converts parallel data output from the microprocessor 9 into serial data and outputs it to an IC card. 2, and a serial communication interface circuit (SCI) 5 that converts serial data from the IC card 2 into parallel data and sends it to the microprocessor 8.

Here, the 5CI5 is controlled by the microprocessor 9 so that the clock signal generated by the clock control circuit 4 is 1/
8 (:l' /f), the data transmission speed is reduced by 1/8 and the IC card 2
and exchange data. The display control circuit 10 also controls the microprocessor 9 according to the control of the microprocessor 9.
The keyboard interface circuit 11 receives input information from the keyboard 14 and interrupts the microprocessor 9 to display predetermined information. It is sent to the microprocessor 9.

Next, the operation of the handy terminal 18 having the above configuration will be explained. First, when the power switch 8 is turned on (
When turned on (“ON”), the power supply control circuit 8 operates, and the battery 7
A constant voltage power is supplied to the microprocessor 9, the IC card interface circuit 1, the display control circuit 10, the keyboard interface circuit 11 . Memory 12, LCD
13 and the keyboard 14, respectively. When the microprocessor 9 receives power, it starts a predetermined program in the built-in program storage ROM 15 and, in accordance with the program, controls the IC card interface circuit 1, the display control circuit 10, the keyboard interface circuit IL memory 12, and the power supply. Handy terminal by controlling the control circuit 8! Execute the application processing set to 6.

When an access request is made to the IC card 2 during the execution process of the application card date processing, the microprocessor 9 controls the IC card interface circuit 1, and the IC card interface circuit 1 supplies power to the IC card 2. Power (power supply Vcc) via the supply signal line 1a
A clock (CL) is supplied via the clock supply line 1b.
K) and a reset signal (π
IT) is set to Hh i gh level (hereinafter referred to as "H"), and data is transmitted or received through the I10 signal line 1c. Note that 1e is a ground (GND) signal line.

Here, assuming that the IC card 2 is a card with a rated clock frequency f = 4.9152 MH71 and a rated data transmission speed of 9800 BPS based on the ISO standard, in this embodiment, the clock control circuit 4 1/8 of the rated clock frequency f' = B 4.40K
A clock with a frequency of Hz is sent to the IC card 2.

IC card 2 received 4,9152MHz TsukuC'
-/ Since it has been standardized to perform data transmission processing of 98008 PS, G1
When applying a clock of 4.40KH2, 980
Data transmission cannot be performed in 08PS. Therefore, the microprocessor 9 controls the 5CI5 to obtain a transmission rate of 12, which is 1/8 of the rated data transmission rate, by the 5Cf5.
Control is performed such that data is transmitted at 00 BPS, thereby enabling data transmission between the IC card and the handy terminal 16. By doing so, the current consumption of the IC card is reduced to about 1/8, and power can be supplied by a small battery, making it possible to make the handy terminal 16 smaller and lighter.

On the other hand, when such a handy terminal 16 writes a large amount of data to the IC card 2 at once, or performs a batch read operation, the data transmission time becomes long if only the above method is used.

Therefore, in order to eliminate such drawbacks, the handy terminal 16 operates as shown in FIG. 3.

That is, FIG. 3 shows the clock (CLK) sent from the handy terminal 16 to the IC card 2, ! : Shows the relationship between the transmission data (Ilo) between the handy terminal 18 and the IC card 2.

The IC card 2 receives command data 20 from the handy terminal 16 and transmits response data 21. IC
During the processing execution period 22 in which the card 2 performs processing corresponding to the command 20, the handy terminal 16 is controlled by the clock control circuit 4 to operate at a clock frequency fa of 172, which is slightly lower than the rated clock frequency.
=2.45711 MHz is applied to the IC card 2, and during the command waiting period 23, the clock control circuit 4 applies a frequency f' =814.40 KIIz to the IC card 2. Command data 2 like this
When transmitting and receiving 0 and response data 21, the handy terminal 16 transmits the 2.4576MHz frequency o +7 to the IC.
7! When applying to F-)'2, the handy terminal lθ
The transmission speed of 1/2 of the rated data transmission speed is as follows.

Note that since the command data 20° and response data 21 are transmitted and received to and from the IC card 2 in response to key presses on the keyboard 14, the processing execution period is extremely short compared to the command waiting time. As a result, a large amount of data can be processed at high speed with the IC card, and average current consumption can be reduced. Furthermore, since there is no need to turn off the power while waiting for a command, there is no disadvantage that information in the RAM of the IC card 2 will be lost.

By the way, some IC cards 2 that include an EEPROM chip include an oscillator that is independent of an external clock in order to generate a data write/erase operation sequence. Figure 4 shows such an EEPRO
3 is a timing chart of a general write operation of an IC card 2 having M.

(a) shown in FIG. 4 is an address (AdreS) signal. To write data, first, the chip enable (CE) signal shown in FIG. 4 (b) is used.

After setting the output enable (OE) signal in the figure (d) to the W level (hereinafter referred to as "L") and setting the output enable (OE) signal in the figure (d) to "H", set the address data (D f n) and set the write enable signal in the figure (C). Set to “L”.

As a result, the write data (D i n ) shown in FIG. 4(e) is loaded. After this loading is done, the same figure (C)
Set the write enable signal to “H”, then load the first 1 byte data, and then
Lc), the write enable signal is set to “L” again.
”, it is possible to write up to 32 bytes of data consecutively.

Note that the maximum value of this byte load cycle t BLC is 3.
0us is an L signal that is independent of the clock supplied to the IC card 2.
Determined by the oscillator within the SI. In addition, the same figure (e) is
This is a busy (Buz) signal.

Now, in this case, the write enable signal is controlled by the IC.
This is performed by the program of the microprocessor 9 in the card 2. Therefore, since it depends on the clock supplied to the IC card 2, if the frequency of the clock supplied to the IC card is significantly lowered, the write enable signal cannot be controlled within the maximum value of the byte load cycle tBLC, resulting in a write failure.

FIG. 5 shows timing control of the clock control operation to solve such a drawback.

As shown in FIG. 5(b), the write enable (WE)
) During the data write execution period 24 in which data is written by controlling the signal, as shown in (a) of the figure, the IC
Card rated clock f (=4.9152MHz)
otherwise a low frequency clock f'' (:
814.40 Hz). The data transmission speed at this time is rated o-, f (=4
．． 9152MH2), it is rated and Rio +7
When f' (=614.40KHz) is applied, the speed is 1200BPS. In this case, since the IC card write execution period is smaller than other IC card processing periods, the average current consumption can be lowered and no write failures occur.

As described above, in addition to erasing/writing data to the EEPROM in the IC card, control to reduce the clock is also effective when there is a time limit independent of the IC card supply clock.

In addition, regarding the supply of the rated clock, please refer to the EEPROM
The rated clock frequency may be applied for a period longer than the data writing period, for example, when erasing/writing related commands are executed.

Note that the clock frequency adopted in the example is an example;
It goes without saying that similar effects can be obtained at other frequencies. Therefore, it goes without saying that the present invention is not limited to the rated clock frequency or to the case where the clock frequency is reduced to 1/8 of the rated clock frequency as shown in the embodiments.

[Effects of the Invention] As explained above, the present invention includes a means for supplying a frequency slower than the rated clock frequency of the IC card, and a means for supplying a frequency slower than the rated clock frequency of the IC card, and a means for supplying a clock frequency that is equal in ratio to the rated clock frequency of the IC card. Since the device is equipped with a means for data communication at a data transmission speed lower than the rated data transmission speed, the current consumption of the IC card can be reduced without any data transmission failure, and the portable IC card terminal device can be downsized.

[Brief explanation of the drawing]

FIG. 1 is a circuit configuration diagram of an embodiment in which a portable IC card terminal device according to the present invention is applied to a handy terminal, FIG. 2 is an external view of the handy terminal, and FIG. 3 is an operation timing chart thereof. Figure 4 shows the EEPRO on the IC card.
FIG. 5 is a timing chart showing an example of a data writing process when M is built-in. FIG. . l...IC card interface circuit, 2...I
C card, 3... IC card power supply control circuit, 4...
Clock control circuit, 5... Serial communication interface circuit (SCI), 6... Power switch, 7... Battery, 8... Power control circuit, 9...
Microprocessor, lO...display control circuit, 11.
...Keyboard interace circuit, 12...Memory, 13...LCD. 14...Keyboard, 15...Program storage RO
M116...portable IC card terminal device, f, f'
fa...Clock frequency, 20...Command data, 21...Response data, 22...Process execution period, 23...Command waiting period. Figure 1 Patent applicant Hitachi Maxell Ltd.

Claims (4)

[Claims] (1) In a portable IC card terminal device in which an IC card is installed, data is exchanged with the IC card by sending power, a clock signal, and a control signal to the installed IC card, and the device is powered by a battery. , a clock signal generation circuit that generates the clock signal with a frequency lower than the rated clock frequency set in the IC card, and a transmission speed having a ratio corresponding to the ratio between the frequency of this clock signal and the rated clock frequency. and an interface for transmitting data to the IC card and receiving data from the IC card, and supplying the clock signal of a low frequency to the IC card to exchange data with the IC card. Portable IC card terminal device. (2) The clock signal generation circuit selectively generates either a clock signal of a rated frequency or a clock signal of a lower frequency according to a control signal supplied from the outside, and the clock signal generation circuit When the generated clock signal is at the rated frequency, the interface transmits I at the rated data transmission rate corresponding to said rated frequency.
2. The portable IC card terminal device according to claim 1, wherein the portable IC card terminal device transmits data to a C card and receives data from the IC card. (3) A claim characterized in that the IC card to be installed has a writable nonvolatile memory, and a clock signal of a rated frequency is supplied to the IC card when data is erased or written to the IC card. The portable IC card terminal device according to item 2. (4) The mobile phone according to claim 1 selected from claims 1 to 3, further comprising means for temporarily stopping the clock signal supplied to the IC card when the IC card enters a command waiting state. IC card terminal device.