JPH02158825A - Ic card device - Google Patents

Abstract

PURPOSE:To realize the input/output switching of the communication of an IC card without using a microcomputer by providing an IC card read and write device with a communication control circuit for connecting electrically and directly two communication lines from host system and one data input/output terminal of the IC card. CONSTITUTION:The IC card read and write device 11 to read and write the IC card 10 and the host system 12 to control the IC card 10 and the IC card read and write device 11 are provided. Then, the communication control circuit 114 to connect two communication lines 121,123 from the host system 12 and one communication line 104 from the IC card electrically and directly in the IC card read and write device 11 is provided. Thus, since the host system 12 and the IC card 10 can communicate directly, communication can be performed at high speed, and in addition, the IC card read and write device 11 not influenced by the communication format of the IC card 10 can be constituted at low cost.

Description

DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION The present invention relates to an IC card device comprising an IC card used for cash cards, credit cards, etc., and an IC card read/write device.

2. Description of the Related Art A conventional IC card device has a structure as shown in FIG. 4, for example. In FIG. 4, 4Q is an IC card, 41 is an IC card read/write device, 42 is a host system, 401 is the above-mentioned IC power 1, name of the invention is IC card device 2, scope of claims (1) IC card, and this It is equipped with an IC card storage device that reads and writes IC cards, and a host system that controls the IC card and the 10-card read/write device, and includes two communication lines from the host system and one line from the IC card. 3. An IC card device provided with a communication control circuit for directly electrically connecting a communication line of a book within the IC card read device.

(2) The IC card read/write device includes a communication control circuit, a power supply circuit that operates with a communication control signal from the host system, and a clock signal supply to control the timing of signal application when powering on/off the IC card. An IC card device according to claim 1, comprising a circuit and a reset signal supply circuit.

(3) Multiple IC cards, power terminal (VCC) of lead 4o of each IC card, and clock terminal (O
LK), 403 is a reset terminal (R5τ), 404 is a communication signal terminal (Ilo) of the XC card 4o, 406 is a ground terminal (GND), and 411 is a terminal of the XC card read/write device 41 to the XCj card 4o. 412 is a clock signal supply circuit, 413 is a reset signal supply circuit, 414 is a communication control circuit, and 416 is an IC.
A switch for confirming the presence or absence of the card 4°, 416 a level conversion circuit for the signal from the host system 42, 417 beam a
The check signal generating circuit 418 is a microcomputer. In addition, 421 is the communication output line of the host system 42 (
TXD), 422 is the communication personnel RXD).

In the conventional IC card device, the power supply circuit 411 to the IC card 4o uses a switching transistor,
In addition, the clock signal supply circuit 412, the reset signal supply circuit 413, and the communication control circuit 414 have a 3-state buffer 1.
When the 3-state buffer is on, the communication control circuit 414 uses the IC card read/write device 41 to
Transmission state to the IC card 40 %3 state When the buffer is off, it enters the reception state from the IC card 4o. Further, the microcomputer 418 is composed of a calculation function (CPU), a communication function, a memory, and an input/output board, and controls the entire IC card read/write device.

Further, the level conversion circuit 418 converts the output signal of the microcomputer to a signal level conforming to, for example, the R8-2320 standard.

The operation procedure of the conventional IC card 4o and the host system 42 is shown in Figure @6, and the operation will be explained below.

FIG. 6 shows a conventional IC card read/write device 41. 4 is a timing chart showing signal states when the IC card 4o is accessed from the host system 42. FIG.

FIG. 5 shows the communication output lines (
TXD ), communication power M (RXD), XC card power supply terminal (VCa), clock terminal (CLK), reset terminal (R5T), communication signal terminal (Ilo), detection signal of the IC card 4o confirmation switch 415 It shows.

First, the host system 42 transmits a command to the IC card read/write device 41 to permit insertion of the IC card 40 (SOl). The IC card read/write device 41 is
After receiving the command, the presence/absence of the IC card is monitored by the detection switch 416. When a card is inserted into the IC card read/write device 41, the card detection switch 415 is turned on (602).

When a card is inserted, the IC card read/write device 41 first turns on the power terminal 401 of the IC card (5
03). Next, the IC card read/write device 41
Card clock terminal 402. The signals are turned on in sequence at the reset terminal 403 at fixed time intervals specified in the IC card (6o4.tsos). All timing control at this time is controlled by the microcomputer 41B inside the IC card read/write device 41. When the above signal is supplied to the IC card 4o, the IC card 40 sends out a reset response signal (so
e). At this time, the communication control circuit 414 of the IC card read/write device 41 is in a receiving state, and the reset response signal is received by the microcomputer 418 of the IC card read/write device 'fjl a 1. The reset response signal indicates the status of the IC card 4o, and depending on whether the reset response signal can be received normally, it can be confirmed that a regular IC card has been inserted normally and is operating normally. XCj card read twist device 41
After successfully receiving the reset response signal, the host system 42 notifies the host system 42 that the IC card 40 has been successfully inserted (507). After receiving the message from the IC card read/write device 41, the host system 42 communicates with the IC card 40.

When the host system 42 and the IC card 40 communicate, the host system 42 first transmits a message for the IC card 40 to the IC card read/write device 41 through the communication output line 421 (508).

The IC card read fit device 41 receives a message from the host system 42 by means of a microcomputer 418 . The received message is -H microcomputer 418
The information is stored in the memory of the IC card 40 and transmitted to the IC card 40 when reception is completed (509).

Since the communication signal line 4Q4 of the IC card 40 is used for both input and output, the 3-state buffer 1 of the communication control circuit 414 is turned on when transmitting a message to the IC card 4o. When the transmission to the IC card 4o is completed, the microcomputer 418 turns off the 3-state buffer of the communication control circuit 414 and receives the message from the IC card 4o (510).

The message received from the IC card 40 is stored in the memory of the -H microcomputer 418, and is transmitted to the host system 42 through the communication input line 422 when the reception from the IC card 4o is completed (611).

When terminating communication with the IC card 4o, the host system 42 first sends an I/O to the IC card read/write device 41.
Sends a command to terminate communication with the C card 4o (51
2). After receiving the command, the IC card read/write device 41
After turning off the signals of the clock terminal 402 and reset terminal 403 of the C card 40 (513, 514), the power supply terminal 4o1 is turned off (515). At this time, all signal-off timing control is performed by the microcomputer 418.
will do. The l, zc card read/write device 41 is
The presence or absence of the C card 40 is confirmed, and when the xC card 40 is removed (516), the host system 42 is notified that the process has ended (517).

As described above, in the conventional IC card read/write device 41, the input/output switching of the communication of the IC card 4o and the control of signal application timing all had to be performed by the microcomputer 418 inside the IC card read/write device 41.

Problems to be Solved by the Invention In such a conventional IC card read/write device 41, the microcomputer 41B performs communication input/output switching. This requires twice as much communication time. (2) The IC card read/write device 41 is an I
Since communication is performed according to the communication format of the C card 4o, it is difficult to use an IC card 40 with a different communication format. (3) IC card read/write device 4
In order to ensure that the microcomputer 418 is installed in 1.

The configuration of the device becomes complicated and costs increase. There was a problem.

In addition, a host system 42 such as a computer
Since the signal is separated into a transmission line and a reception line, the communication signal terminal 404 of the IC card 4o and the communication terminal of the host system 42 cannot be directly connected.

The present invention is intended to solve these problems, and it is an object of the present invention to provide an IC card device that can switch input and output of IC card communication without using a microcomputer.

Means for Solving the Problems In order to achieve the above object, the present invention provides an IC card read/write device that receives two communication signals from a host system;
This configuration includes a companion communication control circuit that is electrically directly connected to one data input/output terminal of the IC card.

Effect: This configuration allows direct communication between the host system and the IC card without installing a microcomputer in the xC card read/write device.

Embodiment FIG. 1 shows the configuration of an IC card read/write device according to an embodiment of the present invention, where 1o indicates I (3 cards).

11 is an IC card read/write device, and 12 is a host system.

101 is a power terminal (VCC) of the IC card 1o, 1
02 is a clock terminal (CLK), 103 is a reset terminal (R8T), IQ4 is a communication signal terminal (Ilo), 105
is a ground terminal (GND), 111 is a power supply circuit to the IC card read/write device 11O IC card 1o, 112 is a clock signal supply circuit, 113 is a reset signal supply circuit, 114 is a communication control circuit, and 116 is an IC card 10 is an existence confirmation switch, 116 is a level conversion circuit for a signal from the host system, and 117 is a clock signal generation circuit. Further, 121 is a signal on/off control line from the host system 12, 122 is a line for checking the presence or absence of the IC card 10, 123 is a communication output line (TXD), and 124 is a communication input line (RXD).

In this embodiment, the I of the 10 card read/write device 11 is
A power supply circuit 111 to the C card 10 is a switching transistor, a clock signal supply circuit 112 is a 3-state buffer and an AND gate, and a reset signal supply circuit 113
is 171 with AND gate! will be accomplished. Furthermore, the communication control circuit 114 uses an AND gate with an open collector output, and since the communication signal terminal 104 of the IC card 10 is normally only pulled up with a resistor, the 10 cards 1
There is no need to switch between transmitting and receiving communications, regardless of whether the IC card read/write device 11 or the IC card read/write device 11 is transmitting the data. Further, the IC card read/write device 11 is not equipped with a microcomputer, and the level conversion circuit 116
The configuration is such that the output signal from the C card 10 is directly converted to a signal level conforming to the R3-2320 standard. In addition, the signal on/off control AL line 121 and IC
The confirmation line 122 for confirming the presence or absence of the card 10 controls the signals of R8-2320, MDSR (data set ready) and DT.
Control from the host system 12 is possible by connecting to an R (data terminal/ready) or the like.

Host system 1 in an IC card device using the ICi card read/write device 11 having the above configuration
The procedure for accessing the IC card 1o from 2 will be explained with reference to the drawings. FIG. 2 is a timing chart showing the state of signals when the IC card 10 is accessed from the host system 12 in this embodiment.

Figure 2 shows the host system's signal on/off control signal (ONloFF), IC card presence confirmation signal (CARD SW), communication output line (TXD), communication input line (RXD), and power supply for the IC card 10. Terminal (V
CC), clock terminal (CLK).

A reset terminal (R3T) and a communication signal terminal (Ilo) are shown.

First of all, the host system 12 uses the IC card 10 as an IC card.
It is checked whether the card has been inserted into the card read/write device 11. When IC card 1o is inserted, IC card 1
The confirmation signal 122 for the presence or absence of 0 is turned on (201). At this time, the host system turns on the 0N10FF signal 121 and supplies power to the IC card 10. At the same time that the 0N10FF signal 121 turns on, the IC card read/write device 11 supplies power to the IC card 1o (203).
.

At the same time, a signal is transmitted to the clock supply circuit 112 and the reset signal supply circuit 113. however.

Since the inputs of the clock signal supply circuit 112 and the reset signal supply circuit 1130 are equipped with a delay circuit using a capacitor C and a resistor a, the clock signal and reset signal are output with a certain delay time (204.2
05). This delay time is determined by the value of the capacitor °C and the resistor R.

9. The values of the capacitor C and the resistor R are set to have a delay time that meets the specifications of the IC card 10. When the above signal is supplied to the IC card 1o, the IC card 10 sends out a reset response signal (206).

This reset response signal is used by the IC card read/write device.
The signal is transmitted to the host system 12 through the communication control circuit 114 and level conversion circuit 116 (207). The host system 12 can confirm that the genuine IC card 10 has been inserted normally and is operating normally, depending on whether the reset response signal can be normally received. After confirming the reset response signal from the IC card 1o, the host system 12 communicates with the IC card 1o. When the host system 12 and the IC card 1o communicate, the host system 12 first sends a message to the IC card 1o (20B).
. The transmission message from the host system 12 is transmitted through the communication output line (T
XD) 123 to the communication control circuit 114 via the level conversion circuit 116. At this time, the IC card 10 is in the receiving state and the communication signal terminal (Ilo) 104 is in a high impedance state, but since the communication control circuit 114 is pulled up, the communication signal terminal is in the H1gh state, and the communication signal terminal (Ilo) 104 is in the high impedance state. Accordingly, the signal goes low and is transmitted to the IC card 10 (209). When the transmission from the host system 12 is completed, the transmission/reception terminal (I
lo) 104 automatically returns to a high impedance state. The IC card 10 performs processing according to commands sent from the host system 12 and returns processing results to the host system 12. At this time, the communication terminal of the IC card 10 becomes High or Low level according to the transmission message (210), and the same data is transferred to the level conversion circuit 116.
(211).

When all the processing of the IC card 1o is completed, the host system 12 turns off the signal on/off control line 121 (2
12). When turning off the power of the IC card 10, the IC card 10 specifies that the signals of the reset terminal 103 and the clock terminal 102 are first turned off, and then the power supply terminal 101 is turned off. In the card read/write device 11, the signal is turned off in the following procedure.

When the on/off signal 121 turns off, the power supply circuit 111, clock signal supply circuit 112, and reset signal supply circuit 113 of the IC card read/write device 11 all turn off; however, the clock signal supply circuit 112 and the reset signal supply circuit 113 is configured to increase the AND of the input line with a delay circuit and the input line without a delay circuit, so the clock terminal 102 of the IC card 10 and the reset terminal are connected at the same time as the on/off signal 121 turns off. 1
03 is turned off (213, 214). At this time, the IC card 100 power supply circuit 111 operates as a capacitor.
After some delay time, the power terminal 101 of the IC card 10 is turned off (215), and the regulations of the IC card 1o are satisfied. Furthermore, the host system 12 has an IC card 1o.
The presence or absence of the card is confirmed using the confirmation signal 122, and all processing ends when the card is removed (216).

As described above, in this embodiment, the IC card 10 does not have a microcomputer, but signals are supplied to the IC card 1o at the prescribed timing, and the host system 12 and the IC card 10 can directly communicate with each other.

In addition to the IC card read/write device 11 of this embodiment, an IGi card read/write device may include an LED lamp for informing the card holder of the presence or absence of the IC card 10, or a renoid for forcibly ejecting the IC card 1o. If it is added to the device 11 and controlled using the 0N10FF signal 121, erroneous operation of the rc card 1o can be prevented.

Next, an embodiment of the pond of the present invention will be described with reference to the drawings.

FIG. 3 shows the configuration of an IC card read/write device in an embodiment of the present invention.

In FIG. 3, 31 is an IC card read/write device;
32 is the host system, 301.302゜303 is the IC
Cards 311, 312, and 313 are sequential switching circuits for controlling power on/off of three IC cards, and each of the four circuits was used in the IC card read/write device 11 shown in FIG. Power supply circuit 111 to IC card
．． Clock signal supply circuit 112. ! It is composed of a J upper set number supply circuit 113. Further, 314 is a clock signal supply circuit, and 316 is a level conversion circuit. Further, 317 is a communication control circuit for electrically connecting the signal input/output terminals of the three IC cards 301 to 303 and the communication line of the host system 32, and the output to the IC cards 301 to 303 and the host system 32 are both It is an open collector output.

Further, 321 and 322 are card confirmation signal and on/off control lines for the IC card 301, 323 and 324 are card confirmation signal and on/off control lines for the XO card 3020, and 326
, 328 are card confirmation signal and on/off control lines of the IC3 card 303, and 327 and 328 are signal output lines and input lines common to the three IC cards.

The procedure for accessing the IC cards 3Q1 to 303 from the host system 32 in this embodiment is shown below. First, the host system 32 receives the cart confirmation signal 321 from the IC card.
The presence or absence of the card 301 is confirmed. If the IC card 301 is inserted into the IC card read/write device 31, the on/off control line 322 is turned on and the IC card 301 is accessed in the same manner as in FIG. In this embodiment, since the transmission data of the IC card 301 is ANDed with the on/off signal and output to the IC card 301, if only the on/off signal 322 is on, the IC cards 302 and 303 No data will be sent. In addition, data from the IC card 301 is output from the I(j card control circuits 311, 312, 313 as open collectors), so the output can be combined into one and output to the host.Next, the host system 32 After turning off the off control line 322, the presence or absence of the IC card 302 is confirmed by the card confirmation signal 323.IC card 30
2 is inserted into the IC card read/write device 31, the on/off control line 324 is turned on and the IC card 302 is accessed using the same procedure. Furthermore, when accessing the IC card 303, the IC card 303 is turned on/off.
A similar procedure is performed using the off control line 326 and the card confirmation signal 326.

In this way, in this embodiment, a plurality of IC cards 301 to 303 can be accessed by one host system 32.

Effects of the Invention As described above, according to the present invention, the IC card read/write device receives two communication signals from the host system and an IC card.
By having a communication control circuit for direct electrical connection with one data input/output terminal of the card, the host system can directly communicate with the XC card, allowing high-speed communication and IC card communication. An IC card read/write device that is not affected by format can be constructed at low cost.

Furthermore, if a plurality of timing control circuits for turning on/off the power of the IC card are connected to the communication control circuit, one
It becomes possible to easily access a large number of IC cards with one host system.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an IC card device according to an embodiment of the present invention, FIG. 2 is a timing chart when accessing the IC card device of FIG. 1, and FIG. 3 is a block diagram of an IC card device according to an embodiment of the present invention. FIG. 4 is a block diagram of a conventional IC card device, and FIG. 6 is a timing chart when accessing the conventional IC card device. 10.301. 3Q2.303=-=-IO card, 11.3'1...IC card read/write device, 12゜32...Host system, 114,
317...Communication control circuit.

Claims (3)

[Claims] (1) An IC card, an IC card read/write device for reading/writing the IC card, and a host system for controlling the IC card and the IC card read/write device, and two An IC card device provided with a communication control circuit for directly electrically connecting a communication line and one communication line from an IC card within the IC card read/write device. (2) The IC card read/write device includes a communication control circuit, a power supply circuit that operates with a communication control signal from the host system, and a clock signal supply to control the timing of signal application when powering on/off the IC card. An IC card device according to claim 1, comprising a circuit and a reset signal supply circuit. (3) A plurality of IC cards, one IC card read/write device that reads and writes each IC card, and the
A host system for controlling a C card and an IC card read/write device, a sequential switching circuit for the IC card read/write device to control power on/off of a plurality of IC cards, and a plurality of IC cards. An IC that has a communication control circuit for electrically directly connecting the data input/output terminal and the communication interface of the host system.
card device.