JP2000172805A - Ic card - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an IC card which can accurately discriminate which interface is used among plural interfaces. SOLUTION: An IC card selects such an external interface circuit out of external interface circuits which connect the IC card to card reader/writers that the pulse number of the clock signal supplied from the circuit most quickly reaches a prescribed number among the clock signals supplied from the external interface circuits and establishes the data communication with a card reader/ writer 200 through the selected external interface circuit.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to control of an external interface in an IC card.

[0002]

2. Description of the Related Art Attention has been focused on an IC card as a portable storage medium having an external interface. At present, it is considered that such an IC card is used as a credit card in a cashless shopping system. Writing and reading of data (for example, cash data) to and from such an IC card is performed by attaching the IC card to a dedicated card reader / writer. I
When the C card is mounted on the card reader / writer, power is supplied from the card reader / writer to the IC card, and data communication between the two starts.

Here, as an interface for establishing the power supply and data communication, a card reader /
A contact interface is generally used in which external electrodes of a writer and an IC card are brought into contact with each other to establish a connection between them. However, in recent years, a non-contact type interface that establishes a connection between them in a non-contact state by using light, magnetism, radio waves, or the like has come to be used.

In order to make it possible to use the card reader / writer of either the contact type or the non-contact type, an IC card provided with the above-described two-system interface circuit is disclosed in Japanese Unexamined Patent Publication No. Hei. No. 209592. FIG. 1 is a diagram showing a configuration of an IC card proposed by the above publication. As shown in FIG. 1, the IC card is provided with a contact field 3 as a contact-type interface circuit and coils 4 and 5 as a non-contact-type interface circuit, which are connected to the electronic chip 2 respectively. I have.

In the electronic chip 2, a functional element 21 and a microcomputer 22 comprising a memory and a computer
Is provided. The functional element 21 selects one of the signal line group from the contact field 3 and the signal line group from the coil 4, and connects the selected signal line group to the microcomputer 22. At this time, the functional element 21 compares the potentials on the signal lines of the contact field 3 and the coil 4 to determine from which of the two the power supply voltage is supplied, and supplies the power supply voltage. The microcomputer 22 connects the signal line group that has been determined to be defective to the microcomputer 22.

That is, by comparing the power supply voltage from each of the contact field 3 and the coil 4, it is determined which of the contact field 3 (contact type interface circuit) and the coil 4 (non-contact type interface circuit) is used. Determine. By connecting the determined signal line group to the microcomputer 22, data communication using the interface corresponding to the card reader / writer is automatically established.

However, in the method of comparing the power supply voltages from the respective interface circuits as described above, the comparison determination may not be correctly performed due to fluctuations of the supplied power supply voltage. (Interface circuit).

[0008]

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and provides an IC card capable of correctly determining which of a plurality of interfaces is being used. The purpose is to do.

[0009]

An IC card according to the present invention is mounted on a card reader / writer so as to receive power and a clock signal from the card reader / writer and perform data communication with the card reader / writer. A plurality of external interface circuits for connecting to the card reader / writer, and the number of pulses of the clock signal supplied from each of the external interface circuits reaches a predetermined number earliest. Interface selecting means for selecting an external interface circuit that has received the supplied clock signal, and control means for establishing the data communication with the card reader / writer via the external interface circuit selected by the interface selecting means. Having.

[0010]

FIG. 2 is a diagram showing the connection between an IC card according to the present invention and a card reader / writer. As shown in FIG. 2, the IC card 100 according to the present invention includes data communication with the card reader / writer 200 in a non-contact state by using light, magnetism, radio waves, and the like, and data from the card reader / writer 200. Is provided with a non-contact type interface circuit 101 for establishing a power supply. Further, the IC card 100 includes a contact interface circuit 102 that establishes the data communication and the power supply by making contact with the external electrode 201 of the card reader / writer 200.

The non-contact type interface circuit 101 comprises:
In the non-contact state, a power supply voltage supplied from the card reader / writer 200 is fetched and supplied to a power supply circuit 103.
To supply. Further, the contactless interface circuit 10
1 is a card reader / writer 200 in the non-contact state.
The data signal and the clock signal transmitted from
Send to U bus line CL. At this time, the clock signal is also supplied to the counter 105 as the clock signal CLK1. Also, the non-contact type interface circuit 101
Fetches a data signal and a clock signal read onto the CPU bus line CL from a memory 110, which will be described later, and transfers them in a non-contact state to the card reader / writer 200.
Send to

The contact type interface circuit 102 takes in the power supply voltage supplied from the card reader / writer 200 by contacting the external electrode 201 of the card reader / writer 200 and supplies it to the power supply circuit 103. Further, the contact interface circuit 102 sends the data signal and the clock signal transmitted from the card reader / writer 200 to the CPU bus line CL. At this time, the clock signal is the clock signal CLK.
2 is also supplied to the counter 106. Further, the contact interface circuit 102 takes in the data signal and the clock signal read out from the memory 110 described later on the CPU bus line CL, and transmits them to the card reader / writer 200.

A power supply circuit 103 supplies a power supply voltage supplied from either the non-contact type interface circuit 101 or the contact type interface circuit 102 to each functional module as described below as a power supply voltage Vc. The counter 105 starts counting the number of clock pulses of the clock signal CLK1 supplied from the non-contact type interface circuit 101 in response to turning on the power, and when the counted value reaches a predetermined number, the logic level "
A carry-out signal CO1 of 1 "is generated and supplied to the set terminal S of the RS flip-flop 107. Counter 1
05 is the carry-out signal CO of the logical level "1".
After the occurrence of 1, the count value is reset to "0", the counting operation is stopped, and the counting operation of the counter 106 is also forcibly stopped.

The counter 106 starts counting the number of clock pulses of the clock signal CLK2 supplied from the contact interface circuit 102 in response to turning on the power, and when the counted value reaches a predetermined number, the logic level "1" is set. "
And outputs it to the reset terminal R of the RS flip-flop 107. Counter 10
6 is the carry-out signal CO2 of the logical level "1".
After the occurrence of the above, the counting operation is stopped after resetting the count value to "0" and the counting operation of the counter 105 is forcibly stopped.

When the carry-out signal CO1 of the logic level "1" is supplied to the set terminal S of the RS flip-flop 107, the carry-out signal of the logic level "1" is supplied to the reset terminal R. When CO2 is supplied, the interface selection signal I of the logic level "0"
Generate FS. The RS flip-flop 107 sends the interface selection signal IFS to each of the non-contact type interface circuit 101, the contact type interface circuit 102, a DMA (Direct Memory Access) control circuit 108 described later, and the CPU bus line CL.
Note that the interface selection signal IFS is held in the RS flip-flop 107.

On the CPU bus line CL, a DMA control circuit 108, a ROM (Read Only Memory) 109, a memory 110, and a CPU (Central Processing Unit) 12 are provided.
0 are respectively connected. These CPU bus lines C
L, a microcomputer 15 that performs various data processing as the IC card 100 by the DMA control circuit 108, the ROM 109, the memory 110, and the CPU 120.
0 is formed.

The ROM 109 stores the IC card 100
The software for controlling the operation of is stored in advance.
The CPU 120 sends out various command signals on the CPU bus line CL by selecting and executing a control program corresponding to the logic level of the interface selection signal IFS from such software. The memory 110 is
The CPU 120 is connected via the CPU bus line CL.
When a read command is supplied from the CPU, the content stored in the memory 110 is read onto the CPU bus line CL, while when a write command is supplied, data on the CPU bus line CL is written. To remember this.

The DMA control circuit 108 includes the CPU 12
When a DMA transfer command is supplied from 0, control is performed to switch access (writing or reading) to the memory 110 to DMA transfer. That is, the CPU 120
Directly without using the write and read commands from the CPU.
A transition is made to a so-called DMA transfer mode in which a data signal on the bus line CL is written and its stored content is read.

Next, the operation of the above configuration will be described. Note that the card reader / writer 200 shown in FIG.
For the sake of explanation, both a contact type and a non-contact type interface are provided. However, the IC card according to the present invention can be applied to a card reader / writer of a type having only one of the interfaces. is there.

The operation of the IC card 100 for each type of the card reader / writer 200 will be described below. (1) A type equipped with only a contact-type interface
When mounted on the writer, first, the contact interface circuit 102 in the IC card 100 supplies the power supply voltage supplied from the card reader / writer 200 to the power supply circuit 103. Thereby, each function in the IC card 100 starts operating. At the same time, the contact interface circuit 102 takes in the clock signal supplied from the card reader / writer and supplies it to the counter 106 as the clock signal CLK2. Therefore, the counter 106 starts counting the number of pulses of the clock signal CLK2. The count eventually reaches a predetermined number. At this time, the counter 106 supplies the carry-out signal CO2 of the logical level “1” to the reset terminal R of the RS flip-flop 107.

On the other hand, the non-contact type interface circuit 10
1 is not supplied, the clock signal CL
K1 is not supplied to the counter 105, and its count value remains fixed at "0". Therefore, at this time, the logical level “1” is applied to the set terminal S of the RS flip-flop 107.
Is not supplied. From the above, the RS flip-flop 107 is in the reset state, and sends out the interface selection signal IFS of the logic level “0”. In response to the interface selection signal IFS having the logic level “0”, the non-contact interface circuit 101 enters the communication disable state, and the contact interface circuit 102 enters the communication enable state.

Further, the CPU 120 sets the logic level to "
By the interface selection signal IFS of "0",
It is determined that the interface used is the contact interface circuit 102, and thereafter, a control program corresponding to the contact interface mode is executed. For example, when the content stored in the memory 110 is read and transmitted to the card reader / writer 200, the contact-type interface circuit 102 is used. Thus, the data read from the memory 110 is transmitted to the card reader / writer 200 only through the contact interface circuit 102.

That is, when the IC card 100 is mounted on a card reader / writer having only a contact interface, the IC card 100 is supplied with a clock signal only from the contact interface circuit 102. Is determined to be a contact type. Based on this determination, the connection between the card reader / writer and the microcomputer 150 in the IC card is established in the IC card 100 via the contact interface circuit 102.

(2) When the type IC card 100 having only the non-contact type interface is mounted on such a type of card reader / writer, first, the non-contact type interface circuit 101 in the IC card 100 It takes in the power supply voltage supplied from the / writer 200 and supplies it to the power supply circuit 103. Thereby, each function in the IC card 100 starts operating. At the same time, the contactless interface circuit 101 takes in the clock signal supplied from the card reader / writer and supplies it to the counter 105 as the clock signal CLK1. Therefore, the counter 105 starts counting the number of pulses of the clock signal CLK1. The count eventually reaches a predetermined number. At this time, the counter 105 supplies the carry-out signal CO1 of the logical level “1” to the set terminal S of the RS flip-flop 107.

On the other hand, the contact type interface circuit 102
From the clock signal CLK
2 is not supplied to the counter 106, and its count value remains fixed at "0". Therefore, the carry-out signal CO2 of the logic level "1" is not supplied to the reset terminal R of the RS flip-flop 107. From the above, the RS flip-flop 107 is set and the interface selection signal IFS of the logic level "1" is set.
Is sent. In response to the interface selection signal IFS having the logic level “0”, the non-contact interface circuit 101 enters the communication enable state, and the contact interface circuit 102 enters the communication disable state.

Further, the CPU 120 determines that the logic level is "
Based on the interface selection signal IFS of 1 ", it is determined that the currently used interface is the non-contact interface circuit 101, and thereafter, a control program corresponding to the non-contact interface mode is executed. When the content stored in the memory 110 is read and transmitted to the card reader / writer 200, the contactless interface circuit 101
This is performed using. Thereby, the data read from the memory 110 is stored in the non-contact type interface circuit 10.
1 is transmitted to the card read / writer 200 only.

Further, the CPU 120 responds to the interface selection signal IFS of the logic level "1" by using
A DMA transfer command is sent to MA control circuit 108. As a result, access (writing or reading) to the memory 110 does not go through the CPU 120 but this DM
The control is performed by the A control circuit 108. As described above, when the IC card 100 is mounted on the card reader / writer having only the non-contact type interface, the clock signal is supplied only from the non-contact type interface circuit 101 in the IC card 100.
It is determined that the card reader / writer is a non-contact type. Based on this determination, in the IC card 100,
The connection between the card reader / writer and the microcomputer 150 in the IC card is established via the non-contact type interface circuit 101. At this time, access to the memory 110 in the microcomputer 150 is performed by DMA transfer without passing through the CPU 120.

In the above-described embodiment, the configuration having the two external interfaces of the non-contact type interface circuit 101 and the contact type interface circuit 102 has been described. However, three or more external interfaces are provided. The same can be applied to an IC card.

[0029]

As described above, in the IC card according to the present invention, which interface circuit is currently used is determined based on the clock signal supplied from each of the plurality of interface circuits, and the interface circuit is determined. The connection with the card reader / writer is established via the.

Therefore, it is possible to determine the interface circuit currently used more accurately than when the determination is made based on the power supply voltage value supplied from each of the plurality of interface circuits.

[Brief description of the drawings]

FIG. 1 is a diagram showing an internal configuration of a conventional IC card.

FIG. 2 is a diagram showing a configuration of an IC card according to the present invention.

[Explanation of Signs of Main Parts]

 REFERENCE SIGNS LIST 100 IC card 101 non-contact type interface circuit 102 contact type interface circuit 105 counter 106 counter 107 RS flip-flop 108 DMA control circuit 110 memory 120 CPU 150 microcomputer 200 card read / writer

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Etsuko Nakamoto 3-20-1, Minamiazabu, Minato-ku, Tokyo Motorola Co., Ltd. F-term (reference) 5B035 AA06 BB09 CA12 CA25

Claims (4)

[Claims] 1. An IC card which is mounted on a card reader / writer and receives power and a clock signal from the card reader / writer to perform data communication with the card reader / writer. And a plurality of external interface circuits for connecting to a writer, and an external interface circuit receiving the supply of a clock signal whose pulse number has reached a predetermined number earliest among the clock signals supplied from each of the external interface circuits An IC card comprising: an interface selecting unit that selects the data communication unit; and a control unit that establishes the data communication with the card reader / writer via the external interface circuit selected by the interface selecting unit. 2. The IC card according to claim 1, wherein the plurality of external interface circuits include a contact interface circuit and a non-contact interface circuit. 3. The control unit includes: a memory; a CPU that accesses the memory by sending a write command or a read command to the memory; and a CPU that directly accesses the memory without passing through the CPU. D
An MA control circuit, wherein the control means accesses the memory with the CPU when the external interface circuit selected by the interface selection means is the contact interface circuit. If the external interface circuit selected by the interface selecting means is the non-contact type interface circuit, the D
3. The IC card according to claim 1, wherein the memory is accessed by an MA control circuit. 4. The IC card according to claim 1, wherein said control means executes a control program corresponding to the external interface circuit selected by said interface selection means.