JPH02126452A - Voice message memory circuit for video tape recorder and control thereof - Google Patents

Abstract

PURPOSE: To output a voice message matched with a video recording time and to improve functionality by setting a reservation time in a video tape recorder, storing voice information in it and outputting the voice information when it becomes a set time. CONSTITUTION: When timer keys SW3 , SE4 and a memory key SW5 of a key matrix 1 are operated, the reservation time and a program address are set by a timer microcomputer 2. A communication processor 3 converts a voice signal from a microphone 4 into a digital signal by a control signal from the microcomputer 2 to record it on a specified address in a RAM 6. Then, when the set reservation time elapses, the processor 3 reads out the voice signal recorded in the RAM 6 to input it to a gate and hold circuit 7, and converts it to an analog signal to output it to a speaker 11. Thus, the voice information is outputted matched with the video recording time, and the functionality is improved.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to scheduled recording of a video tape recorder, and more specifically, it is a system that allows a user to directly record audio information and output it at a required time. The present invention relates to a voice message storage circuit and a control method thereof.

[Conventional technology]

Generally, a video tape recorder plays back a recorded tape and records other video signals on the tape.

In addition, with the recent development of video tape recorder manufacturing technology, it is now possible to record the contents of broadcast programs that are not being viewed, and it is also possible to set the time to record in advance and then It also has a scheduled recording function that automatically records at certain times. It also has a function to set a large number of time slots and automatically perform recording according to the set time order.

[Problem to be solved by the invention]

However, if the user's audio signal could be stored in the video tape recorder in advance and the stored audio signal could be output at the scheduled recording time, the user would be able to enjoy even more convenience. However, the reality is that video tape recorders are not yet equipped with such a function.

Therefore, the present invention has been researched to solve such problems, and it is possible to set a reservation time in a video tape recorder, and to store the user's voice information in advance in the memory. It is an object of the present invention to provide a voice message storage circuit and a control method thereof that can output the stored voice information through a speaker when the reserved time has arrived.

[Means to solve the problem]

An object of the present invention is to set a reserved time in a video tape recorder, convert a user's audio signal inputted through a microphone into a digital signal, and store the digital signal in a memory. When the digital audio signal stored in the memory is read out, the read digital audio signal is held and converted to an analog signal, and the audio signal converted to the analog signal is passed through a low-pass filter. This is achieved by amplifying the signal and outputting it through a speaker.

[Examples and effects]

Hereinafter, embodiments and operations according to the present invention will be described in detail using the drawings. FIG. 1 is a diagram of a voice message storage circuit of a video tape recorder according to the present invention.As shown in the drawing, there is a key matrix 1 for performing key input, and a key matrix 1 for receiving key signal inputs to perform various controls. A timer microcomputer 2, a communication processor 3 that controls recording and reading of audio signal data under the control of the timer microcomputer 2, a microphone 4 that converts audio signals into electrical signals, and an output signal of the microphone 4. An analog/digital converter 5 converts the signal into an 8-bit digital signal under the control of the communication processor 3 and applies the signal to the communication processor 3; and an audio signal input from the analog/digital converter 5 to the communication processor 3; A RAM 6 for storing signal data, a gate and hold circuit 7 for transmitting audio signal data read from the RAM 6 by the communication processor 3 under the control of the communication processor 3, and an output of the gate and hold circuit 7. A digital/analog converter 8 that converts a signal into an analog signal; a low-pass filter 9 that passes only the output signal of the digital/analog converter 8; and an output of the low-pass filter 9; An audio message storage circuit of a video tape recorder according to the present invention is constituted by an amplifier 10 that amplifies a signal and a speaker 11 that outputs an output signal of the amplifier 10 as an audio signal.

and the key matrix l is a slide switch to convert the system into a program state or a normal state;
and program number key S to increase the program number.
lh, hour key SW3 and minute key hand for setting the time,
and a memory key SWS that instructs recording of audio signal data.
and a transmission message key for instructing the transmission of audio signal data.

2 is an output waveform diagram showing the operational relationship of the voice message storage circuit shown in FIG. 1, and FIG. FIG. Moreover, Fig. 2 (
B) is an output waveform diagram of the timer microcomputer 2 and communication processor 3 when audio signal data is read out by the RAM 6. Furthermore, FIG. 3 is a control flowchart of the timer microcomputer 2 based on the key input of the key matrix 1, and FIG. 4 is a control flowchart of the communication processor 3 based on the output of the timer microcomputer 2.
2 is a control flowchart.

Now, the operation of the audio message storage circuit of the video tape recorder according to the present invention and its control method will be explained using FIGS. 2 to 4.

As shown in the drawing, the timer microcomputer 2 detects the key signal of the key matrix 1 by outputting a scan signal to its scan signal output terminals SC, SC2 and searching for the signal of its input terminal It-I4. become.

In this manner, the timer microcomputer 2 searches for the key matrix 1 and performs control as shown in the flowchart of FIG. That is, transmission message key SW
If h is not set and the program switch SW+ is short-circuited to the program terminal P, the timer microcomputer 2 determines this and enters the message setting mode.

In this state, when the program number key SL is pressed, the timer microcomputer 2 increases the program number PN by 1. In this case, the hour key S6 and the minute key SW are pressed.
4 By pressing and, the timer microcomputer 2 will set the reservation time.

To record the audio data signal in this state, use the memory key S.
When WS is pressed, the timer microcomputer 2 determines this and outputs an address signal according to the program number PN to its address signal terminal AD+ as shown in FIG. A high potential signal is output to CS and the input control signal terminal IN.

Therefore, in this case, the communication processor 3 receives and records audio signal data as shown in the flowchart of FIG. That is, in this case, the communication processor 3 sets a predetermined time (TC: for example, 5 seconds) in its internal time counter, and then outputs an address signal based on the address signal output from the timer microcomputer 2 to its address signal terminal AIh, and outputs the address signal to the address signal terminal AIh. 6, and outputs a high potential signal to the control signal terminal C1 as shown in FIG. 2(A) to convert the analog/digital converter 5.
make it work. Therefore, in this case, the output audio signal of the microphone 4 is converted into an 8-bit digital signal by the analog/digital converter 5 and then sent to the communication processor 3.
is applied to the data terminal Datal of . In this case, the communication processor 3 sequentially receives input signals applied to its data terminal Data, for example, three data DA1.
．． DA2゜DA3 is input sequentially and DAI and DA are input.
2. Find the difference between OA2 and DA3, convert the two difference signals thus obtained into 4-bit codes, combine them into 8-bit code data, and convert the 8-bit code data into that data. It is output to the terminal Data2 and applied to the ram 6. And, in this case, the communication processor 3
As shown in FIG. 2(A), a high potential signal is output to the control signal terminal C2, and a low potential write control signal is output to the read/write control signal terminal R/Y, so that the data terminal Data2 The 8-bit code data outputted to the RAM 6 is recorded at the designated address of the RAM 6. Thereafter, the communication processor 3 outputs a low potential signal to its control signal terminal C2, and its address signal terminal ^D! After that, the analog/digital converter 5 receives the digital signal input and converts it into 8-bit code data using the method described above.
The data is recorded again at the designated address, and this operation is repeatedly performed for the predetermined time TC. Therefore, the audio signal input through the microphone 4 during the predetermined time TC is sequentially converted into 8-bit code data and recorded at the designated address of the RAM 6.

Further, when the communication processor 3 completes counting the predetermined time TC, it outputs a high potential signal as a count completion signal and applies it to the terminal CPI of the timer microcomputer 2, so that the timer microcomputer 2 operates as shown in FIG. 2(A) and As shown in FIG. 3, the control signal terminal CS and the input control signal terminal I
A low potential signal is output to N to complete the recording control operation of the audio signal data.

On the other hand, when the transmission message key SW is set, the timer microcomputer 2 starts to perform the transmission control operation of audio signal data as shown in the flowchart of FIG. That is, in this case, the timer microcomputer 2 sets the program address PAD to "0" and also sets the number of transmissions MS.
C is set to "0", and thereafter it is determined whether the current time is the same as the time reserved by the program address PAD, and in this case, if the time is not the same, the program address PAD is increased by "1°" and then the current time is It is determined again whether the reserved time is the same as the time reserved by the program address PAD.This process is repeated when the program addresses P and AD are
On the other hand, if the current time is the same as the time reserved by the program address PAD, the timer microcomputer 2 outputs the program address PAD to its address signal terminal ^D, and at the same time outputs the program address PAD as shown in FIG. B)
Its communication processor control signal terminal C3 as shown in
゜ and outputs a high potential signal to the output control signal terminal OUT. Therefore, in this case, the communication processor 3 reads and transmits the audio signal data recorded on the RAM 6 as shown in the flowchart of FIG. That is, in this case, the communication processor 3 registers the predetermined time (T) in its internal counter.
C: After setting the timer microcomputer 2 (for example, 5 seconds)
After specifying the address of the RAM 6 by outputting an address signal based on the address signal output from the address signal terminal AD+ to the address signal terminal AD, a signal is sent to the control signal terminal C2 as shown in FIG. 2(B). outputs a high potential signal to the RAM 6, reads out the 8-bit code data recorded at the specified address, and thereafter outputs a low potential signal to the control signal terminal C2 as shown in FIG. 2(B). Output.

However, since the 8-bit code data read by the communication processor 3 is a combination of two 4-bit data,
After separating into two pieces of data, the difference between the previous 8-bit signals is converted into two pieces of 8-bit data ODA! , convert to 00^2. Thereafter, the communication processor 3 outputs the 8-bit data OAD I as shown in FIG. 2(B) and also outputs a high potential signal to its control signal terminal C3, so that the 8-bit data OAD I 7
and is applied to the digital/analog converter 8. Thereafter, the communication processor 3 outputs a low potential signal to its control signal terminal C1, and then outputs the next 8-bit data 0^D again.
1 and outputs a high potential signal to the control signal terminal C1, thereby causing the 8-bit data ODA
2 is input to the gate and hold circuit 7 and applied to the digital/analog converter 8. Thereafter, the communication processor 3 increments the address signal output to the address signal terminal AIh by "1" and repeats the above process for the predetermined time TC. Meanwhile, the data signal applied to the digital/analog converter 8 as described above is converted into an analog signal and passed through the low-pass filter 9 and amplifier 10 to the speaker 1.
1 is output.

When the communication processor 3 completes counting the predetermined time TC, it outputs a high potential signal as a count completion signal and applies it to the terminal CPl of the timer microcomputer 2, so that the timer microcomputer 2 follows the flowchart of FIG. As shown, the number of transmissions MSC is increased by "1" and a low potential signal is output to the control signal terminal C8 as shown in FIG. 2(B). Thereafter, the timer microcomputer 2 determines whether the number of transmissions MSC is "2" and sets it as "2".
'', the timer microcomputer 2 transfers the program address PAD to its address signal terminal A as described above.
D, and a high potential signal is again output to its control signal terminal CS and output control signal terminal OUT. Therefore, in this case, the communication processor 3 reads the 8-bit code data from the RAM 6 again as described above, and then transmits it through the gate and hold circuit 7.

In this way, the communication processor 3
When the count is completed, a high potential signal of the count completion signal is outputted and applied to the terminal CP1 of the timer microcomputer 2. Therefore, in this case, the timer microcomputer 2 increases the number of transmissions MSC by 1° and outputs a low potential signal to the chip selection signal terminal C81. Thereafter, the timer microcomputer 2 determines whether the number of transmissions MSC is ``2'', and if it is ``2'', repeats the process of incrementing the program address PAD by ``1''.

[Effects of the Invention] As explained above, the present invention sets a reserved time in a video tape recorder, stores the user's audio information in the memory in advance, and records the audio information at the set reserved time. Since the video tape recorder can be output, the user can store the necessary audio information in memory according to the scheduled recording time of the video tape recorder, and can enjoy even more convenient functions in the case of scheduled recording. be.

[Brief explanation of the drawing]

FIG. 1 is a voice message storage circuit diagram of a video tape recorder according to the present invention, FIG. 2 is an output waveform diagram showing the operational relationship of the voice message storage circuit of FIG. 1, and FIG.
FIG. 4 is a control flowchart of the timer microcomputer of the voice message storage circuit shown in the figure, and FIG. 4 is a control flowchart of the communication processor of the voice message storage circuit of FIG. In the figure, 1...Key matrix, 2...Timer microcomputer, 3...Communication processor 4...Microphone, 5...Analog/digital converter, 6...Ram, 7...Gate and Hold circuit, 8...Digital/analog converter, 9...Low pass filter 10...Amplifier, 11...Speaker

Claims (1)

[Claims] 1. A key matrix (1) that performs key input, a timer microcomputer (2) that performs various controls in response to key signal input from the key matrix (1), and the timer microcomputer (2). a communication processor (3) that controls the recording and reading of audio signal data under the control of the communication processor (3); a microphone (4) that converts the audio signal into an electrical signal; (
an analog/digital converter (5) that converts the signal into an 8-bit digital signal and applies it to the communication processor (3) under the control of the communication processor (3);
a ram (6) for storing an audio signal inputted from the analog/digital converter (5) and converted into 8-bit code data; a gate and hold circuit (7) for transmitting signal data under the control of the communication processor (3); and the gate and hold circuit (7).
a digital/analog converter (8) that converts the output signal of the digital/analog converter (8) into an analog signal;
A low-pass filter (9) that passes only the signal with a medium-low frequency of the output signal of (8);
), an amplifier (10) for amplifying the output signal of the amplifier (
a speaker (1) that outputs the output signal of (10) as an audio signal;
1) An audio message storage circuit for a video tape recorder, comprising: 2. Key matrix (1) with timer microcontroller (2)
When the slide switch (SW_1) is in the program position, the message setting mode is entered, and the program number is set to "1" each time the program number key (SW_2) is set in the message setting mode state.
” and press the hour key (SW_3) and minute key (S
W_4) sets a reservation time for the program number, and thereafter sets a memory key (SW_5) to output an address signal according to the program number as well as a communication processor control signal and an input control signal; If the key (SW_6) is set, the message transmission mode is entered, and in this state, if the current time is the same as the reserved time by the program address, the program address is output, and the communication processor control signal and output control signal are output. and when the timer microcomputer (2) outputs the communication processor control signal and the input control signal, the communication processor (
Step 3) enters the recording mode, sets a predetermined time, and then specifies the start address of the ram (6) in the address signal output by the timer microcomputer (2), as well as the analog/digital converter (5). Applying a drive control signal, an 8-bit digital signal is input three times from the analog/digital converter (5), converted into two 4-bit codes, and then combined into 8-bit code data. A drive control signal and a recording control signal are applied to (6) to record the 8-bit code data at the designated address, and thereafter the address of the RAM (6) is incremented by "1" until the predetermined time is reached. repeating the process while increasing the count, and applying a count completion signal to the timer microcomputer (2) when the predetermined time has elapsed; and the timer microcomputer (2) outputting a communication processor control signal and an output control signal. When the communication processor (3) enters the transmission mode and sets a predetermined time, the timer microcomputer (2) then specifies the start address of the RAM (6) in the address signal based on the program address signal output. Apply a drive control signal to (6), read the 8-bit code data recorded at the specified address, separate the 8-bit code data into two 4-bit code data, and then separate the 8-bit code data into two 4-bit code data. The two 8-bit data are sequentially sent out by applying a drive control signal to the gate and hold circuit (7), and are then sent out sequentially to the RAM (6) until the predetermined time. Repeating the process while incrementing the address by "1" and applying a count completion signal to the timer microcomputer (2) when the predetermined time has elapsed. Voice message storage control method.