JPH02110743A - Fault diagnostic processing system - Google Patents

Abstract

PURPOSE:To correctly and automatically point out a failed part by activating the execution of a test program while a clock margin is applied to a failed part when the fault is found to be an intermittent fault by the result of the execution of a test program. CONSTITUTION:By the result of the execution of a test program, when the fault is found to be a fixed trouble, the failed part can be pointed out by the test program. At the time of being the intermittent fault, the trouble is not reproduced only by executing the test program, the pointing-out of the failed part cannot be performed, and therefore, a processor part 9 automatically generates the signal to execute the clock margin for a clock control part 7 to an arithmetic processing part 2 to generate the fault. Consequently, for the arithmetic processing part 2 which is the failed part, the test program is executed while the clock margin is applied, and the trouble is easy to reproduce. Thus, the failed part can be correctly and automatically pointed out.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to a fault diagnosis processing method.

[Conventional technology]

Conventionally, fault diagnosis of information processing devices has been carried out in a diagnosis section by detecting a fault, collecting fault information, recording, automatically disconnecting the faulty section from the operation section, and starting execution of a test program.

[Problem to be solved by the invention]

The conventional fault diagnosis processing method described above is effective in the case of fixed faults, but in the case of intermittent faults, the fault does not occur even if the test program is executed under normal conditions, and the fault information is insufficient to identify the faulty part. The disadvantage was that it was not possible to point out

[Means to solve the problem]

The method of the present invention is a fault diagnosis processing method for an information processing device having a function of executing a test program on a faulty part when a fault occurs, and the method of the present invention is such that it can be determined that the fault is an intermittent fault based on the result of execution of the test program. The test program is characterized in that execution of the test program is started with a clock margin applied to the faulty part.

〔Example〕

Next, embodiments of the present invention will be described and explained with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention.

The information processing device 1 of this embodiment includes two arithmetic processing units 2.3.
It is composed of a main storage section 4, a system control section 5, an input/output processing section 6, a clock control section 7 that controls clocks supplied to each section, and a diagnostic processing section 8 that diagnoses each section. ing.

The diagnostic processing unit 8 further includes a processor unit that performs processing, a clock control interface unit 10 that sends control signals to the clock control unit 7, and a diagnostic bus interface unit 11 that controls an interface for diagnosing each unit. . The diagnostic processing unit 8 connects to the arithmetic processing unit 2 via the diagnostic bus.
．． 3, main storage unit 4, system control unit 5, and input/output processing unit 6
It is connected to the system and detects failures in each part and collects failure data.

The clock control section 7 controls the clock supplied to each section, and can apply a clock margin by changing the frequency of the clock.

Next, the operation of this embodiment will be explained.

When a failure occurs in the arithmetic processing unit 2, the processor unit 9 in the diagnostic processing unit 8 detects the failure via the diagnostic bus. The processor section 9 issues an instruction to the system control section 5 to disconnect the arithmetic processing section 2 in which the fault has occurred. Thereafter, the processor section 9 starts a test program for the arithmetic processing section 2.

If the result of running the test program shows that the fault is a fixed fault, the test program can point out the faulty part. However, in the case of intermittent failure, eggplant 1~
Simply running the program does not reproduce the failure and makes it impossible to pinpoint the failure location.

Therefore, the processor section 9 automatically issues a signal to the clock control section 7 to implement clock margin for the arithmetic processing section 2 in which the failure has occurred. As a result, the arithmetic processing unit 2, which is the faulty part, will run the test program with a clock margin applied, making it easier to reproduce the fault, and automatically pointing out the fault location accurately. It will be possible to do this.

〔Effect of the invention〕

As explained above, the present invention has a configuration in which a test program is executed while automatically applying a clock margin to a faulty part, so even if there is an intermittent fault, the fault location can be accurately and automatically pointed out. This has the effect of allowing maintenance personnel to repair and restore the system immediately after they arrive.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the present invention. 2.3... Arithmetic processing unit, 4... Main storage unit, 5...
System control section, 6... Input/output processing section, 7... Clock control section, 8... Diagnosis processing section, 9... Processor section, 1゜... Clock control interface section, 11.
...Diagnostic bus interface section.

Claims (1)

[Scope of Claims] In a fault diagnosis processing method for an information processing device having a function of executing a test program on a faulty part when a fault occurs, the result of execution of the test program indicates that the fault is an intermittent fault. A fault diagnosis processing method characterized in that execution of the test program is started with a clock margin applied to the faulty part.