JPH01283925A - Element forming method - Google Patents

Abstract

PURPOSE:To obtain minute elements characterized by a simple constitution and large throughputs in the formation of a disk pattern having a very minute pattern, by using a phase shifting mask which imparts the phase difference to neighboring light with respect to the exposure of the very minute pattern, and using a transmitting type mask for the other pattern region. CONSTITUTION:A phase shifting mask is used for the exposure of the very minute pattern of a device, and an ordinary transmitting type mask is used for the exposure of the other pattern. Thus the reduced projection exposure is performed. Namely, the patterns of the object device are divided into two regions; i.e., the closely assembled region of the very minute patterns each having a simple repeating structure and the circuit regions such as control electrodes and wirings having a relatively complicated structure. The shape of the very minute pattern region is relatively simple, and the patterns in this region can be formed by using the reduced projection exposure method using the phase shift mask. Meanwhile, the size of the pattern in the circuit region is larger than the very minute pattern. It is suitable that this pattern is formed by the reduced projection exposure method using the transmitting type mask.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor or superconducting element having an ultrafine pattern with dimensions of 0.2 μm to 0.1 μm or less, and particularly to a method for manufacturing a semiconductor or superconducting device suitable for these devices. The present invention relates to a pattern forming method.

[Conventional technology]

In the production of quantum effect devices such as permable base transistors (hereinafter referred to as PBTs), various quantum well array devices, supermatrix solid-state oscillators, lateral superlattice FETs, and resonant tunneling effect devices, extremely fine lattice-shaped, It is necessary to create a set of striped or dotted patterns. Many of these devices aim at quantum effects, and the pattern period is preferably about 0.1 μm or less.

Conventionally, these elements are EB (electron beam) or FIR (
They have been fabricated by direct writing using a focused ion beam.

Regarding the production of quantum effect devices using EB, see, for example, Solid State Technology, 1985;
October issue, pages 125 to 129 (Solid 5
tate Technology
1985, pp 125-129).

On the other hand, the critical resolution of photolithography using the reduction projection exposure method is proportional to the exposure wavelength and inversely proportional to the numerical aperture of the reduction lens. Currently excimer laser (rF laser, wavelength 248
nm) and a reduction lens with a numerical aperture of 0.4 to 0.5.
．． A thickness of about 3 μm has been achieved. In addition, a reflective optical system with a numerical aperture of 0.5 and an A r F excimer laser (wavelength 193 nm) are used.
There is an example in which 0.13 μm was resolved using the method. (Journal of Vacuum Science and Technology B5 (1), January/February 1987, No. 38
Pages 9 to 390 (J, Vac, Sci, Techn.
ol, B 5 (1).

Jan/Feb 1987. pp389-390)).

By the way, according to the zero phase shift method, which is a phase shift method that improves the resolution limit in the reduction projection exposure method, the resolution limit is twice the diameter when using the exposure method using a normal transmission mask. improves.

Therefore, according to this, it is possible to form a fine pattern of 0.15 μm to 0.1 μm or less.

This phase shift method does not require special exposure equipment, and can be used with conventional transmission masks (
This can be done by simply changing the phase shift mask (reticle) to a phase shift mask (reticle).

Regarding the phase shift method, see, for example, IE; Transactions on Electron Devices, E.D. 31. No. 6 (1984), pp. 753-763 (IEEE.

Trans, Electron Devices,
Vol, ED-31, Nn6 (1984), p
p753-763).

Holography is another method that uses light to form patterns that are below the resolution limit of reduction projection exposure, but this holography requires special exposure equipment and the pattern covers the entire surface of the wafer. Regarding this holographic method, in which the pattern formed on the substrate cannot be aligned with the pattern that already exists on the substrate, for example, in the autumn of 1981, the 45th Annual Meeting of the Japan Society of Applied Physics, lecture schedule. This is discussed on page 242 of the imperial edict.

[Problem to be solved by the invention]

The drawing and production of extremely fine patterns using the above-mentioned EB and FIB requires a large amount of time and is disadvantageous in that it is not economically viable.

On the other hand, with the limited resolution of the reduction projection exposure method, it is extremely difficult to form a pattern of 0.1 μm or less, which is necessary for PBT, quantum effect devices, and the like.

This can be achieved using a phase shift method. However, a weakness of the phase shift method is that it is difficult to deal with complex mask patterns such as actual LSI patterns.

The phase shift method uses a simple line and space pattern (
This is a very effective technique for producing L/S), lattice patterns, dot patterns, etc.

An object of the present invention is to solve the above-mentioned problems in pattern formation of a device having an ultra-fine pattern.

The object of the present invention is to provide a method for forming microscopic elements that is simple, has high throughput, and is highly economical.

[Means to solve the problem]

The above purpose is to use a phase shift mask for exposing the extremely fine pattern area fd (for example, the grid portion of P[37) of the device when forming a pattern of the device;
Exposure of other pattern areas is achieved by reduction projection exposure using a normal transmission mask.

[Operation] The pattern of a device targeted by the present invention is divided into a dense region of extremely fine patterns having a simple repeating structure and a circuit region having a relatively complex structure such as control electrodes and wiring. These two regions may coexist within the same layer in the device manufacturing process, or may exist as separate layers.

The former ultra-fine pattern region is a simple L/S, a dot pattern set, or a lattice pattern, and its size is about 0.1 μm or less, and its shape is also relatively simple. Pattern formation in this area is done using a phase shift mask (reticle)
This is made possible by the reduction projection exposure method using

On the other hand, the dimensions of the pattern in the latter circuit area are larger than the former, and it is suitable to form it by a reduction projection exposure method using a conventional transmission mask (reticle).

When exposing the above two areas separately, it is necessary to align the two areas. Normally, the alignment accuracy must be kept to at least half of the minimum dimension. Therefore, 0.
For a pattern of 1 .mu.m, alignment accuracy of 0.05 .mu.m or less is required, but there is currently no exposure apparatus with such accuracy. However, in the present invention, the alignment accuracy between the two areas is sufficient to be a value guaranteed by a normal exposure apparatus. This is because the ultrafine pattern in the device that is the object of the present invention functions as a whole, and therefore the relative positions of the ultrafine pattern area and the circuit pattern area must be within a predetermined range. The precision of each position is not required to be very precise.

When the two regions are mixed in the same layer, the phase shift mask region and the transmission mask region can be mixed on the -th mask. If this is used, the extremely fine pattern area and the circuit pattern area can be exposed simultaneously using one mask.

However, in this case, there is a risk that poor resolution may occur at the connection between the two areas. That is, when two transparent parts having different phases come into contact, the light intensity decreases there due to interference. This type of pattern arrangement must be avoided.

According to the present invention, since the pattern is exposed by the reduction projection exposure method, i! This can be completed in a much shorter time than methods using direct writing using child beams or focused ion beams.

Furthermore, according to the present invention, an extremely fine pattern can be formed at a desired position within the exposure field without requiring a special exposure device, which is more advantageous than the holography method.

[Example] Example 1 Hereinafter, an example of a method for producing PBT using the present invention will be shown.

First, a W thin film is further formed on the GaAs substrate formed on the carrier collection electrode layer, and a lower organic film/
It consists of a three-layer structure: an intermediate layer inorganic film/an upper layer resist film. A so-called three-layer resist was formed.

The upper layer resist is 0-order using PMMA (polymethyl methacrylate) and PMMA (polymethyl methacrylate) as shown in Figure 1(a).
Exposure was performed using a phase shift reticle having only a very fine L/S in the control electrode area of the BT. Adjacent light transmitting parts in the fine L/S of the phase shift reticle are arranged to invert the phases of the illumination light by 180' with respect to each other. Next, the reticle was replaced with a transmission type reticle having a control electrode peripheral circuit pattern as shown in FIG. 1(b), and exposure was performed.

Exposure of the above two regions is performed continuously by changing only the reticle while the substrate is fixed on the substrate stage of the exposure apparatus. Needless to say, alignment operations are performed for each exposure. Further, the order of exposure for the above two regions is not particularly defined. The light source of the exposure device used was a KrF excimer laser, and the numerical aperture of the optical system was 0.6.
It is.

The time required to expose each of the two reticles in one exposure field was about 5 seconds. On the other hand, when the same pattern was exposed using an electron beam lithography system, the time required for this was about 600 seconds.

Next, the upper layer resist is developed, and as shown in FIG.
An upper resist pattern as shown in Figure 3 was obtained.

This is sequentially etched by reactive ion etching into the intermediate layer,
Transferred to the lower layer. As a result, both an L/S pattern having a rectangular cross-sectional shape with a high aspect ratio in the ultra-fine control electrode pattern region and the peripheral circuit pattern were obtained in the lower organic film.

Using the lower organic layer pattern thus formed as a mask, dry etching of the W film is performed to form a control electrode pattern, and then GaAs is grown on the pattern to embed the control electrode, followed by formation of carrier injection electrodes, wiring, etc. PBT
was created. A transmission mask was used for all exposures other than the control electrode pattern described above. As a result of evaluating the electrical characteristics of the produced PBT, the expected performance was obtained.

Note that FIG. 1 is a schematic plane for explanation and does not necessarily represent the actual layout of transistors. Further, the device structure, substrate material, control electrode material, resist material and process, exposure apparatus, etc. are not limited to those shown in this embodiment, and may be used.

The exposure process of this embodiment can be applied not only to PBT but also to other devices in which a lit-pure ultrafine L/S pattern and peripheral circuits coexist, such as a vertical one-dimensional superlattice FET.

Example 2 In PBT, an extremely fine pattern area and a circuit pattern area coexist in the same layer (control electrode layer), so a reticle with a coexistence of a phase shift mask area and a transmission mask area corresponds to each of the above areas. Can form patterns. A mask for this purpose is shown in FIG. In Example 1, the shape of the control electrode was square as shown in FIG. 1(Q). However, in this method, in order to completely separate the phase shift mask region and the transmission mask region, the phase shift mask region (the second
(within the dotted line in the figure) was placed.

Example 3 An example of a method for manufacturing a supermatrix solid-state oscillation device using the present invention will be described.

A positive resist PMMA was coated on a GaAs substrate, and exposure was performed using a phase shift mask having a set of dot-shaped transparent parts as shown in FIG. After that, develop the third
Resist openings corresponding to each of the transparent parts shown in the figure were obtained. The light-transmitting parts of the phase shift mask are arranged (in a checkered pattern) so as to alternately invert the phase of the illumination light by 180 degrees in both the vertical and horizontal directions.

Note that the phase shift mask may be provided with a finer pattern of transparent parts for phase inversion around each of the dot-shaped transparent parts shown in FIG.

Next, metallization was performed to deposit metal on the resist and the substrate in the openings of the resist, and then the resist was removed and a metal dot matrix was formed on the substrate by a lift-off method. Subsequently, electrodes and the like were formed to manufacture a supermatrix solid-state oscillation device.

Although an example for manufacturing a solid-state oscillator device has been shown here, the resist pattern forming process of this example can be replaced with metallization on a GaAs substrate and can be combined with various other processes to manufacture various devices. can be applied. For example, if a GaA QAs thin film is grown on a GaAs substrate and then patterned using a negative resist and a phase shift mask according to this embodiment, a pattern will be formed corresponding to each of the dot-shaped transparent parts shown in FIG. A resist pattern remains. Using this as a mask, GaA Q As is anisotropically etched and a quantum well matrix can be formed by performing appropriate post-processing. Similarly, application to lateral FET superlattices, resonant tunneling effect transistors, etc. is possible.

Example 4 Another example of the method for manufacturing a supermatrix solid-state oscillation device using the present invention will be described.

The positive resist in Example 3 was replaced with a negative resist, and the exposure process was changed as follows. First, masks A, B, and C as shown in FIG. 4 were prepared. Masks A and B are L/S phase shift masks, with the L/S in each being perpendicular to each other or at different angles with respect to the reference direction. A,
A resist pattern similar to that in Example 3 was obtained by overlapping exposure on the same resist film using three masks B and C. That is, the dot matrix is formed in the L/S overlap portion of masks A and B, and mask C defines the range of the dot matrix region. According to this example, it was possible to make the period of the dot matrix smaller than in Example 3, and moreover, it was possible to make the planar shape of the resist more angular.

It goes without saying that the pattern format 1 of this embodiment can be applied to various devices as in the third embodiment.

〔Effect of the invention〕

As described above, according to the method for manufacturing a semiconductor or superconductor device according to the present invention, in the process of forming a circuit pattern including an ultrafine pattern region consisting of a pattern with a size of about 0.1 μm or less in a quantum effect element or the like, the ultrafine Exposure of the pattern area is performed using a reduction projection exposure method using a phase shift method.
By forming the other circuit patterns independently using a normal exposure method, it is possible to significantly shorten the time required for pattern formation and to reduce the cost of the apparatus.

This makes it possible to improve the economy in mass production of the semiconductor/superconductor elements. Also.

These effects become even more remarkable when the above elements are integrated.

[Brief explanation of the drawing]

1 to 4 are plan views of mask patterns in five embodiments of the present invention. Rice bowl j 圀耀、3 zutōdouhi

Claims (1)

[Claims] 1. A method for forming an element having an ultrafine pattern area using a reduction projection exposure method, which includes a phase shift mask that provides a phase difference between adjacent illumination light for exposure of the ultrafine pattern area. , a method for forming an element, characterized in that a transmission mask is used for each of the other pattern regions. 2. The ultrafine pattern area and other pattern areas are exposed to light on the same resist film separately using at least one phase shift mask and a transmission mask. A method for forming an element according to scope 1. 3. The scope of the present invention is characterized in that the exposure of the extremely fine pattern area and other pattern areas is performed using a mask that includes a phase shift mask area and a transmissive mask area, corresponding to each of the areas. A method for forming the element according to item 1.