JPH01280790A - Display device for television screen - Google Patents

Abstract

PURPOSE:To change the displaying area of a multiple matrix character group which can be displayed on a TV screen as time elapses by controlling a character area by using the processing data of a polarity switching circuit. CONSTITUTION:HSYNC signals are sent to an n-bit-up counter (CT) 1 and the output data of the CT 1 are given to a character generation circuit 16 and a prescribed circuit. At the prescribed circuit character displaying area setting data from a data bus 2 through a CPU are stored in an n-bit register 11. Then the data of the register 11 are given to an n-bit-up counter 12 under the control of VSYNC signals and the data of the counter 12 are sent to the polarity switching circuit 13 so as to change the character displaying area on the TV screen from the bottom to the top. Moreover, the output data of the CT 1 and circuit 13 are sent to a comparator circuit 14 where comparison control is performed for designating the changing direction of the character displaying area and the output is given to a character area control circuit 15. Then data necessary for designating the kind and color of displaying characters and constituting the characters, and the data of the circuit 15 are sent to an output control circuit 10 and a scrolling function is obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a television (hereinafter referred to as TV) screen display, and particularly to a circuit configuration necessary for the screen display.

[Conventional technology]

Figure 3 is a block diagram of the conventionally used @fc circuit configuration.
FIG. 4 is a display function diagram showing the TV screen display function obtained by the circuit configuration.

Next, the operation of the conventional IFi circuit configuration will be described.

First, a horizontal synchronizing signal (hereinafter referred to as H
(referred to as 8YNC signal) f n-bit up counter 1
11 and generates data representing all scan line areas of the screen according to the count amplifier. After that, the output data of the n-focus up counter ill and the central processing unit Tt(
By sending the values of both image position detection data sent from the data bus (2) via the data bus (2) via the CPU (hereinafter referred to as CPU) (not shown) to the vertical position detection circuit +3), the position of the -scanning line, that is, the position of the screen is determined. Vertical position is determined.

In this way, once the vertical position of the screen is determined, the output data of the vertical position detection circuit (3) is sent to the oscillator circuit (4) which produces a clock signal, - a clock signal representing all horizontal positions in the scanning line; The horizontal position of the screen is determined by applying this clock signal and the horizontal position detection data of the data bus (2) via the CPU to the horizontal position detection circuit (5). After determining the vertical and horizontal positions of the screen in this way, the outputs of the vertical position detection circuit (3) and the horizontal position detection circuit (5) are controlled by the timing control circuit (3) and the horizontal position detection circuit (5), respectively.
6), the following circuit sections - screen display data memory (hereinafter referred to as CRTRAM) (7), screen display character memory (hereinafter referred to as CRTROM) (8),
It controls the timing of sending data to the shift register (9). Thereafter, the CRTRAM (7), which stores the designation of the type and color of characters to be displayed on the screen, is loaded with CRTRAM (7) according to the timing controlled by the timing control circuit (6).
PU'! The value of data sent from the data bus (2) via r, which means the designation of the type and color of characters, is included. next,
How much space on the screen should be used to display the characters of the specified type and color? The timing control circuit (6) measures the timing of the CRTROM (8), which stores the dot arrangement pattern necessary for the character structure.
By sending the output data of RAMF7), the ROM contents specified by this data are read out, and the output data (i-timing control circuit (6) controls the timing completely while the shift register (9) VC-time is stored. , by giving this stored data to the output control circuit 00,
The conventional function as shown in FIG. 4, that is, it is possible to instantaneously display or erase a multi-column character group with a fixed character display area.

When the screen display for one field scan is completed, a vertical synchronization signal (hereinafter referred to as VS) that determines one field is sent.
(referred to as YNC), the entire screen display for the next one field scan is performed.

[Problem to be solved by the invention]

As the functionality of information transmission through TV screen displays progresses, the conventional circuit configuration of the VC1 shown in Figure 3 allows characters in multiple rows and columns with a fixed display area to be instantly displayed or erased on the TV screen. Although it is possible to do this, it is insufficient in terms of improving functionality such as screen visibility and visual impression.

This invention was made to solve the problems of the conventional ones as described above, and its purpose is to change the display area of a multi-column character group that can be displayed on a TV screen (C) over time.

[Means for Solving the Problems] A TV screen display device according to the present invention includes an n focus register which is added in parallel to a character generating circuit and which inputs data from an fccPU'e data bus; An n-pit r knob counter that inputs the processing data of the focus register, a polarity switching circuit that inputs the processing data of this n-focus counter, a comparison circuit that inputs the processing data of this polarity switching circuit, and a comparison circuit that inputs the processing data of this comparison circuit. A character area control circuit for input is provided.

[Effect]

The circuit configuration according to the second aspect of the invention can gradually change the display area of a multi-column character group on a TV screen over time.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure is a block diagram of the circuit configuration necessary for the present invention, and FIG. 2 is a display function diagram showing the TV screen display function obtained by the circuit configuration.

Regarding FIG. 1, this 11-way configuration adds an n-bin register q1), an n-bit up counter @, a polarity switching circuit (to), a comparison circuit α4, and a character area control circuit 00 in parallel to the conventional character generation circuit αQ. It is composed of Therefore, the circuit configuration will be explained in detail. First, in FIG. 1, the n-bit amplifier counter 11) is H8YN
It inputs the C signal and the VSYNC signal, and outputs the processed data to the vertical position Tt detection circuit (3) and comparison circuit 04, which are one of the conventional circuit configurations. The n pino l-register U1) inputs the data sent via the data bus (2) via the CP LT k, and outputs the processed data to the fn bit amplifier counter 0 pin. n bit up count @baV8YN
The C signal and the output data of the n-bit register (b) are input manually, and the processed data is output to the polarity switching circuit tta. The polarity switching circuit Sakaki compares the processed data If! Output to I/O. Comparison circuit 0 is the n-focus counter (1)
and the output data of the polarity switching circuit (c) and output the processed data to the character area control circuit (to). The K-shaped area control circuit αG outputs the processed data to the output control circuit 4. The output control circuit αQ manually inputs the output data of the shift register (9) and the double area control circuit (to), which are one of the conventional circuit configurations, and outputs the processed data to display the screen display according to the present invention. I'm getting the functionality. Here, the conventional circuit configuration refers to the character generation circuit vrae configured within the dotted line shown in FIG.
) -CRTROIvH8) -C7Tregis* (9
)'! The circuit configuration is such that the data moves as shown by the arrow in this figure.

Next, the operation will be explained. 'First, in order to create a data table that can represent all scan line areas of the screen, that is, all vertical positions, H! Send the QYNC signal to the 11-bit up counter (1). Thereafter, the output data of the n-bit up circuit [1] is applied to the conventionally used C-type generation circuit 0, and at the same time, the circuit required for an embodiment of the present invention is also applied. So, what is the operation of the circuit required for one embodiment of this invention? Looking at the details, first, a character display area is set via a data bus (2) via a CPU (not shown) and stored in data ir+focus register 0. This straw, n pino) L/data stored in the register Oυ is controlled by the VSYNC signal, and the n-bit ac counter Oa counts and amplifies once per screen.
give to Then, by sending the output data of this n-bit up counter 04 to a polarity switcher that can freely switch between a positive number and its complement, when it is switched to a positive number, the counted up data will be used to display the The character display area can be changed from top to bottom, and when switching to complement, the count is amplified and the data is inverted to count down, and the character display area on the screen can be changed from bottom to top.

Furthermore, by sending the data input by the n-bit analog counter (rl) and the output data of the polarity switching port FMr (li) to the comparison circuit 0→, all 'C' scanning lines on the screen can be changed.
By using this function to perform comparison control to specify whether to change the character display area up or down, and by giving the output to the character area control circuit 0rei, the screen changes as the character display area changes up or down. Controls the position of characters displayed on the screen. Finally, all stored data such as the designation of display character type/exclusion and the dot arrangement pattern necessary for character composition obtained through the conventional character generation circuit OQ and the output data of the character area control port go* are all controlled simultaneously. By sending it to the circuit QO, as shown in Figure 2, characters appear from the top of the screen and disappear from the bottom of the first screen, or
It is now possible to perform operations such as characters appearing from the top and bottom of the screen and disappearing from the middle of the screen, and in this way the display area of characters that can be displayed on the screen changes over time. Here, the function of changing the character display area on the screen over time is called a scroll function.

In addition, in the above embodiment, TV movies such as TV movies, etc.
The present invention is not limited to the above, but can also be applied to other devices capable of displaying screens.

〔Effect of the invention〕

As described above, according to the present invention, there is an n-focus register that inputs data on the data bus all through the CPU, and processing data of the n-focus register? Input n-bit amplifier counter and processing data of this n-bit up counter?
Since it is configured using a polarity switching circuit for input, a comparison circuit for inputting the processing data of this polarity switching circuit, and a character area control circuit for inputting the processing data of this comparison circuit, the TV
The screen can be used like turning the pages of a book, and it not only enhances the functionality of the screen by making it easy to read and visually impressive, but also has product value.

[Brief explanation of the drawing]

FIG. 1 - A block diagram showing the circuit configuration necessary for this invention,
Fig. 2 is a display function diagram showing the TV screen display function obtained by this circuit configuration, Fig. It is a display function diagram showing functions. In the figure, C1) is an n-bit up counter, (2)
is the data bus, (3) is the vertical position detection circuit, (4) is the oscillation circuit, (5) is the horizontal position detection circuit, (6) is the timing control circuit, (?) is the CRTRAM, and (8) is the CRTR.
OM, C9) is a shift register, 00 is an output control circuit,
01) is n focus register, U2 is n focus up counter a3Ii polarity switching circuit, 0 is comparison circuit, (g)
The character area control circuit αe is a character generation circuit constructed within the dotted line in FIG. In the figures, the same reference numerals indicate the same parts or the corresponding parts. Figure 2 Figure 4 Procedural amendment (voluntary) 16 o, 6 serpent 88.も゛? h Mr. Commissioner of the Licensing Agency1, Indication of the case, Patent Application No. 110846/19832,
Title of the invention: Television screen display device 3; Representative Moriya Shiki 4; Agent 5; Claims column of the specification to be amended; and drawings. 6. Contents of amendment (1) The scope of claims in the description will be corrected as shown in the attached sheet. (2) Figure 2 of the inner cylinder of the drawing will be corrected as shown in the attached sheet. 7. List of attached documents (1) One document (two copies) stating the corrected scope of patent claims.
) Corrected drawing (Figure 2) 1 or more Claims Vertical position for inputting the data of the data bus via the central processing unit, the horizontal synchronization signal, and the processing data of the n-bit up counter controlled by the vertical synchronization signal a detection circuit; an oscillation circuit that inputs processing data of the vertical position detection circuit;
a horizontal position detection circuit that inputs the clock signal generated by the oscillation circuit and the output data of the vertical position detection circuit; and a timing control circuit that inputs the processed data of the horizontal position detection circuit and the output data of the vertical position detection circuit. , a screen display data memory that inputs the timing controlled by this timing system@1 circuit and the data of the data bus via the central processing unit, and inputs the processed data of this screen display data memory and the output data of the timing control circuit. A screen display character memory, an n-bit register configured in parallel to a character generation circuit having a shift register for inputting processing data of the screen display character memory and output data of a timing control circuit, and output data of this n-bit register. an n-bit up counter that inputs , a polarity switching circuit that inputs the output data of this n-bit up counter, a comparison circuit that inputs the output data of this polarity switching circuit, and a character area that inputs the output data of this comparison circuit. A television screen display device comprising a control circuit. Figure 2

Claims (1)

[Claims] A vertical position detection circuit that inputs the data on the data bus via the central processing unit and the processing data of an n-bit up counter controlled by a horizontal synchronization signal and a vertical synchronization signal; and a vertical position detection circuit that inputs the processing data of this vertical position detection circuit. an oscillation circuit;
a horizontal position detection circuit that inputs the clock signal generated by the oscillation circuit and the output data of the vertical position detection circuit; and a timing control circuit that inputs the processed data of the horizontal position detection circuit and the output data of the vertical position detection circuit. , a screen display data memory that inputs the timing controlled by this timing control circuit and the data of the data bus via the central processing unit, and a screen display that inputs the processed data of this screen display data memory and the output data of the timing control circuit. an n-bit register configured in parallel to the character generation circuit configured in parallel to the character generation circuit having a character memory and a shift register for inputting processing data of the screen display character memory and output data of the timing control circuit; , an n-bit up counter that inputs the output data of this n-bit register, a polarity switching circuit that inputs the output data of this n-bit up counter, a comparison circuit that inputs the output data of this polarity switching circuit, and this comparison circuit. 1. A television screen display device comprising: a character area circuit for inputting output data of the television screen display device.