JPH01184883A - Resonance tunneling three-pole device - Google Patents

Resonance tunneling three-pole device

Info

Publication number
JPH01184883A
JPH01184883A JP63003718A JP371888A JPH01184883A JP H01184883 A JPH01184883 A JP H01184883A JP 63003718 A JP63003718 A JP 63003718A JP 371888 A JP371888 A JP 371888A JP H01184883 A JPH01184883 A JP H01184883A
Authority
JP
Japan
Prior art keywords
layer
electrode
thin film
well layer
deposited
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63003718A
Other languages
Japanese (ja)
Inventor
Hiroshi Nagata
博 永田
Tomonori Tagami
知紀 田上
Susumu Takahashi
進 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP63003718A priority Critical patent/JPH01184883A/en
Publication of JPH01184883A publication Critical patent/JPH01184883A/en
Pending legal-status Critical Current

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  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Bipolar Transistors (AREA)

Abstract

PURPOSE:To facilitate formation of a control electrode and to minimize base resistance, by providing barrier layers of a semiconductor thin film on the opposite sides of a well layer consisting of a superconducting thin film and providing electrodes in these layers. CONSTITUTION:An n<+>-GaAs layer 10 is deposited on a GaAs substrate 9. An i-Al0.3Ga0.7As layer 11 as a barrier layer, a yttrium-barium-copper oxide film 12 as a well layer and an i-Al0.3Ga0.7As layer 13 as a barrier layer are deposited thereon sequentially in that order. Further, an n<+>-GaAs layer 14 is provided thereon. An SiO2 film 17 is deposited so as to cover all over the surface thereof. An emitter electrode 18, a base electrode 19 and a collector electrode 20 are formed by the lift-off process. Switching operation is performed by applying a voltage to the base electrode 19.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、超伝導体薄膜と半導体薄膜による共鳴トンネ
ル効果を利用した共鳴トンネリング3極装置に係り、特
に超高速スイッチング装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a resonant tunneling triode device that utilizes the resonant tunneling effect of a superconductor thin film and a semiconductor thin film, and particularly relates to an ultrahigh-speed switching device.

〔従来の技術〕[Conventional technology]

従来の装置は、特開昭58−3277号公報に記載のよ
うに、量子力学的トンネル準位を形成する井戸層として
禁制帯幅の狭い半導体薄膜を用いていた。
Conventional devices use a semiconductor thin film with a narrow forbidden band width as a well layer for forming a quantum mechanical tunnel level, as described in Japanese Patent Application Laid-Open No. 58-3277.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

エネルギー帯の2重障壁構造における共鳴トンネリング
効果を利用してスイッチング動作を行う場合、井戸層内
に生じた各共鳴トンネル準位のエネルギー間隔を充分大
きくしなければならない。
When performing a switching operation using the resonant tunneling effect in the double barrier structure of the energy band, the energy interval between each resonant tunnel level generated in the well layer must be made sufficiently large.

そのためには、井戸層の膜厚を50〜100λ程度に薄
くする必要がある。しかし、従来技術のように井戸層を
禁制帯幅の狭い半導体薄膜で形成した場合、この層に制
御電極を設けることが極めて国運である上、非常に大き
なベース抵抗を生じることになる。従来技術は、これら
の点について配慮がなされておらず、実現性の乏しいも
のであった。
For this purpose, it is necessary to reduce the thickness of the well layer to about 50 to 100λ. However, when the well layer is formed of a semiconductor thin film with a narrow forbidden band width as in the prior art, it is extremely important to provide a control electrode in this layer, and a very large base resistance occurs. Conventional techniques do not take these points into consideration and have poor feasibility.

本発明の目的は、制御電極形成が容易であり、ベース抵
抗の極めて小さい共鳴トンネル3極装置を実現すること
にある。
An object of the present invention is to realize a resonant tunnel triode device in which control electrode formation is easy and the base resistance is extremely low.

C課題を解決するための手段〕 上記目的は、従来技術において井戸層に用いられていた
禁制帯幅の狭い半導体薄膜を、第1図のように超伝導薄
膜で置き換えることで達成できる。
Means for Solving Problem C] The above object can be achieved by replacing the semiconductor thin film with a narrow forbidden band width used in the well layer in the prior art with a superconducting thin film as shown in FIG.

〔作用〕[Effect]

井戸層に超伝導薄膜を用いることで、この層に制御電極
(ベース電極)を設けることが極めて容易となり、また
超伝導体の転移温度以下でベース抵抗は零となる。第2
図は本構造の伝導帯のエネルギー準位図であり、超伝導
薄膜で形成した井戸層6にはトンネル準位8が生じてい
る。動作時のエネルギー準位図は第3図のようになるが
、この時、ベース電極に加える電圧によって共鳴状態と
非共鳴状態間を容易にスイッチングすることができ、第
4図のような電流−電圧特性が得られる。
By using a superconducting thin film for the well layer, it is extremely easy to provide a control electrode (base electrode) in this layer, and the base resistance becomes zero below the transition temperature of the superconductor. Second
The figure is an energy level diagram of the conduction band of this structure, and a tunnel level 8 is generated in the well layer 6 formed of a superconducting thin film. The energy level diagram during operation is as shown in Figure 3, but at this time, it is possible to easily switch between the resonant state and the non-resonant state by applying a voltage to the base electrode, and the current - as shown in Figure 4. Voltage characteristics can be obtained.

〔実施例〕〔Example〕

以下、本発明の一実施例を第5図(a)〜第5図(d)
により説明する。
An embodiment of the present invention will be described below as shown in FIGS. 5(a) to 5(d).
This is explained by:

第5図(a):GaAs基板9上にMBE法でn”  
GaAs層10 (キャリア濃度lXl0”c霧−3,
膜厚2000λ)及びi  A Q 0.a Gao、
 ? As1l 11 (膜厚50λ)を成長させた後
、スパッタ法によりイツトリウム・バリウム・銅酸化物
膜12(膜厚60人)を成長させる。更にMBE法によ
りi  A Q 0.3Gao、 7 As層13 (
膜厚50人)及びn ” −G a A s層14 (
キャリア濃度lXl0″Bc11−3.膜厚3000人
)を成長させる。
FIG. 5(a): n'' was deposited on a GaAs substrate 9 by MBE
GaAs layer 10 (carrier concentration lXl0”c fog-3,
film thickness 2000λ) and i A Q 0. a Gao,
? After growing As1l 11 (film thickness: 50λ), a yttrium-barium-copper oxide film 12 (film thickness: 60 nm) is grown by sputtering. Furthermore, by MBE method, i A Q 0.3 Gao, 7 As layer 13 (
film thickness 50 layers) and n''-GaAs layer 14 (
A carrier concentration of 1X10''Bc11-3.A film thickness of 3000 layers is grown.

第5図(b):フォトリソグラフィ技術により、メサ領
域15及び16を形成する。
FIG. 5(b): Mesa regions 15 and 16 are formed by photolithography.

第5図(e):C:VD法によりSiO2膜17(膜厚
4000人)を成長させる。
FIG. 5(e): C: A SiO2 film 17 (thickness: 4000 mm) is grown by the VD method.

第5図(d):通常のりフトオフ法によりエミッタ電極
18.ベース電極19.コレクタ電極20を形成する。
FIG. 5(d): Emitter electrode 18. Base electrode 19. A collector electrode 20 is formed.

電極材料としては A u G e/ W / N i / A uを各々
 (600/100/100/800人)蒸着する。
As electrode materials, A.sub.G e/W/N.sub.i/A.sub.u are deposited in amounts of 600/100/100/800, respectively.

本実施例の共鳴トンネル素子は、イツトリウム・バリウ
ム・銅酸化物の超伝導転移温度92に以下の温度領域で
良好なスイッチング動作を示す。
The resonant tunneling device of this example exhibits good switching operation in the temperature range below the superconducting transition temperature of yttrium-barium-copper oxide, 92.

以上の実施例に於いては、イツトリウム・バリウム・銅
酸化物膜12の代りに、ランタン・バリウム・鋼酸化物
膜あるいはランタン・ストロンチウム・銅酸化物膜を用
いても同様の結果が得られる。
In the above embodiments, similar results can be obtained by using a lanthanum/barium/steel oxide film or a lanthanum/strontium/copper oxide film in place of the yttrium/barium/copper oxide film 12.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、量子力学的トンネル準位を形成する井
戸層に対して容易にベース電極を設けることが可能であ
る。また超伝導体の転移温度以下の温度領域においてベ
ース抵抗が0であることから、本電極により効率よくト
ンネル準位を制御することができ、ピコ秒台のスイッチ
ング速度を得る。
According to the present invention, it is possible to easily provide a base electrode to a well layer forming a quantum mechanical tunnel level. Furthermore, since the base resistance is 0 in the temperature range below the transition temperature of the superconductor, the tunnel level can be efficiently controlled by this electrode, and a switching speed on the order of picoseconds can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による3極3端子装置の概略図、第2図
及び第3図は、各々電圧を印加しない時と印加した時の
伝導帯のエネルギー状態図、第4図は本発明の構造にお
ける共鳴トンネル現象によって得られる電流電圧特性図
、第5図(a)〜第5図(d)は本発明の一実施例の製
造工程断面図である。 l・・・超伝導体薄膜、2・・・半導体薄膜、3・・・
ベース電極、4・・・エミッタ電極、5・・・コレクタ
電極。 6・・・エネルギー井戸層、7・・・エネルギー障壁層
、8・・・量子力学的トンネル準位、 11 ・= i −A Q□、30ao、 ? As層
、!2・・・イツトリウム・バリウム・銅酸化物膜、 13 ”’ i −A Q O,3Gao、t A!1
層、18−・・エミッタ電極、19・・・ベース電極、
20・・・コレクタ電極。 15図 ノ’   L−AL、s眞g、yAs   ’σエミ、
、y彷 〜−ス電、桓 フレフタ′亙誹と
Fig. 1 is a schematic diagram of a three-pole three-terminal device according to the present invention, Figs. 2 and 3 are energy state diagrams of the conduction band when no voltage is applied and when voltage is applied, respectively, and Fig. 4 is a schematic diagram of a three-pole three-terminal device according to the present invention. The current-voltage characteristic diagrams obtained by the resonant tunneling phenomenon in the structure, and FIGS. 5(a) to 5(d) are sectional views of the manufacturing process of an embodiment of the present invention. l...Superconductor thin film, 2...Semiconductor thin film, 3...
Base electrode, 4...emitter electrode, 5...collector electrode. 6...Energy well layer, 7...Energy barrier layer, 8...Quantum mechanical tunnel level, 11 ・= i −A Q□, 30ao, ? As layer! 2... Yttrium/barium/copper oxide film, 13 ''' i -A Q O, 3Gao, t A!1
layer, 18--emitter electrode, 19--base electrode,
20...Collector electrode. Figure 15' L-AL, s Shing, yAs 'σemi,
, y-to-suden, huanfrefta'亙诹 and

Claims (1)

【特許請求の範囲】[Claims] 1、超伝導薄膜による井戸層と、その両側に設けられた
半導体薄膜による障壁層から成るエネルギー帯2重障壁
構造と、当該井戸層及び障壁層に形成された電極を有し
、当該電極に電圧を印加して井戸層中に形成された量子
力学的トンネル準位を制御することを特徴とする共鳴ト
ンネリング3極装置。
1. It has an energy band double barrier structure consisting of a well layer made of a superconducting thin film and a barrier layer made of a semiconductor thin film provided on both sides, and an electrode formed on the well layer and the barrier layer, and a voltage is applied to the electrode. 1. A resonant tunneling triode device characterized in that a quantum mechanical tunnel level formed in a well layer is controlled by applying .
JP63003718A 1988-01-13 1988-01-13 Resonance tunneling three-pole device Pending JPH01184883A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63003718A JPH01184883A (en) 1988-01-13 1988-01-13 Resonance tunneling three-pole device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63003718A JPH01184883A (en) 1988-01-13 1988-01-13 Resonance tunneling three-pole device

Publications (1)

Publication Number Publication Date
JPH01184883A true JPH01184883A (en) 1989-07-24

Family

ID=11565089

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63003718A Pending JPH01184883A (en) 1988-01-13 1988-01-13 Resonance tunneling three-pole device

Country Status (1)

Country Link
JP (1) JPH01184883A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0368182A (en) * 1989-08-07 1991-03-25 Nippon Telegr & Teleph Corp <Ntt> Superconductive transistor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0249234B2 (en) * 1981-11-11 1990-10-29 Toppan Printing Co Ltd KINZOKUSHOKUEZUKEHOHO
JP3117919B2 (en) * 1996-09-26 2000-12-18 川崎製鉄株式会社 Method for controlling finish-out temperature of hot-rolled metal plate and control device for finish-out temperature of hot-rolled metal plate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0249234B2 (en) * 1981-11-11 1990-10-29 Toppan Printing Co Ltd KINZOKUSHOKUEZUKEHOHO
JP3117919B2 (en) * 1996-09-26 2000-12-18 川崎製鉄株式会社 Method for controlling finish-out temperature of hot-rolled metal plate and control device for finish-out temperature of hot-rolled metal plate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0368182A (en) * 1989-08-07 1991-03-25 Nippon Telegr & Teleph Corp <Ntt> Superconductive transistor

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