JPH01120849A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH01120849A JPH01120849A JP62279654A JP27965487A JPH01120849A JP H01120849 A JPH01120849 A JP H01120849A JP 62279654 A JP62279654 A JP 62279654A JP 27965487 A JP27965487 A JP 27965487A JP H01120849 A JPH01120849 A JP H01120849A
- Authority
- JP
- Japan
- Prior art keywords
- film
- insulating film
- aluminum
- electrode
- bump
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 14
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 43
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 43
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 13
- 229920005591 polysilicon Polymers 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 9
- 230000002093 peripheral effect Effects 0.000 claims description 5
- 239000000758 substrate Substances 0.000 claims description 5
- 239000000463 material Substances 0.000 abstract description 6
- 230000015556 catabolic process Effects 0.000 abstract 4
- 239000000470 constituent Substances 0.000 description 4
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- QGVYLCICHZYPJA-UHFFFAOYSA-N [Cr].[Cu].[Au] Chemical compound [Cr].[Cu].[Au] QGVYLCICHZYPJA-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
Landscapes
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置に於けるバンプ1陽構造に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a single bump structure in a semiconductor device.
従来の半導体装置に於ける一般的なバンプ電極構造は、
アルミニウム電極下の構成膜J−が平担であり、且つ、
バンプ電極層がアルミニウム電極上面中央部且つアルミ
ニウム電極周辺部上に設けられた絶縁膜上に延在して設
けられている為、アルミニウム電極中央部とアルミニウ
ム電極周辺部上の絶縁膜との段差が、バンプ電極形成時
にパターニングされ、バンプ電極層上面が凹状構造とな
っている。The general bump electrode structure in conventional semiconductor devices is
The constituent film J- under the aluminum electrode is flat, and
Since the bump electrode layer is provided extending over the insulating film provided on the central part of the upper surface of the aluminum electrode and the peripheral part of the aluminum electrode, there is a difference in level between the central part of the aluminum electrode and the insulating film on the peripheral part of the aluminum electrode. , the upper surface of the bump electrode layer has a concave structure, which is patterned during the formation of the bump electrode.
この様に従来のバンプ電極構造に於ては、バンプ電極ノ
ー上面が凹状構造となっている為、バンプ実装に於て、
対向する基板側のボンディング用フィンガーがバンプ電
極ノー上面の外周部に接触する状態となり、バンプ電極
とボンディングフィンガーとの接触面積が十分にとれな
いことによる密着性不良の問題がある。更に実装時に於
けるボンディングフィンガーからの熱及び圧力のストレ
スがバンプ電極層外周部に極部的に集中する為、バンプ
電極下の構成材料の破壊をもたらすといった問題がある
。In this way, in the conventional bump electrode structure, the upper surface of the bump electrode has a concave structure, so when mounting the bump,
The bonding finger on the opposing substrate side comes into contact with the outer periphery of the upper surface of the bump electrode, and there is a problem of poor adhesion due to insufficient contact area between the bump electrode and the bonding finger. Furthermore, there is a problem in that heat and pressure stress from the bonding fingers during mounting is locally concentrated on the outer periphery of the bump electrode layer, resulting in destruction of the constituent material under the bump electrode.
本発明は、この様な問題点を解決するもので、その目的
とするところは、アルミニウム電極下にアルミニウム膜
又は絶縁膜、又はポリシリコン膜、又はアルミニウム、
絶縁膜、ポリシリコン等で構成される積層膜から成る島
状膜を設けることにより、アルミニウム電極膜上面を凸
状とし、この中央突起部周辺のアルミニウム電極膜上に
絶縁膜を設けることで問題となるバンプ電極層下の段差
を相殺し、バンプ電極層上面部の平担化(1′4造をも
たらすものであり、本構造により実装時のバンプ電極と
ボンディングフィンガーとの接触面積を増加させ密着強
度の大幅な向上を提供するとともに、実装時のバンプへ
の熱及び圧力ストレスが均一にかかる構造とすることで
、バンプ′屯種下の構成材料の破壊防止を提供すること
にある。The present invention is intended to solve these problems, and its purpose is to provide an aluminum film, an insulating film, a polysilicon film, or an aluminum film under an aluminum electrode.
By providing an island-like film made of a laminated film made of an insulating film, polysilicon, etc., the upper surface of the aluminum electrode film is made convex, and by providing an insulating film on the aluminum electrode film around this central protrusion, the problem can be solved. This structure offsets the level difference under the bump electrode layer and makes the upper surface of the bump electrode layer flat (1'4 structure).This structure increases the contact area between the bump electrode and bonding finger during mounting, making it possible to achieve close contact. The purpose of the present invention is to provide a structure in which not only the strength is greatly improved, but also heat and pressure stress is evenly applied to the bump during mounting, thereby preventing the constituent materials under the bump from being destroyed.
本発明の半導体装置は、
(リ 半導体基板上に設けられた第1の絶縁膜と、該第
1の絶縁膜上に設けられた、例えばアルミニウム膜、又
は絶縁膜、又はポリシリコン膜又はアルミニウム、絶縁
膜、ポリシリコン等で構成する積層膜から成る第1の島
状膜と、該第1の絶縁膜上、且つ、該第1の島状膜上に
延在して設けられたアルミニウム電極と、該島状膜領域
の外側に近接し、該アルミニウム電極の上面周辺部より
該第1の絶縁膜に延在して設けられた第2の絶縁膜と、
該第2の絶縁膜上より、該アルミニウム電極上面中央部
に延在して設けられた第1の金属膜層と、該第1の金属
膜層上に設けられたバンプ電極層とを有することを特徴
とする。The semiconductor device of the present invention includes: (i) a first insulating film provided on a semiconductor substrate; for example, an aluminum film, an insulating film, a polysilicon film, or an aluminum film provided on the first insulating film; a first island-like film made of a laminated film made of an insulating film, polysilicon, etc.; and an aluminum electrode provided extending over the first insulating film and on the first island-like film. , a second insulating film provided close to the outside of the island-shaped film region and extending from a peripheral portion of the upper surface of the aluminum electrode to the first insulating film;
A first metal film layer extending from above the second insulating film to the center of the upper surface of the aluminum electrode, and a bump electrode layer provided on the first metal film layer. It is characterized by
(2) 半導体基板上に設けられた第1の絶縁膜と該
第1の絶縁膜上に設けられた、例えばアルミニウム膜、
又は絶縁膜、又はポリシリコン膜、又はアルミニウム、
絶縁膜、ポリシリコン等で構成する積層膜から成る第1
の島状膜と、該第1の絶縁膜上より、該第1の島状膜上
に延在して設けられた第2の絶縁膜と、該第2の絶縁膜
上に設けられたアルミニウム電極と、該第1の島状膜領
域の外側に近接し該アルミニウム電極の上面周辺部より
該第2の絶縁膜に延在して設げられた第3の絶縁膜と、
該第3の絶縁膜上より、該アルミニウム電極上面中央部
に延在して設けられた第1の金属膜層と、該第1の金属
膜層上に設けられたバンプ電極層とを有することを特徴
とする。(2) A first insulating film provided on a semiconductor substrate and, for example, an aluminum film provided on the first insulating film,
or insulating film, or polysilicon film, or aluminum,
The first layer is made of a laminated film composed of an insulating film, polysilicon, etc.
an island-like film, a second insulating film extending from above the first insulating film onto the first island-like film, and an aluminum film provided on the second insulating film. an electrode; a third insulating film provided close to the outside of the first island-shaped film region and extending from the upper surface peripheral portion of the aluminum electrode to the second insulating film;
A first metal film layer extending from above the third insulating film to the center of the upper surface of the aluminum electrode, and a bump electrode layer provided on the first metal film layer. It is characterized by
以下、本発明について実施例に基づき詳細に説明する。 Hereinafter, the present invention will be described in detail based on examples.
第1図は、絶縁膜2上にアルミニウム膜7を島状に設け
、アルミニウム電極3を、アルミニウム膜7上及び周辺
の絶縁膜2上に設け、上面が凸状となったアルミニウム
電極3の突起部周辺に絶縁wI44を設けることにより
、バンプ電極6の領域下に毅ける°、アルミニウム電極
3の中央突起部上面及び絶縁膜4上面の段差を無くし、
バンプ″f&極6の上面平担化をはかった一実施例であ
る。FIG. 1 shows an aluminum film 7 provided in an island shape on an insulating film 2, an aluminum electrode 3 provided on the aluminum film 7 and the surrounding insulating film 2, and a protrusion of the aluminum electrode 3 having a convex upper surface. By providing an insulating layer 44 around the area of the bump electrode 6, the step between the upper surface of the central protrusion of the aluminum electrode 3 and the upper surface of the insulating film 4 can be eliminated.
This is an example in which the upper surface of the bump "f&pole 6 is flattened."
第2図は、絶縁膜1上に、絶縁膜−ポリシリコン膜の島
状積層膜7を形成した第1図と同内容の一実施例である
。FIG. 2 shows an example of the same content as FIG. 1, in which an island-like laminated film 7 of an insulating film and a polysilicon film is formed on the insulating film 1.
第1図、第2図ともに設けた島状膜は、半導体製造工程
に於て形成される材料を用いることで何ら形成上のコス
トアップにはつながらない。The island-like films provided in both FIGS. 1 and 2 do not lead to any increase in manufacturing costs because they are made of materials formed in the semiconductor manufacturing process.
第3図は、本発明のバンプ電極構造に於ける実装、状態
を示した実施例である。FIG. 3 is an embodiment showing the mounting and state of the bump electrode structure of the present invention.
第4図は、従来のバンプ電極構造を示す。FIG. 4 shows a conventional bump electrode structure.
第5図は、従来のバンプ電極構造に於ける実装状態を示
す。FIG. 5 shows a mounting state of a conventional bump electrode structure.
上述の如く、本発明によれば、バンプ電極上面の平担化
講造をとることができ、実装時のバンプ電極と実装ボン
ディングフィンガーとの接触面積増加による密着強度の
大幅な向上をもたらすとともに、実装時の熱及び圧力ス
トレスに対するバンプ下構成材料の破壊防止をもたらす
ものである。As described above, according to the present invention, it is possible to flatten the upper surface of the bump electrode, thereby significantly improving the adhesion strength by increasing the contact area between the bump electrode and the mounting bonding finger during mounting. This prevents the constituent material under the bump from being destroyed by heat and pressure stress during mounting.
第1図、第2図は、本発明の半導体装置であるバンプ電
極構造断面図。
第3図は、本発明のバンプ電極構造の半導体装置を実装
した時の構造断面図。
第4図は、従来のバンプ電極構造断面図。
第5図は、従来のバンプ電極構造の半導体装置を実装し
た時の構造断面図。
1.2.4・・・・・・・・・Sin、、SiN 等
の絶縁膜3・・・・・・・・・アルミニウム電極5・・
・・・・・・・チタン−白金−金、クロム−銅−金。
チタン−パラジウム−金 等の金属膜
層
6・・・・・・・・・バンプ電極
7・・・・・・・・・アルミニウム膜又は絶縁膜、又は
ポリシリコン膜又は、アルミニウム、絶縁
膜、ポリシリコン 等で構成する積層
膜から成る島状膜FIGS. 1 and 2 are cross-sectional views of bump electrode structures of the semiconductor device of the present invention. FIG. 3 is a cross-sectional view of the structure when the semiconductor device having the bump electrode structure of the present invention is mounted. FIG. 4 is a sectional view of a conventional bump electrode structure. FIG. 5 is a structural cross-sectional view when a semiconductor device with a conventional bump electrode structure is mounted. 1.2.4 Insulating film 3 such as Sin, SiN etc. Aluminum electrode 5
・・・・・・Titanium-platinum-gold, chromium-copper-gold. Metal film layer 6 such as titanium-palladium-gold...Bump electrode 7...Aluminum film or insulating film, or polysilicon film or aluminum, insulating film, polysilicon film, etc. An island-like film made of laminated films made of silicon, etc.
Claims (2)
1の絶縁膜上に設けられた、例えばアルミニウム膜、又
は絶縁膜、又はポリシリコン膜又はアルミニウム、絶縁
膜、ポリシリコン等で構成する積層膜から成る第1の島
状膜と、該第1の絶縁膜上且つ、該第1の島状膜上に延
在して設けられたアルミニウム電極と、該島状膜領域の
外側に近接し、該アルミニウム電極の上面周辺部より該
第1の絶縁膜に延在して設けられた第2の絶縁膜と、該
第2の絶縁膜上より、該アルミニウム電極上面中央部に
延在して設けられた第1の金属膜層と、該第1の金属膜
層上に設けられたバンプ電極層とを有することを特徴と
する半導体装置。(1) A first insulating film provided on a semiconductor substrate, and a film provided on the first insulating film, such as an aluminum film, an insulating film, a polysilicon film, or aluminum, an insulating film, polysilicon, etc. a first island-like film made of a laminated film consisting of; an aluminum electrode provided on the first insulating film and extending over the first island-like film; a second insulating film provided close to the outside and extending from the periphery of the upper surface of the aluminum electrode to the first insulating film; A semiconductor device comprising: a first metal film layer extending in an extended manner; and a bump electrode layer provided on the first metal film layer.
の絶縁膜上に設けられた、例えばアルミニウム膜、又は
絶縁膜、又はポリシリコン膜、又はアルミニウム、絶縁
膜、ポリシリコン等で構成する積層膜から成る第1の島
状膜と、該第1の絶縁膜上より、該第1の島状膜上に延
在して設けられた第2の絶縁膜と、該第2の絶縁膜上に
設けられたアルミニウム電極と、該第1の島状膜領域の
外側に近接し該アルミニウム電極の上面周辺部より該第
2の絶縁膜に延在して設けられた第5の絶縁膜と、該第
3の絶縁膜上より、該アルミニウム電極上面中央部に延
在して設けられた第1の金属膜層と、該第1の金属膜層
上に設けられたバンプ電極層とを有することを特徴とす
る半導体装置。(2) a first insulating film provided on a semiconductor substrate;
a first island-like film formed of, for example, an aluminum film, an insulating film, a polysilicon film, or a laminated film composed of aluminum, an insulating film, polysilicon, etc., provided on the insulating film; a second insulating film extending over the first island-like film from above the insulating film; an aluminum electrode provided on the second insulating film; and the first island-like film. A fifth insulating film is provided close to the outside of the region and extends from the peripheral part of the upper surface of the aluminum electrode to the second insulating film, and from above the third insulating film, the central part of the upper surface of the aluminum electrode What is claimed is: 1. A semiconductor device comprising: a first metal film layer extending from the bottom; and a bump electrode layer provided on the first metal film layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62279654A JPH01120849A (en) | 1987-11-05 | 1987-11-05 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62279654A JPH01120849A (en) | 1987-11-05 | 1987-11-05 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01120849A true JPH01120849A (en) | 1989-05-12 |
Family
ID=17613993
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62279654A Pending JPH01120849A (en) | 1987-11-05 | 1987-11-05 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01120849A (en) |
-
1987
- 1987-11-05 JP JP62279654A patent/JPH01120849A/en active Pending
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