JP5966918B2 - Self-excited oscillation class D amplifier - Google Patents

Description

  The present invention relates to a self-excited oscillation type class D amplifier that amplifies and outputs an analog signal such as an audio signal.

  Class D amplifiers include a separately excited oscillation type and a self-excited oscillation type. The self-excited oscillation type has a characteristic that the circuit configuration is simple compared to the separately excited oscillation type, and further, the feedback amount at an audible frequency can be increased, so that the audio performance is excellent. Conventionally, as this type of self-excited oscillation type class D amplifier, for example, one disclosed in Patent Document 1 is known. The class D amplifier of Patent Document 1 converts an input analog audio signal into a PWM signal (pulse width modulation signal) with a comparator, and controls the on / off of the switch circuit with the PWM signal and is output from the switch circuit. A load such as a speaker is driven by demodulating the PWM signal into an analog sound signal with a low-pass filter and outputting the analog sound signal. This class D amplifier self-oscillates by a self-excited oscillation loop that feeds back an acoustic output signal that drives a load such as a speaker to an input stage.

  However, in the self-excited oscillation type class D amplifier, the self-excited oscillation frequency changes depending on the usage environment (temperature, power supply voltage fluctuation, etc.), aging, and the like. Further, when there is a variation in the value of capacitance or the like in the internal circuit of the self-excited oscillation type class D amplifier, the self-excited oscillation frequency is also different. Therefore, in the case of a self-excited oscillation type class D amplifier, if a plurality of units are installed relatively close to each other for sound output of a plurality of channels, beat sounds (beats) are likely to occur. Therefore, conventionally, various methods for stabilizing the oscillation frequency of the self-excited oscillation type class D amplifier have been proposed (for example, Patent Documents 2 to 5).

JP 2009-239504 A (FIG. 1, paragraph 0023) Japanese Patent Laid-Open No. 52-112260 (FIG. 3) JP 2005-523631 A Japanese Patent Laying-Open No. 2005-269580 (FIG. 1) Japanese Patent No. 336667 (FIG. 2)

  On the other hand, the present applicant has previously proposed a self-excited oscillation type class D amplifier that can stabilize the self-excited oscillation frequency by a method different from those of Patent Documents 2 to 5 (Japanese Patent Application No. 2012-239612). . The self-excited oscillation type class D amplifier according to this proposal incorporates a self-excited oscillation signal (PWM signal) generated in the self-excited oscillation loop into a PLL (Phase Locked Loop) and synchronizes the self-excited oscillation frequency with the frequency of the basic clock. Is to control. For this reason, in this self-excited oscillation type class D amplifier, a delay circuit for delaying the self-excited oscillation signal is inserted in the self-excited oscillation loop, and the delay circuit depends on the phase difference between the self-excited oscillation signal and the basic clock. A configuration is employed in which the delay amount is variable.

  However, according to the present inventors' diligent investigation, when adopting a configuration in which the self-excited oscillation frequency is controlled to be synchronized with the frequency of the basic clock, it is more possible to take measures against clipping of the acoustic output signal. The knowledge that it is preferable was obtained. That is, when the input signal level increases, the duty ratio of the self-excited oscillation signal (PWM signal) becomes 100% or 0%, and the sound output signal clips, the self-excited oscillation stops and the self-excited oscillation frequency becomes descend. For this reason, the control by the PLL works to increase the self-excited oscillation frequency by reducing the delay amount of the delay circuit. In this case, since the delay amount of the delay circuit gradually decreases during the clip period of the sound output signal, the clipping is canceled and the self-excited oscillation signal is restored from the duty ratio of 100% or 0% to the normal PWM signal. The self-excited oscillation loop comes to self-oscillate at a frequency considerably higher than the frequency of the basic clock. At this time, the output stage switch circuit that performs the on / off operation based on the self-excited oscillation signal performs a switching operation at an unexpectedly high frequency, resulting in excessive switching loss. Therefore, it is preferable to reduce the switching loss immediately after the sound output signal clip is eliminated and the self-excited oscillation signal is restored, and to protect the switching element provided in the output stage.

  Here, as described above, the problem that the switching loss increases immediately after returning from the clip of the sound output signal is that the self-excited oscillation signal is taken into the PLL and the self-excited oscillation frequency is synchronized with the frequency of the basic clock. This is a new problem that occurs when a configuration to be controlled is employed.

  Therefore, in order to solve the new problem, an object of the present invention is to provide a self-excited oscillation type class D amplifier that can reduce switching loss and protect a switching element after returning from a clip.

  In order to achieve the above object, a first self-excited oscillation type class D amplifier according to the present invention includes a basic oscillator that outputs a basic signal having a fundamental frequency, and a self-excited oscillation loop. A self-excited oscillation type class D amplifier circuit that drives a load by an excitation oscillation signal, compares the self-excitation oscillation signal with a basic signal, and generates a control signal that synchronizes the self-excitation oscillation frequency of the self-excitation oscillation signal with the basic frequency. The control signal generating means is inserted in the self-excited oscillation loop, and the delay time of the self-excited oscillation signal is changed according to the control signal so that the self-excited oscillation frequency follows the basic frequency and is synchronized with the basic frequency. The self-excited oscillation signal delay means and the self-excited oscillation frequency are monitored, and when the self-excited oscillation is stopped, the control signal generated by the control signal generating means is held and the self-excited oscillation is resumed. Detected In timing, a configuration and a self-oscillation frequency monitoring means for operating the self-oscillation signal delay means back to the variable state from the holding state holding value of the control signal. According to such a configuration, when the self-excited oscillation in the self-excited oscillation loop is detected as a clip, when the self-excited oscillation resumes after returning from the clip, the control held at the time of detecting the clip Since the self-oscillation signal delay means is operated using the signal, it is possible to prevent the self-oscillation loop from self-oscillating at a frequency higher than the fundamental frequency immediately after returning from the clip.

  Further, the second self-excited oscillation type class D amplifier has the above-described first configuration, in which the self-excited oscillation frequency monitoring unit detects at least two times the rising edge or the falling edge of the basic signal. When the phase inversion of the self-excited oscillation signal is not detected, the self-excited oscillation is detected to be stopped.

  In the third self-excited oscillation type class D amplifier according to the second configuration, the self-excited oscillation frequency monitoring means holds the control signal and then detects the phase inversion of the self-excited oscillation signal. In this configuration, it is detected that the excitation oscillation has resumed.

  Further, in the fourth self-excited oscillation type class D amplifier, in any of the first to third configurations, the control signal generating means is based on a comparison result between the self-excited oscillation signal and the basic signal. And a loop filter that generates a voltage corresponding to the frequency, period or phase shift of the basic signal and outputs the voltage as a control signal to the self-oscillation signal delay means. The voltage in the loop filter is held in an invariable state at the timing when the stopped state is detected, and the frequency and period of the self-excited oscillation signal and basic signal are detected at the timing at which the self-excited oscillation is resumed at the timing detected. Or it is the structure characterized by permitting changing according to the shift | offset | difference of a phase.

  According to the present invention, when the self-excited oscillation is stopped, the control signal is held, and when the self-excited oscillation is resumed, the operation of controlling the delay time of the self-excited oscillation signal is resumed using the held control signal. For example, after the self-excited oscillation is resumed after returning from the clip, oscillation at an abnormally high frequency is prevented, so that the switching loss is reduced and the switching element can be protected.

It is a circuit diagram which shows one structural example of a self-excited oscillation class D amplifier. It is a figure which shows one detailed structural example of a delay circuit. It is a figure which shows the relationship between a control signal and the delay amount of a delay circuit. It is a figure which shows an example of the detailed circuit structure of a control signal generation circuit and a self-excited oscillation frequency monitoring part. It is a figure explaining operation | movement of a phase comparator. It is a figure explaining operation | movement of a self-excited oscillation frequency monitoring part. It is a figure which shows an example of the control signal output from a loop filter before and after the clip of a self-excited oscillation signal is detected.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a circuit diagram showing a configuration example of a self-excited oscillation type class D amplifier 1 according to an embodiment of the present invention. The self-excited oscillation type class D amplifier 1 includes a self-excited oscillation type class D amplifier circuit 10 that inputs an analog audio signal and drives a speaker 22 serving as a load. The class D amplifier circuit 10 has a self-excited oscillation loop 11 and drives the speaker 22 by a self-excited oscillation signal (PWM signal) in the self-excited oscillation loop 11. That is, the class D amplifier circuit 10 includes a comparator 12, a delay circuit 13, an output circuit 14, a low-pass filter 18, and a feedback circuit 23. The comparator 12, the delay circuit 13, the output circuit 14, and the low-pass filter The self-excited oscillation loop 11 is formed by the forward path constituted by 18 and the feedback path inputted from the low-pass filter 18 via the feedback circuit 23 to the comparator 12.

  The comparator 12 inputs an audio signal and a feedback signal to which a signal output to the speaker 22 is fed back via a feedback circuit 23 composed of resistors 24 and 25, and 2 depending on the level of both signal levels. A self-excited oscillation signal (a PWM signal obtained by pulse-modulating an audio signal) that changes to a value is output. This self-excited oscillation signal is input to a delay circuit 13 configured as self-excited oscillation signal delay means, and is input to the output circuit 14 after being delayed based on the delay amount (delay time) adjusted by the delay circuit 13. To do. The output circuit 14 includes a driver circuit 15 and switching elements 16 and 17 formed of power MOS transistors. The driver circuit 15 individually switches and drives the two switching elements 16 and 17 based on the self-excited oscillation signal output from the delay circuit 13, so that the self-excited oscillation signal is connected to the switching elements 16 and 17. The power is amplified with the power supply voltage and output. The self-excited oscillation signal that has been amplified in power is demodulated into an analog audio signal by a low-pass filter 18 including a coil 19 and a capacitor 20, and is output from an output terminal 21 to a speaker 22. The demodulated analog audio signal is input to the feedback circuit 23 provided in the feedback path as described above, and is input to the comparator 12 as a feedback signal divided by the resistors 24 and 25. The audio signal output to the speaker 22 is, for example, a signal of 0 V when the duty ratio of the self-excited oscillation signal is 50%, and is stretched to a positive power supply voltage connected to the switching element 16 when the duty ratio is 100%. When the duty ratio is 0%, the signal is in a state of being attached to the negative power supply voltage connected to the switching element 17 (the clip state).

  Such a self-excited oscillation loop 11 is negative feedback in the audible frequency band, but at a frequency sufficiently higher than the audible frequency band (for example, several hundred kHz), phase rotation of the feedback signal with respect to the input signal occurs, and phase rotation occurs. Self-oscillates with positive feedback at a frequency of 180 °. The delay circuit 13 inserted in the self-excited oscillation loop 11 changes the delay amount of the self-excited oscillation signal, thereby changing the frequency at which the phase rotation of the feedback signal becomes 180 °. The excitation oscillation frequency changes. Therefore, the self-oscillation frequency of the self-oscillation signal can be controlled by adjusting the delay amount in the delay circuit 13.

  The self-excited oscillation type class D amplifier 1 receives a self-excited oscillation signal output from the delay circuit 13 and a basic signal (clock signal) having a basic frequency (about several hundred kHz) output from the basic oscillator 30. A control signal generation circuit 31 is provided for comparing these, generating a control signal Vcnt for synchronizing the self-excited oscillation frequency of the self-excited oscillation signal with the fundamental frequency, and outputting the control signal Vcnt to the delay circuit 13. The control signal generation circuit 31 constitutes a PLL (Phase Locked Loop) in which the above-described self-excited oscillation type class D amplifier circuit 10 is a VCO (Voltage Controlled Oscillator), and includes a phase comparator 32 and a charge pump 33. And a loop filter 34.

  The phase comparator 32 compares the phase of the self-excited oscillation signal output from the delay circuit 13 with the basic signal, and outputs a pulse signal having a pulse width (duty ratio) corresponding to the phase difference. The charge pump 33 generates a pulsed voltage for charging the loop filter 34 based on the pulse signal output from the phase comparator 32. The loop filter 34 averages the pulse voltage output from the charge pump 33 and outputs a voltage corresponding to the phase difference between the self-excited oscillation signal and the basic signal as the control signal Vcnt. The control signal Vcnt is output to the delay circuit 13 as a signal for adjusting the delay amount of the self-excited oscillation signal. That is, the delay amount in the delay circuit 13 is controlled by the control signal Vcnt so that the self-excited oscillation frequency of the self-excited oscillation signal output from the delay circuit 13 follows the basic frequency of the basic signal.

  Furthermore, the self-excited oscillation type class D amplifier 1 monitors the self-excited oscillation signal output from the delay circuit 13, and the self-excited oscillation is generated when the duty ratio of the self-excited oscillation signal (PWM signal) is 100% or 0%. A self-oscillation frequency monitoring unit 35 that detects a stopped state as a clip is provided. The self-excited oscillation frequency monitoring unit 35 inputs and compares the self-excited oscillation signal and the basic signal, and the self-excited oscillation frequency is rapidly decreased from the basic frequency without following the basic frequency of the basic signal. Then, this is detected as a state where the self-excited oscillation is stopped. Then, the self-excited oscillation frequency monitoring unit 35 controls the control signal Vcnt output from the loop filter 34 of the control signal generation circuit 31 during the period of detecting the self-excited oscillation signal clip while the self-excited oscillation is stopped. Is controlled to be kept in a constant state.

  Each part of the self-excited oscillation type class D amplifier 1 will be described in more detail. First, FIG. 2 is a diagram showing a detailed configuration example of the delay circuit 13. The delay circuit 13 shown in FIG. 2 is a binary signal variable delay circuit in which a CMOS inverter 43 in which a gate and a drain of a P-type MOS transistor 41 and an N-type MOS transistor 42 are connected to each other is connected in cascade in a plurality of stages. Configured as The control signal Vcnt output from the loop filter 34 is input to the non-inverting input terminal of the operational amplifier 44 in the delay circuit 13. Since this non-inverting input terminal has an input high impedance, the current from the loop filter 34 does not flow. The operational amplifier 44 operates to turn on the P-type MOS transistor 46 connected to the output terminal so that the potential of the inverting input terminal becomes equal to the control signal Vcnt input to the non-inverting input terminal. Therefore, the potential difference between the both ends of the resistor 45 changes according to the control signal Vcnt, and the current I flowing through the resistor 45 and the P-type MOS transistor 46 changes according to the control signal Vcnt. This current I is equally supplied to each of the plurality of CMOS inverters 43 by a current mirror 48 composed of a plurality of N-type MOS transistors 47 and a current mirror 50 composed of a plurality of P-type MOS transistors 49. . The delay circuit 13 varies the delay time in each CMOS inverter 43 by changing the current of each CMOS inverter 43 in accordance with the control signal Vcnt, and controls the delay amount of the delay circuit 13 as a whole.

  FIG. 3 is a diagram illustrating the relationship between the control signal Vcnt and the delay amount in the delay circuit 13. When the control signal Vcnt applied to the delay circuit 13 is increased, the potential difference between both ends of the resistor 45 is decreased, so that the current flowing through each CMOS inverter 43 is decreased. As a result, the delay time in each CMOS inverter 43 becomes longer, so that the delay amount of the entire delay circuit 13 becomes larger. At this time, the control works in the direction of decreasing the self-excited oscillation frequency of the self-excited oscillation signal. On the contrary, when the control signal Vcnt falls, the current flowing through each CMOS inverter 43 increases, so that the delay time in each CMOS inverter 43 is shortened, and the delay amount of the delay circuit 13 as a whole is reduced. At this time, the control works in the direction of increasing the self-excited oscillation frequency of the self-excited oscillation signal. In this way, the delay circuit 13 varies the delay amount of the delay circuit 13 by the control signal Vcnt, thereby causing the self-excited oscillation signal to follow the basic frequency with the fundamental frequency as the target frequency, and finally. The frequency and phase of the self-excited oscillation signal can be drawn into a state synchronized with the basic signal. As shown in FIG. 3, the control signal Vcnt can be adjusted within a range between a predetermined minimum voltage Vmin and a maximum voltage Vmax, and the delay amount can be varied using the adjustable range as a control range.

  FIG. 4 is a diagram illustrating an example of a detailed circuit configuration of the control signal generation circuit 31 and the self-excited oscillation frequency monitoring unit 35. The phase comparator 32 outputs pulse signals S1 and S2 having a pulse width corresponding to the phase difference between the basic signal and the self-excited oscillation signal to the charge pump 33. That is, as shown in FIG. 5A, when the phase of the self-excited oscillation signal is delayed with respect to the basic signal, the pulse signal S1 starts from “0” only during the period from the rise of the basic signal to the rise of the self-excited oscillation signal. The transition is made to “1”, and the pulse signal S2 remains “0”. As shown in FIG. 5B, when the phase of the self-excited oscillation signal is advanced with respect to the basic signal, the pulse signal S1 remains “0”, and the pulse signal S2 is fundamental from the rising edge of the self-excited oscillation signal. During the period up to the rise of the signal, the transition is made from “0” to “1”, and the pulse signal S2 remains “0”.

  The charge pump 33 includes a switching element 51 connected to the power supply voltage Vd and a switching element 52 connected to the power supply voltage Vs (where Vs <Vd), and a common contact 53 of these switching elements 51 and 52. A pulsed voltage for charging the loop filter 34 is generated. Usually, the potential of the common contact 53 is a value obtained by dividing the power supply voltages Vd and Vs by the resistors 54 and 55. The switching element 51 is turned on while the pulse signal S2 output from the phase comparator 32 is “1”, and the potential of the common contact 53 is set to the power supply voltage Vd. The switching element 52 is turned on during the period when the pulse signal S1 output from the phase comparator 32 is “1”, and the potential of the common contact 53 is set to the power supply voltage Vs. Here, the power supply voltage Vd is a voltage that defines the maximum voltage Vmax of the control signal Vcnt, and the power supply voltage Vs is a voltage that defines the minimum voltage Vmin of the control signal Vcnt. The potential of the common contact 53 is supplied to the loop filter 34 via the switch SW1.

  The switch SW1 is a switch that opens and closes the connection between the charge pump 33 and the loop filter 34. The switch SW1 is controlled to open and close by the self-excited oscillation frequency monitoring unit 35. Specifically, when the self-excited oscillation frequency monitoring unit 35 does not detect the clip of the self-excited oscillation signal, the switch SW1 is closed to connect the charge pump 33 and the loop filter 34, and the charge / discharge of the loop filter 34 is performed. Is done. On the other hand, the switch SW1 is controlled to be in an open state in which the connection between the charge pump 33 and the loop filter 34 is opened while the self-excited oscillation signal clip is detected in the self-excited oscillation frequency monitoring unit 35. The

  The loop filter 34 is a low-pass filter that includes resistors 56 and 57 and capacitors 58 and 59. The loop filter 34 accumulates charges in the capacitors 58 and 59 so as to average the potential of the common contact 53 output from the charge pump 33 when the switch SW1 is in a closed state. At this time, the loop filter 34 generates a voltage corresponding to the phase difference between the self-excited oscillation signal and the basic signal by the electric charges accumulated in the capacitors 58 and 59. The loop filter 34 outputs the voltage to the delay circuit 13 as the control signal Vcnt. When the switch SW1 opens the connection between the charge pump 33 and the loop filter 34, the loop filter 34 holds the voltage immediately before the switch SW1 is opened. That is, when the switch SW1 is in the open state, the charge accumulated in the capacitors 58 and 59 is not discharged, so that the loop filter voltage immediately before is maintained and the control output from the loop filter 34 to the delay circuit 13 is performed. The signal Vcnt becomes invariable.

  The self-excited oscillation frequency monitoring unit 35 is a logic circuit including, for example, four D flip-flops 61, 62, 63, 64, an inverter 65, and a NOR gate 66. The self-excited oscillation frequency monitoring unit 35 detects both a clip state in which the duty ratio of the self-excited oscillation signal is 100% and a clip state in which the duty ratio is 0%. The NOR gate 66 outputs the output signal S5 as “0” when one or both of the input signals S3 and S4 becomes “1”, and otherwise sets the output signal S5 as “1”. Output. The NOR gate 66 controls opening and closing of the switch SW1 with the output signal S5. When the output signal S5 is "1", the switch SW1 is closed, and when the output signal S5 is "0", the switch SW1 is turned on. Open. The self-excited oscillation signal output from the delay circuit 13 is input to the reset terminal R of the D flip-flops 61 and 62. Further, the polarity of the self-excited oscillation signal is inverted by the inverter 65, and the inverted signal is input to the reset terminals R of the D flip-flops 63 and 64. The basic signal output from the basic oscillator 30 is input to the clock terminal CLK of each D flip-flop 61, 62, 63, 64. The data input terminals D of the D flip-flops 61 and 63 are pulled up to a predetermined power supply voltage and always input “1”. The output terminals Q of the D flip-flops 61 and 63 are connected to the data input terminals D of the D flip-flops 62 and 64, respectively. Then, signals S3 and S4 inputted to the NOR gate 66 from the output terminals Q of the D flip-flops 62 and 64 are outputted.

  When the self-excited oscillation frequency monitoring unit 35 having the above configuration does not detect the phase inversion of the self-excited oscillation signal until the rising edge of the basic signal is detected at least twice, One of the signals S3 and S4 transitions from “0” to “1”. For example, as shown in FIG. 6A, after clipping with the duty ratio of the self-excited oscillation signal being 100% at timing T1, the rising edge of the basic signal is detected twice at timings T2 and T3. When the phase of the self-excited oscillation signal is not inverted and the D flip-flops 61 and 62 are not reset, the D flip-flop 62 changes the output signal S3 from “0” to “1”. As shown in FIG. 6B, after the self-excited oscillation signal has a duty ratio of 0% and is clipped at timing T1, the self-oscillation signal is detected while the rising edge of the basic signal is detected twice at timings T2 and T3. When the phase of the excitation oscillation signal is not inverted and the D flip-flops 63 and 64 are not reset, the D flip-flop 64 changes the output signal S4 from “0” to “1”. That is, the self-excited oscillation frequency monitoring unit 35 outputs the self-excited oscillation signal from the D flip-flops 62 and 64 at the timing when it detects that the self-excited oscillation signal has stopped without phase inversion for a certain period. One of the two signals S3 and S4 to be transferred is changed from “0” to “1”. At this time, the NOR gate 66 switches the switch SW1 to the open state by setting the output signal S5 to “0”, and controls the loop filter 34 so that the control signal Vcnt does not change. FIG. 6 illustrates a case where it is determined that the self-excited oscillation signal is clipped if the phase of the self-excited oscillation signal is not reversed while the rising edge of the basic signal is detected twice. The period is not necessarily limited to a period in which the rising of the basic signal is detected twice, and may be a period in which the rising of the basic signal is detected three or more times. Further, instead of detecting the rising edge of the basic signal, the falling edge may be detected.

  When the self-oscillation frequency monitoring unit 35 detects the clip and the switch SW1 is opened, the state is maintained until the self-oscillation signal returns from the clip state and phase inversion occurs. Even in this state, in the control signal generating circuit 31, the phase comparator 32 and the charge pump 33 operate normally, and the self-excited oscillation signal is basically based on the self-excited oscillation signal output from the delay circuit 13. The operation for synchronizing with the signal is continued. For this reason, the phase comparator 32 and the charge pump 33 of the control signal generation circuit 31 reduce the frequency of the self-excited oscillation signal that is a DC signal by reducing the frequency in the clipped state. Reduce the potential. However, since the switch SW1 is in the open state, the potential of the common contact 53 is not output to the loop filter 34, and the control signal Vcnt continues to hold the value immediately before the switch SW1 is opened. Therefore, the delay circuit 13 holds the delay amount immediately before the clip is detected. At this time, the switch SW1 is open and the switching element 52 of the charge pump 33 is turned on. However, since the current flowing through the switching element 52 can be suppressed by the resistor 54, the charge pump 33 operates normally without being damaged. Continue. When the switch SW1 is in the open state, the delay amount of the delay circuit 13 is held in a constant state by the control signal Vcnt.

  Thereafter, when the self-excited oscillation is resumed in the self-excited oscillation loop 11 and the self-excited oscillation signal returns from the clipped state and phase inversion occurs, the D flip-flops 61, 62, 63, and 64 are reset. The output signal S5 of 66 returns to “1”, and the switch SW1 returns to the closed state. Therefore, when the self-excited oscillation signal returns from the clip state and normal self-excited oscillation is resumed, the control signal generation circuit 31 compares the recovered self-excited oscillation signal with the basic signal, and the self-excited oscillation signal. The operation of varying the control signal Vcnt of the loop filter 34 is resumed in order to synchronize the self-excited oscillation frequency with the fundamental frequency. Along with this, the loop filter 34 resumes the control for varying the delay amount of the delay circuit 13 from the value of the control signal Vcnt immediately before the clip is detected.

  FIG. 7 is a diagram illustrating an example of the control signal Vcnt output from the loop filter 34 before and after the clip of the self-excited oscillation signal is detected. In FIG. 7, an example of the control signal Vcnt when the control of the present embodiment is applied is indicated by a solid line L1, and a comparative example when the control of the present embodiment is not applied is indicated by a broken line L2. When the self-excited oscillation signal is not clipped before the timing T10, the control signal Vcnt is self-excited to vary the delay amount of the delay circuit 13 so that the self-excited oscillation frequency of the self-excited oscillation signal follows the fundamental frequency. It fluctuates within the range of the minimum voltage Vmin and the maximum voltage Vmax according to the phase difference between the excitation oscillation signal and the basic signal. When a clip of the self-excited oscillation signal is detected at timing T10, as shown by the solid line L1, in this embodiment, the control signal Vcnt is in an invariable state and continues to hold the value at timing T10. Thereafter, when self-oscillation resumes at timing T11 and returns from the clip, the control signal Vcnt uses the value held during the clip detection period as an initial bias value, and thereafter changes to the phase difference between the self-oscillation signal and the basic signal. It will change again accordingly. Therefore, immediately after returning from the clip (immediately after timing T11), it is possible to variably control the delay amount of the delay circuit 13 by taking over the state before the clip detection, and the self-oscillation frequency is considerably higher than the fundamental frequency. It is possible to prevent self-excited oscillation at a frequency. As a result, the switching elements 16 and 17 provided in the output circuit 14 can be prevented from switching at a high frequency immediately after returning from the clip, so that the switching elements 16 and 17 can be protected.

  On the other hand, when the control of the present embodiment is not applied, when a clip is detected at timing T10, the control signal Vcnt is set to increase the self-excited oscillation frequency of the self-excited oscillation signal as indicated by a broken line L2. It gradually decreases. When the self-excited oscillation resumes at timing T11 and returns from the clip, the control signal Vcnt has decreased from the value immediately before the clip, so that the self-excited oscillation frequency is considerably higher than the fundamental frequency. become. In this case, since the switching elements 16 and 17 provided in the output circuit 14 perform a switching operation at a high frequency, the switching loss increases, and the load applied to each switching element 16 and 17 increases. In the worst case, the switching elements 16 and 17 may be damaged.

  That is, in the self-excited oscillation type class D amplifier 1 of the present embodiment, the self-excited oscillation frequency monitoring unit 35 monitors the self-excited oscillation frequency in the self-excited oscillation loop 11 and detects the state where the self-excited oscillation is stopped. By holding the control signal Vcnt generated in the control signal generating circuit 31 and returning the control signal Vcnt from the holding state to the variable state at the timing when detecting the state where the self-excited oscillation is restarted, the clip is operated. The switching loss immediately after the self-excited oscillation signal is canceled and the switching elements 16 and 17 of the output circuit 14 can be favorably protected can be reduced. When the self-excited oscillation is resumed after returning from the clip, the delay amount control can be minimized by returning the control signal Vcnt immediately before the clip to the variable state and restarting the delay amount control. Therefore, distortion of the self-excited oscillation signal and the like can be reduced, and the self-excited oscillation frequency can be drawn to the fundamental frequency relatively quickly after returning from the clip.

  Further, when the self-excited oscillation signal is clipped at a duty ratio of 100% or 0%, there is no frequency component that causes a beat sound. Therefore, even if the PLL control by the control signal generation circuit 31 is temporarily stopped. No beat sound is generated. Then, during the period when the clip is detected, the PLL control by the control signal generation circuit 31 is temporarily stopped while the control signal Vcnt is held. Since it can be pulled to the fundamental frequency at an early stage, it is possible to suppress the beat sound even immediately after returning from the clip.

  As mentioned above, although one Embodiment of this invention was described, this invention is not limited to what was mentioned above, A various modification is applicable. For example, in the above-described embodiment, the self-excited oscillation frequency monitoring unit 35 has described the circuit example using the flip-flops 61, 62, 63, and 64 in order to detect the self-excited oscillation signal clip. It may be adopted to detect a clip.

  In the above-described embodiment, when the self-excited oscillation frequency monitoring unit 35 detects a clip, the switch SW1 inserted between the charge pump 33 and the loop filter 34 is controlled to be in an open state, thereby outputting from the loop filter 34. A configuration example has been described in which the control signal Vcnt to be held is held in an invariable state. However, the configuration for holding the control signal Vcnt is not limited to this. For example, the value of the control signal Vcnt is temporarily stored in a memory or the like at the timing when the self-excited oscillation frequency monitoring unit 35 detects the clip, and when the clip is restored, the stored value is reset to the control signal Vcnt. Thus, the PLL control may be resumed.

  In the above-described embodiment, a circuit example in which a plurality of CMOS inverters 43 are connected in cascade as an example of the delay circuit 13 has been described. However, the delay circuit 13 only needs to be capable of variably controlling the delay time according to the control signal Vcnt, and is not necessarily limited to the circuit example described above. In the above embodiment, the control signal generation circuit 31 compares the self-excited oscillation signal with the basic signal and detects the phase difference between them. However, in addition to the phase difference, for example, the self-excited oscillation signal and the basic signal are detected. It is also possible to detect a shift in frequency or period between the control signal Vcnt and generate the control signal Vcnt according to the shift. Furthermore, in the above embodiment, the circuit configuration in which the signal output from the output terminal 21 of the low-pass filter 18 to the speaker 22 is fed back to the comparator 12 to form the self-excited oscillation loop 11 has been shown, but the present invention is not limited to this. For example, the self-excited oscillation loop 11 may be configured by guiding a signal output from the output circuit 14 to a feedback path.

  DESCRIPTION OF SYMBOLS 1 ... Self-excited oscillation type class D amplifier, 10 ... Self-excited oscillation type class D amplifier circuit, 11 ... Self-excited oscillation loop, 13 ... Delay circuit (self-excited oscillation signal delay means), 30 ... Basic oscillator, 31 ... Control signal Generating circuit, 34 ... loop filter

Claims (4)

A basic oscillator that outputs a fundamental signal at a fundamental frequency;
A self-excited oscillation type class D amplifier circuit having a self-excited oscillation loop and driving a load by a self-excited oscillation signal in the self-excited oscillation loop;
Control signal generating means for comparing the self-excited oscillation signal with the basic signal and generating a control signal for synchronizing the self-excited oscillation frequency of the self-excited oscillation signal with the basic frequency;
By interpolating in the self-excited oscillation loop and changing the delay time of the self-excited oscillation signal in accordance with the control signal, the self-excited oscillation frequency is made to follow the fundamental frequency and synchronized with the fundamental frequency. Self-oscillation signal delay means;
The timing at which the self-excited oscillation frequency is monitored, the control signal generated by the control signal generating means is held at the timing at which the self-excited oscillation is stopped, and the state at which the self-excited oscillation is resumed is detected. Then, the self-excited oscillation frequency monitoring means for returning the control signal from the holding state to the variable state and operating the self-excited oscillation signal delay means,
A self-excited oscillation type class D amplifier.   The self-excited oscillation frequency monitoring means is configured to detect the self-excited oscillation when the phase inversion of the self-excited oscillation signal is not detected before detecting at least two of the rising edge and the falling edge of the basic signal. 2. The self-excited oscillation type class D amplifier according to claim 1, wherein it is detected that is in a stopped state.   The self-excited oscillation frequency monitoring means detects that the self-excited oscillation has been resumed by detecting phase inversion of the self-excited oscillation signal after holding the control signal. The self-excited oscillation type class D amplifier according to claim 2. The control signal generating means generates a voltage corresponding to a frequency, period, or phase shift between the self-excited oscillation signal and the basic signal based on a comparison result between the self-excited oscillation signal and the basic signal. A loop filter that outputs to the self-oscillation signal delay means as the control signal,
The self-excited oscillation frequency monitoring means holds the voltage in the loop filter in an invariable state at a timing when the self-excited oscillation is stopped, and detects a state in which the self-excited oscillation is restarted. 4. The self-oscillation signal according to claim 1, wherein the voltage in the loop filter is allowed to change according to a frequency, period, or phase shift of the self-excited oscillation signal and the basic signal. Excited oscillation type class D amplifier.

Images