JP5865842B2 - Distortion reduction device - Google Patents

Description

(Related application)
This application is a US Provisional Patent Application No. 61 / 298,112 filed on January 25, 2010, the title of the invention “METHODS AND APPARATUS FOR POWER FACTOR CORRECTION AND REDUCTION OF DISTORTION IN AND NOISE IN A POWER SUPPLY DELIVERY NETWORK”, US Provisional Patent Application No. 61 / 434,250 filed on January 19, 2011, title of invention “POWER FACTOR AND HARMONIC CORRECTION METHODS”, and US Provisional Patent Application No. 61 filed on January 25, 2011 / 435,921, the title of the invention “POWER FACTOR AND HARMONIC CORRECTION METHODS”, US Provisional Patent Application No. 61 / 435,658 filed on January 24, 2011, the name of the invention “AUTOMATIC DETECTION OF APPLIANCES”, US Provisional Patent Application No. 61 / 298,127, filed on January 25, 2010, entitled "AUTOMATIC DETECTION OF APPLIANCES", is granted priority under US Patent Law Section 119 Insist. This application is a continuation-in-part of copending U.S. Patent Application No. 12 / 694,153, filed on January 26, 2010, entitled "POWER FACTOR AND HARMONIC CORRECTION METHODS". The original application claims priority from US Provisional Patent Application No. 61 / 206,051, filed on January 26, 2009, entitled “POWER FACTOR AND HARMONIC CORRECTION METHODS”. This application is also a co-pending US patent application Ser. No. 12 / 694,171, filed Jan. 26, 2010, entitled “ENERGY USAGE MONITORING WITH REMOTE DISPLAY AND AUTOMATIC DETECTION OF APPLIANCE INCLUDING GRAPHICAL USER INTERFACE”. This original application is a US Provisional Patent Application No. 61 / 206,072, filed on January 25, 2009, entitled “ENERGY USAGE MONITORING WITH REMOTE DISPLAY AND AUTOMATIC DETECTION OF APPLIANCE INCLUDING”. GRAPHICAL USER INTERFACE ”and claims the benefit of the priority of US Patent Application No. 12 / XXX, XXX filed on January 25, 2011, agent number RADA-0040. Insist. All of which are hereby incorporated by reference in their entirety for all purposes.

  The present invention relates to power electronics. More particularly, the present invention relates to reducing power distortion and noise supplied to or generated by the load and improving power factor.

  Power factor improvement is an important factor in improving the efficiency of current power supply systems. A phase shift occurs between a current component and a voltage component constituting the power signal due to the influence of an ineffective component of a load that consumes power, for example, a home appliance having a motor. The power factor of an AC power system is defined as the ratio of the active power flowing through the load to the apparent power, and its value is between 0 and 1 (often expressed as a percentage, such as 0.5 pf = 50% pf). ) The active power (P) is the capacity of a circuit that performs work within a specific time. Apparent power (S) is the product of the circuit current and voltage. The reactive power (Q) is defined as the square root of the difference between the square of S and the square of P. When a reactive load exists, for example, when it has a capacitor or a coil, a time difference occurs between the current waveform and the voltage waveform due to the energy being stored in the load. In each cycle of AC voltage, in addition to the energy consumed by the load, excess energy is temporarily stored in the load in an electric or magnetic field, and power is delayed by a fraction of a second of the cycle of AC voltage. Returned to the grid. This “productive” of non-productive power increases the power line current. Thus, a low power factor circuit will use a larger current than a high power factor circuit to deliver a given amount of active power. A linear load does not change the shape of the current waveform, but may change the relative timing (phase) between voltage and current. Typically, methods and apparatus for improving the power factor have connected a fixed correction load having a known invalid value to the power line. A fixed capacitive reactive load counteracts the reactive effect of a load having inductance characteristics and vice versa, thereby improving the power factor of the power line. However, because the power factor can be dynamic due to changes in the nature of the load connected to and disconnected from the power line, a fixed reactive load can only improve the power line power factor by some fixed amount. I can't. For this reason, more recent technical results include several fixed reactive loads that are selectively connected to the power line to improve the power factor. However, such systems require monitoring by an operator who must constantly monitor the power factor to connect and disconnect fixed reactive loads in order to accommodate constantly changing power line power factors.

  Along with changes in the status of electronic devices, other inefficiencies have arisen with regard to power distribution. Further use of personal household appliances increases the use of wall-mounted AC / DC converters to power devices and recharge common items such as laptops, cell phones, cameras and other batteries did. The ubiquity of such items has led users to connect a number of such converters, known as “wall warts”, to the power system. The two most common AC / DC converters are known as linear converters and switching converters. The linear converter uses a step-down converter to step down 120 V power, which is a standard available in a house in the United States, to a desired voltage. The bridge rectifier rectifies this voltage. The bridge rectifier is usually connected to a capacitor. Usually, this capacitor has a large capacity.

  The capacitor forms a back electromotive force. The capacitor forms a voltage close to a DC voltage when charged and discharged. However, the capacitor draws current through the non-linear bridge rectifier for a short period of the AC power supply while charging. As a result, the current waveform does not match the voltage waveform and includes a large harmonic distortion component. Total harmonic distortion (THD) is the sum of the power of all harmonic components relative to the power of the fundamental frequency. Such harmonic distortion affects the power grid.

  Switching power supplies operate on a different principle, which also feeds harmonics into the power distribution network. Typically, switch mode power supplies operate by rectifying the 120V voltage available in homes in the United States. Rectification against back electromotive force, such as a large smoothing capacitor, also adds harmonics and distortion. Also, when various types of linear or switch mode integrated circuits are extensively adapted, the system will generate electrical noise. In addition, the reactive components of the AC network degrade the power factor and, due to the integrated circuit, harmonics and noise will affect the power line. These harmonics appear as harmonic distortion of the current component of the power signal. Since the power network has a non-zero impedance, distortion along the current component can also be converted to amplitude distortion. Amplitude distortion is distortion that occurs in a system, subsystem or instrument when the output amplitude is not a linear function of the input amplitude under certain conditions. Also, other undesirable effects such as power factor distortion and overall reduction in energy transmission are formed. Such effects reduce efficiency and reduce the quality of power distribution. Thus, what is needed is a method and apparatus that not only improves power factor, but also reduces or eliminates power line distortion, thereby enabling maximum efficiency and quality in power distribution. As a result, energy consumption as a whole can be reduced.

  The invention provided here makes it possible to improve the efficiency and quality of the power supply from the power grid to the load. As will be apparent to those skilled in the art, the methods and apparatus described herein apply to a wide variety of loads that have non-linear components that cause suboptimal power factors and cause distortion and noise to be sent back to the power grid. be able to. Depending on the purpose of use, the load is a residential home. The load is a parallel combination of all household appliances that draw power into the house. As the user in the house operates and stops the home appliance, the house looks like a single dynamic load whose reactive nonlinear characteristics change with respect to the power grid via the power meter. Conveniently, the invention provided by this application is inherent in the disadvantages of prior art solutions, such as high cost, complex mounting at multiple locations, and fixed force that compensates upward or downward to reduce power factor. Solve rate improvement compensation, and low performance. The invention provided by the present application can improve the power factor with respect to the load by dynamically measuring the reactive power component of the load and connecting at least one corrected reactive load. When the reactive power changes, for example when the washing machine operates, the invention provided by the present application can recognize that the characteristics of the load have changed, and make other corrections to the load causing the low power factor. Invalid loads can be connected and disconnected. Furthermore, the invention provided by the present application can correct distortion and noise of power supplied to the load by the network, thereby improving power quality. The invention provided by the present application compares an electric signal having distortion or noise with a reference signal. The electrical signal may be a current component of power supplied to the load by the network. The reference signal may be derived from the voltage component of the power supplied to the load, or may be synthesized separately but synchronized with the voltage waveform. The correction signal is derived by comparing or subtracting the reference signal from the distorted electrical signal. The correction signal has distortion. Depending on the correction signal, the distortion is reduced by flowing or flowing a current from the distorted electrical signal. Conveniently, the present invention can correct for the distortion caused by all the non-linear loads in the house at one point. The present invention can be connected between an operator meter and a house. As a result, the present invention does not choose the number of home appliances in the house, the placement of these devices, or any other parameters. The present invention is also energy efficient because it improves strain and power factor as needed without degrading power factor or distortion and without adding any other load within the network of the property.

  In one embodiment of the present invention, a distortion reduction method for reducing distortion of an electric signal having distortion includes the steps of detecting distortion of the electric signal having distortion and mixing the electric signal having distortion in a distortion coefficient. Have. In some embodiments, the sensing step includes comparing the electrical signal having distortion with a reference signal to obtain a differential signal, and scaling the differential signal to generate a coefficient of distortion. The step of mixing includes subtracting the distortion coefficient from the distorted electrical signal when the distortion coefficient is positive, and adding the distorted electrical signal to the distortion coefficient when the distortion coefficient is negative. Have In some embodiments, the subtracting step is applying a distortion coefficient to a first control current source to which the distorted electrical signal is supplied, and the adding step is when the distorted electrical signal is Applying a distortion coefficient to the second control current source supplied. Applying the distortion coefficient to the first control current source further comprises applying a power factor corrected positive power signal to the first control current source, wherein the distortion coefficient is applied to the second control current source. The step of applying to the current source further comprises applying a negative power signal with corrected power factor to the second control current source.

  In some embodiments, the step of mixing comprises modulating a coefficient of distortion. The distortion coefficient is added to an electric signal having distortion when the distortion coefficient is negative, and is subtracted from the electric signal having distortion when the distortion coefficient is positive. The step of adding and subtracting applies the coefficient of distortion to the first switch supplied with the distorted electrical signal and applies the coefficient of distortion to the second switch supplied with the distorted electrical signal. Can be realized. Modulating the coefficient of distortion may include pulse width modulation, delta-sigma modulation, pulse code modulation, pulse density modulation or pulse position modulation. Applying the distortion coefficient to the first switch further comprises applying a power factor corrected positive power signal to the first control current source, wherein the distortion coefficient is applied to the second control current source. Applying to the second control current source further comprises applying a power factor corrected negative power signal to the second control current source. Conveniently, the switch can be controlled very efficiently by using modulation techniques. In some embodiments, the modulation signal can be filtered by providing an analog filter or a digital filter.

  In some applications, the power grid impedance may be much lower than the impedance of the load the power grid is supplying power to. It will be apparent to those skilled in the art that in such situations it may be necessary to reverse the direction of the flowing current or the flowing current. As an example, the negative distortion is regularly corrected by sending current through the power line. However, if the impedance of the load is greater than the impedance of the power grid, current will be sent to the power grid rather than the load. As a result, the opposite function can be performed. As a result, sufficient distortion correction of the total current waveform drawn from the power transmission network is realized.

  In another aspect of the present invention, a distortion reduction method for reducing distortion of a power line includes a step of improving the power factor of the power line so that the power factor is substantially 1, and a current part of the power line is set as a desired reference signal. Comparing and generating a correction signal, and selectively flowing a current to and from the power line according to the correction signal. The step of improving the power factor may be any known power factor improvement method or any method described herein. In some embodiments, selectively flowing in and out of current includes providing a correction signal to at least one control current source, the control current source powering the current source in response to the correction signal. Connect to. Alternatively, selectively flowing in and out of the current comprises modulating the correction signal and supplying the modulation correction signal to at least one switch, the switch connecting the current source to the power line and modulating noise. Filter. The step of modulating the correction signal may be any of pulse width modulation, delta-sigma modulation, pulse code modulation, pulse density modulation, pulse position modulation, and the like.

  In some applications, the power grid impedance may be much lower than the impedance of the load the power grid is supplying power to. It will be apparent to those skilled in the art that in such situations it may be necessary to reverse the direction of the flowing current or the flowing current. As an example, the negative distortion is regularly corrected by sending a current through the power line. However, if the load impedance is greater than the power grid impedance, the current is fed into the power grid rather than the load. As a result, the opposite function is performed. As a result, sufficient distortion correction of the total current waveform drawn from the power transmission network is realized.

  During operation, it reduces the distortion of electrical signals, for example the power supplied to the house. The distortion is harmonic distortion, amplitude distortion, noise, high spectrum noise, or the like. The power supplied to the house is composed of voltage and current. Normally, distortion due to the nonlinearity of the load appears in the current component of the power supplied to the load. Distortion can be ascertained by comparing the current with a complete sine wave, such as the voltage component of power. A perfect sine wave can serve as a reference signal. If the voltage sine wave is not perfect, for example when amplitude distortion is distorting the voltage sine wave, a nearly perfect sine wave can be generated locally by synchronizing to the voltage sine wave. For example, by using a zero crossing transformation as a marker, a nearly perfect sine wave can be generated. A correction signal is generated by subtracting the reference signal from the distorted electrical signal. The correction signal has a distortion coefficient. The positive part of the distortion is added to a current sink that is supplied to a power line that supplies power to the house. The current sink sends current out of the power line in response to distortion. Similarly, the negative portion of distortion is added to a current source that is supplied to a power line that supplies power to the house. When the strain is negative, the current source flows current into the power line in response to the strain. As a result, distortion is removed from the current drawn from the grid.

  In some embodiments, the correction signal may be modulated to increase efficiency. The modulation method is, for example, pulse width modulation, delta-sigma modulation, pulse code modulation, pulse density modulation or pulse position modulation. The modulation correction signal is supplied to an active switch, such as a MOSFFT, that conducts current into or out of a power line that supplies power to the house in response to distortion.

  In some embodiments, the distortion reduction method further comprises correcting the power factor. The dynamic power factor improvement method includes a step of measuring a reactive power of a first load, a step of measuring a power factor obtained from the reactive power, and connecting the first load to a power factor ratio effectively 1 Determining an optimum correction invalid load to be set, and connecting the optimum correction invalid load to the first load.

  In some embodiments, connecting the optimal corrected reactive load to the first load includes selecting a desired level of quantization with MSB and LSB, and determining an MSB reactive load. A switch for electrically connecting one of the MSB reactive load and the LSB reactive load to the first load, the bit required to achieve a desired accuracy And turning on a switch corresponding to. Typically, the desired accuracy includes determining a power factor ratio tolerance. The quantization level may further include at least one bit between the MSB and the LSB. The step of determining the value of the LSB invalid load, the MSB invalid load, and the bit invalid load composed of at least one bit includes the step of determining a maximum invalid component of the first load. The MSB invalid load, the LSB invalid load, and the bit invalid load composed of at least one bit are usually capacitors, and are a switch, an active switch, a MOSFFT, an IGBT transistor, a pair of MOSFFT, a pair of IGBT transistors, a TRIAC, a relay, The reactive load can be connected to the reactive load through either a thyristor, a pair of thyristors, or the like. In some embodiments, the reactive power is continuously monitored and connected to the first load to bring the reactive power to substantially zero and a new optimal corrected reactive load that substantially reduces the power factor to one. Is determined dynamically.

  In another aspect of the invention, a system for reducing distortion of a distorted electrical signal includes a power factor correction module that substantially reduces the power factor of the distorted electrical signal to a unity power line current portion to a desired reference. A subtractor that generates a correction signal in comparison with the signal, and an electric circuit that selectively supplies current to and from the power line according to the correction signal. The power factor correction module includes a sensor that measures reactive power of a first load connected to a power line, and a multi-bit reactive load that is connected to the first load and cancels the reactive component of the first load. In some embodiments, the electrical circuit that selectively sources and flows current provides a correction signal to at least one control current source, and the control current source causes the current supply source to power line in response to the correction signal. Connect to. Alternatively, the electrical circuit for selectively flowing and flowing current modulates the correction signal and supplies the modulation correction signal to at least one switch connecting the current supply source to the power line, and a filter for filtering modulation noise And have. The modulator may be a pulse width modulator, a delta-sigma modulator, a pulse code modulator, a pulse density modulator, a pulse position modulator, or the like.

  In operation, an electrical circuit that reduces distortion of an electrical signal having distortion includes a first input to which a current signal having distortion is input, a second input to which a reference signal is input, a first input, and A subtractor connected to the second input and subtracting a distorted current signal from the reference signal to generate a first correction signal; a positive portion of the first correction signal; and a negative of the first correction signal And a circuit that selectively mixes the portion with a distorted electrical signal. The subtractor can be an analog circuit, such as an operational amplifier that subtracts one input from the other. Alternatively, the subtractor converts a digital system, for example, an A / D converter capable of digitally subtracting one converted bitstream input from the other converted bitstream input, and converting the result into an analog signal including a correction signal. The D / A converter can be used.

  In some embodiments, the selectively mixing circuit includes a positive rectifier connected to the output of the subtractor that determines the positive portion of the correction signal and the first control current source, and the negative of the correction signal. And a negative rectifier connected to the second control current source. Both control current sources are connected to a positive power source and a negative power source, respectively, in order to selectively flow current to or from the main power line to correct distortion. During operation, when the distortion is negative, current flows into the power line according to the distortion to be compensated. Similarly, when the distortion is positive, the distortion is compensated by causing a current to flow.

  Alternatively, the selectively mixing circuit is connected to a positive trigger comparator connected to the output of the subtractor that determines the positive part of the correction signal and to the output of the subtractor that determines the negative part of the correction signal. Negative trigger comparator and modulator. The modulator is any valid type of modulator, including a pulse width modulator, a delta-sigma modulator, a pulse code modulator, a pulse density modulator or a pulse position modulator. The modulator can be connected to an output of a positive trigger comparator and a negative trigger comparator that modulates either the positive portion of the correction signal or the negative portion of the correction signal. In some embodiments, the first switch is connected to a positive trigger comparator. The first switch selectively supplies current from a negative DC power source in response to the positive portion of the correction signal, thereby reducing distortion. Similarly, the second switch selectively supplies current from a positive DC power source in response to the positive portion of the correction signal, thereby reducing distortion.

  In some applications, the power grid impedance is much lower than the impedance of the load powered by the power grid. It will be apparent to those skilled in the art that in such situations it may be necessary to reverse the direction of the flowing current or the flowing current. As an example, the negative distortion is regularly corrected by sending current through the power line. However, if the load impedance is greater than the power grid impedance, the current is fed into the power grid rather than the load. As a result, the opposite function is performed. By flowing current out of the power line, current is sent in the opposite direction.

  In some embodiments, the electrical circuit that reduces distortion further comprises a power factor correction circuit that causes the power factor between the supplied current and voltage to be substantially unity. The power factor correction system determines means for determining the reactive power of the load and an optimal corrected reactive load connected to the first load so that the power factor is substantially 1 and the reactive power is substantially 0. And means for connecting the optimum reactive load to the first load. In some embodiments, the means for connecting the optimal reactive load to the first load comprises means for selecting a desired level of quantization with MSB and LSB, means for determining the MSB reactive load, Means for determining an LSB reactive load, and a switch that electrically connects either the MSB reactive load or the LSB reactive load to the first load, the bits required to achieve the desired accuracy And a means for turning on a switch corresponding to. The quantization level further includes at least one bit between the MSB and the LSB. Increasing the number of bits between the MSB and the LSB increases the accuracy of the power factor improvement, i.e., substantially approaches 1. The bit reactive load is usually a capacitor and can be connected to the reactive load via a switch, an active switch, a MOSFFT, an IGBT transistor, a pair of MOSFFT, a pair of IGBT transistors, a TRIAC, a relay, a thyristor, and a pair of thyristors.

  In another embodiment of the present invention, a system for reducing distortion of an electrical signal having distortion compares at least a portion of the electrical signal having distortion of a power line with a desired reference signal to generate a correction signal. An electrical circuit that selectively drains current from one of the DC rectifier and solar panel to the distorted electrical signal according to a correction signal that improves distortion, and a load from the solar panel Or an electrical circuit for selectively flowing additional current into at least one of the power grids. The system preferably further comprises a processor that determines when the photovoltaic power is generating current and a processor that switches between the DC rectifier and the solar panel to draw the current in and out. It may be a processor unit. Further, the system is a transformer having a first winding and a second winding, and an electric circuit selectively flowing out is galvanically insulated from the power line, and the second winding is connected in series or in parallel. A transformer that may be connected is provided. An electrical circuit for selectively flowing out and flowing in the current comprises a positive DC power source for supplying a positive DC current selectively connected to one of the DC rectifier and the solar panel, the DC rectifier and the solar A negative DC power supply for supplying a negative DC current selectively connected to one of the panels and a current from one of the positive DC power supplies selectively to the power line in response to negative distortion Preferably, a processor, or a processor that selectively draws current from the power line to the negative DC power source in response to positive distortion, these processors may also be the same processor as described above.

  Similarly, a method of improving power line harmonic distortion includes generating a correction signal as described above, generating a positive DC current from one of the rectifier and the photovoltaic system, and positive DC. Generating negative DC current by reversing the current, selectively flowing positive DC current through the load according to the correction signal to improve negative distortion, and correcting to improve positive distortion Selectively injecting negative DC current into the load according to the signal and injecting additional active power from the solar power system into at least one of the load and power line, thereby increasing the total current. The method also preferably includes galvanically isolating the load from the positive and negative DC power supplies. In some embodiments, generating a positive direct current from one of the rectifier and the photovoltaic system includes determining whether the photovoltaic system is generating current; Flowing current from the photovoltaic system when the power generation system is generating current, or flowing current from the rectifier when the photovoltaic system is not generating current. Conveniently, the method and apparatus allow current to flow from the photovoltaic system without using an expensive and inefficient inverter, as will be described below.

  In another aspect of the invention, a system for improving harmonic distortion includes a means for determining harmonic energy of a power line, a means for storing harmonic energy, and a harmonic to cancel harmonic energy of opposite magnitude. Means for selectively releasing wave energy. The means for determining the harmonic energy of the power line is as described above. The sensor that measures the current component of the power line, the oscillator that generates the reference signal, and the current component and the reference signal are compared by generating the correction signal. And a comparator, wherein the correction signal represents the harmonic energy of the power line. The means for storing energy may be a capacitor or an inductor. The energy is released by a switch that selectively connects the means for storing harmonic energy between the positive power source, the negative power source and the load. The system preferably further comprises a modulator for modulating a correction signal for driving a transistor that selectively charges the means for storing energy.

  Similarly, a method for improving harmonic distortion in a signal with harmonic distortion is to determine the harmonic energy of the power line, to store the harmonic energy, and to cancel out the harmonic energy of the opposite magnitude. Selectively releasing harmonic energy. The correction signal is generated as described above and energy is stored and released as described above. Using harmonic energy to improve future harmonic errors eliminates the need to use an external power source to improve energy, that is, draw more current from the power line.

  In another embodiment, power supply modulation is contemplated. Such an embodiment includes means for comparing at least a portion of an electrical signal having power line distortion with a desired reference signal to generate a correction signal and negative with respect to the electrical signal having distortion. Means for selectively flowing out current from the power source and the positive power source, means for modulating the positive power source according to the correction signal, and means for modulating the negative power source according to the correction signal. In an analog circuit, such a power supply is called a class H amplifier. Since the power supply closely follows the current stage of the amplifier, the class H amplifier is very efficient. In this embodiment, the power source follows the correction signal. The means for comparison preferably includes a sensor that detects a signal having distortion, an oscillator that generates a reference signal, and a comparator that generates a correction signal by comparing the signal having distortion and the reference signal. . The means for selectively flowing out the current includes a first transistor connected to a positive power source for flowing current in order to improve the negative harmonic according to the correction signal, and a positive harmonic according to the correction signal. In order to improve the wave, a negative transistor for supplying current is provided with a second transistor. The means for modulating the power supply comprises a first transistor for receiving the correction signal and an LC flywheel network for deriving a positive and negative average of the correction signal.

  The method corresponding to the above embodiment includes a step of forming a correction signal as described above, and a step of selectively flowing out current from a negative power source and a positive power source with respect to an electric signal having distortion. And modulating the power supply according to the correction signal.

  Conveniently, the above-described embodiments can be implemented on a household scale. The systems and circuits described above can be manufactured inexpensively and the average homeowner can obtain these devices. Prior art solutions typically include equipment intended for industrial applications and are therefore configured to improve the power factor of larger current capacity networks. As a result, they are very large, cost thousands of dollars and are not suitable for residential use. Other solutions must be applied to individual equipment in the house, simply improving the power factor. Furthermore, these are typically fixed capacitor power factor correction units that do not adequately correct the power factor, which in some cases reduces the power factor. Another solution is a system in which the power factor and harmonic improvement units that must be connected to individual home appliances are driven by the central control unit and each connection is a single attachment step. Such a system also attempts to correct the current waveform by drawing and wasting the current of a purely resistive load, such as an individual home appliance. Conversely, the systems and circuits and methods implemented in this application are typically connected between the main operator meter and the home, allowing for simple one-step installation.

FIG. 1 is a block diagram of a power factor correction circuit according to an embodiment of the present invention. FIG. 2 is a block diagram of a power factor correction circuit according to the embodiment of the present invention. FIG. 3A is a graph of time versus amplitude of a signal having distortion with improved power factor. FIG. 3B is a graph of time versus amplitude of a signal having distortion with improved power factor. FIG. 3C is a graph of time versus amplitude of a signal having distortion with improved power factor. FIG. 3D is a graph of time versus amplitude of a power signal having a low power factor and distortion, and a distortion correction method. FIG. 4 is a block diagram of a distortion reduction circuit according to the embodiment of the present invention. FIG. 5 is a block diagram of a distortion reduction circuit having a modulation circuit according to an embodiment of the present invention. FIG. 6 is a block diagram of a distortion reduction circuit having a modulation circuit according to an embodiment of the present invention. FIG. 7 is a block diagram of a distortion reduction circuit having a modulation circuit and an enhancement filter according to an embodiment of the present invention. FIG. 8 is a block diagram of a distortion reduction circuit having a modulation circuit and an enhancement filter according to an embodiment of the present invention. FIG. 9 is another block diagram of a distortion reduction circuit having a modulation circuit and an enhancement filter according to an embodiment of the present invention. FIG. 10 is a block diagram of a distortion reduction circuit having a modulation circuit, an enhancement filter, and galvanic isolation according to an embodiment of the present invention. FIG. 11 is another block diagram of a distortion reduction circuit having a modulation circuit, enhancement filter, and galvanic isolation connected in series with a load, in accordance with an embodiment of the present invention. FIG. 12A is an example of a waveform of a class G power supply. FIG. 12B is an example of a waveform of a class H power supply. FIG. 12C is a block diagram of a distortion reduction circuit having a class H power supply. FIG. 12D is a further block diagram of a distortion reduction circuit having a class H power supply. FIG. 13A is a block diagram of a distortion reduction circuit having a photovoltaic power generation system. FIG. 13B is a block diagram of a conventional photovoltaic power generation system. FIG. 13C is a graphical representation of the current generated by solar power generation and fed into a residential load or AC power grid. FIG. 14A is a block diagram of a distortion reduction circuit that can reuse harmonic energy and can be used to improve later harmonic distortion. FIG. 14B is a graphical representation of the energy of a distorted current signal that can be reused for later use to improve harmonic distortion. FIG. 14C is a block diagram of a distortion reduction circuit that can reuse harmonic energy and can be used to improve later harmonic distortion. FIG. 14D is a block diagram of a distortion reduction circuit that can reuse harmonic energy and can be used to improve later harmonic distortion.

Detailed Description of the Figures In the following description, numerous details and variations are set forth for purposes of explanation. However, it will be apparent to those skilled in the art that the present invention may be practiced without these specific details. In other instances, well-known structures and devices are shown in block diagram form in order not to obscure the description of the invention with unnecessary detail.
FIG. 1 is a block diagram of a power factor correction circuit 100 (hereinafter also referred to as PFC) according to an embodiment of the present invention. The power factor (hereinafter also referred to as PF) is defined as the ratio of the effective power flowing through the load to the apparent power, and is a value between 0 and 1. The power factor may be expressed as a percentage, for example, a power factor of 0.5 is 50%. The active power is the workload of a circuit that performs work at a specific time. Apparent power is the product of current and voltage in the circuit. A load having a power factor substantially close to 0 draws more current than a load having a power factor close to 1 if the effective power transfer is the same. It is usually understood that a power factor with a value close to 0 is considered a low power factor and a power factor with a value close to 1 is considered a high power factor. In particular, when the operator integrated wattmeter records only the apparent power consumed over time, not the active power, it is very preferable to optimize the power factor and bring the power factor close to 1. In order to optimize the infrastructure and maximize the effective energy that can be transmitted by the power company to the consumer, it is preferable for the power company that the power network has a good power factor. If the power factor is not good, for example, if the power factor is 0.9 or less, an excessive apparent current loss occurs in the power line, and stress is applied to the transmission line network due to the higher current amount.

  In the embodiment of FIG. 1, the power factor correction circuit 100 improves the power factor of the power transmitted to the residence or residence represented by the load 120. The power factor correction circuit 100 is normally connected to a 110V AC power line 101A and a neutral power line (hereinafter also referred to as a neutral line) 101B. The power factor correction circuit 100 is connected between a standard power meter 101 and a load 120. Many homes have several electronic devices that all correspond to loads that consume power. Usually, each load has a reactive component. The reactive component usually arises from the very common loads found in the home, such as inductance characteristics such as washing machine motors, dryer HVAC units or dishwashers. All these load combinations look like a single load 120 for the operator's power meter 101. However, since different electronic devices are operated or stopped, the actual ineffective component of the load 120 confirmed by the power meter 101 changes dynamically. Therefore, the dynamic power factor correction circuit 100 can dynamically improve the power factor of the load 120. In some embodiments, reactive power measurement module 105 includes a 110V AC power line (also referred to as a phase line) 101A with a first set of insulated ducts 102 and a second set of insulated ducts 103. Are electrically connected to the neutral wire 101B. As shown in the example, the first set of ducts 102 can be wires connected to the 110V AC power line 101A. The first set of ducts 102 measures the phase current component of the power transmitted to the load. The second set of ducts 103 is connected across the 110V AC power line 101A and the neutral line 101B and measures the phase voltage. Since lower voltage electronic devices are cost-effective and can be easily designed, a step-down transformer 103A is provided in the power factor correction circuit 100 to reduce the voltage amplitude and simplify the circuit configuration. May be. The reactive power measurement module 105 can determine the reactive power of the load by the duct 102 and the duct 103. As an example, the reactive power measurement module 105 may be a processor unit, for example, an analog device ADE7878. Furthermore, the reactive power measurement module 105 can communicate with an external processor 107 (hereinafter referred to as a controller 107).

In some embodiments, to compensate for the reactive component of load 120, controller 107 may include reactive loads having a number of different values, eg, capacitors 110A-110C (hereinafter referred to as capacitors 110A-110C connected in parallel with load 120). (Also referred to as invalid loads 110A to 110C). The invalid loads 110 </ b> A to 110 </ b> C are connected to the load 120 using a binary processing circuit. In order to determine the values of the reactive loads 110A-110C, it is advantageous to first check the minimum and maximum reactive power compensation ranges. In the binary processing circuit, the accuracy of the power factor correction circuit 100 can be approximately the same as the half value of the lowest reactive power among the reactive loads 110A to 110C corresponding to the bit or the quantization level. The lowest value among the invalid loads 110A to 110C is the lowest bit invalid load and the minimum component of the desired quantization level. An exemplary embodiment of the power factor correction circuit 100 shows that the quantization level is 3. In other words, the least invalid load is the LSB, that is, the least significant bit invalid load, and the largest invalid load is the MSB, that is, the most significant bit of the 3-bit invalid load. The accuracy of the power factor correction circuit 100 can be expressed as follows.
ErrMAX = LSB / 2
Here, the optimum value of LSB is selected by the following equation.
LSB = VARMAX / (2N−0.5)
Here, VARMAX is the maximum reactive power value of the load 120 to be compensated, and N is the quantization level. It can be evaluated that the level of quantization is directly proportional to the accuracy of compensation of the ineffective portion of the load 120. The desired quantization level may be determined so that cost and complexity are balanced with the desired accuracy. A simulation of about 50 samples of the minimum and maximum reactive power of the load 120 to be compensated is shown in Table 1.

  The corrected reactive power value QCORR is determined by the following algorithm.

IF (round (Q / LSB))> (2N-1)
Then QCORR = LSB × (2N−1)
Else QCORR = LSB × Round (Q / LSB), all values of VAR where Q is the reactive power value of the load 120 to be compensated. Since the home electronic device operates or stops, and these individual reactive loads are connected to the inside of the load 120, the reactive power value of the load 120 changes dynamically as described above. Therefore, it is advantageous that the reactive power measurement module 105 measures the reactive power of the load 120 and transmits the reactive power to the controller 107. Alternatively, the controller 107 may be connected directly to the load 120 to determine reactive power immediately. When Q is zero or positive, the ineffective portion of load 120 is inductance. Less commonly, if Q is negative, it indicates that the ineffective portion of load 120 is capacitance. Table 2 shows a specific example of the effect of quantization related to the accuracy of the power factor correction circuit 100.

  As an example, in a single-phase two-wire wiring configuration, the active power consumed is 10 to 3000 W, and the reactive power of the load 120 is 8 to 2000 bar. In this embodiment, the power factor is fixed at 0.67 for explanation. As can be seen from Table 2, while minimizing cost and complexity, implementations with 2 or 3 bits (ie, N = 2 or N = 3) typically optimize power factor to Close to 1. For example, in the 110V system, for example, in the United States, for example, in the specific example shown in Table 2, the reactance composed of two invalid bits QLSB and QMSB and the intermediate bit Q is calculated as follows.

ZQLSB = U2 / QLSB = 110V2 / 266.7VAR = 45.37Ω (all capacitance)
ZQ = U2 / Q = 110V2 / 533.3VAR = 22.28Ω (all capacitance)
ZQMSB = U2 / Q = 110V2 / 1066.7 VAR = 11.34Ω (all capacitance)
Returning to FIG. 1, each value of the capacitors 110A to 110C in which the capacitor 110A is an LSB bit invalid load and the capacitor 110C is an MSB bit invalid load is calculated as follows.

CLSB = 1 / (2πFZQLSB) = l / (2π × 60 Hz × 45.37Ω) = 58 μF
C = 1 / (2πFZQ) = l / (2π × 60 Hz × 22.68Ω) = 117 μF
CMSB = 1 / (2πFZQMSB) = l / (2π × 60 Hz × 11.34Ω) = 234 μF

As a result, in this embodiment, the LSB bit invalid load 110A is 58 μF, the bit invalid load 110B is 117 μF, and the MSB bit invalid load 110C is 234 μF. Each of the bit invalid loads 110A to 110C is connected in parallel with the load 120 via the switches 109A to 109C. Each of the switches 109A to 109C can be operated by switch drivers 108A to 108C. Each switch driver 108 </ b> A to 108 </ b> C is sequentially controlled by the controller 107. As described above, the controller 107 can measure the reactive power of the load 120 to be compensated, or can have the reactive power measurement module 105 transmit measurement information. The controller 107 can be connected to the memory 106. Alternatively, the memory 106 may be integrated with the controller 107. The memory 106 can store the maximum reactive power value of the load 120 to be compensated and the invalid bit values of the bit reactive loads 110A to 110C. In addition to this, the memory 106 can store a power factor improvement history to provide useful data regarding the power consumption characteristics of the residence to the user, eg, a homeowner. Accordingly, the controller 107 can selectively operate the switch drivers 108A-108C to turn on or off the switches 109A-109C, thereby selectively allowing the bit invalid loads 110A-110C to be in parallel with the load 120. The reactive power of the load 120 is dynamically compensated.

  In some embodiments, the controller 107 is connected to the communication module 114. The communication module 114 can communicate with other units of the power factor correction circuit 100. In addition, in order to notify the user, for example, a homeowner, the state of the power factor correction circuit 100 and the amount of correction performed by the power factor correction circuit 100, the communication module 114 is connected to a user device, such as a laptop computer or a mobile phone. Can communicate. The communication module 114 can communicate wirelessly with the wireless module 114A. The wireless module 114A includes an antenna 114B for using a local WiFi network, eg, IEEE 802.11. In some embodiments, the wireless module 114A can communicate over a cellular network by standard techniques, such as CDMA or GSM. In order to make informed decisions about energy usage, users, such as homeowners, can track the dynamic power consumption of their homes. Alternatively, the communication module 114 can communicate over a wired network via a port 115 that can be connected to a LAN, serial, parallel, IEEE 1394 Firewire, or any other known or special purpose wired communication standard. Furthermore, the power factor correction circuit 100 includes a DC power source 104 connected to the 110V AC power line 101A and the neutral line 101B via a step-down transformer 104A. The DC power source 104 converts the power from the 110V AC power line 101A to a desired DC voltage, and converts the converted power to electrical components such as the reactive power measurement module 105, the controller 107, and the remaining modules in the power factor correction circuit 100. Can be supplied.

  In some embodiments, the switches 109A-109C can be one or more transistors. The transistors may include any combination of bipolar transistors, MOS transistors, IGBT transistors, FET transistors, BJT transistors, JFET transistors, IGFET transistors, MOSFET transistors, and any other type or subset of transistors. Regarding the bipolar transistor and the IGBT transistor, a point to be considered when selecting the bipolar transistor or the IGBT transistor is that the collector-emitter voltage is almost zero in the on-state and the driving condition. Furthermore, transistors are usually unidirectional in the sense that current flows from drain to source or from collector to emitter. For this reason, it is advantageous to arrange two transistors with their own bit reactive load connected to the load 120, one for each direction of current flow. Another practical consideration when using transistors as switches 109A-109C is that the transistors require protection diodes against additional reverse voltages. For example, if the transistor rating is 110 or higher, ie 220V AC, the maximum emitter-base voltage is about 5-10V. As a result, it can be advantageous to implement a protection diode in order to protect the transistor during half the period when it is connected in series with the emitter and the sinusoidal voltage is applied in the opposite direction. Due to the energy lost as heat loss, a transistor may require one or more heat sinks. The power dissipated by a transistor that is conducting in half the period of a sine wave is approximated as follows:

Power = UCE × ICE / 2 = UCE × (UAC-UCE) / (2 × Z)
For example, in the case of using the semiconductor 2N3773, when U is 10A in the ON state, UCESAT = 2V, and a typical US residential power line is wasted as heat per transistor if UAC = 110V and Z = 10.59Ω. The power can be approximated as follows.

Power = 2V × (110VAC−2V) / (2 × 10.59) = 10.2W Per transistor A 2-bit reactive power improvement system requires four transistors, four capacitors, and four power diodes. To do. The total power consumed as heat of the switches 109A to 109C can be approximated as follows.

Power = 2 × 10.2W (bit2) + 2 × 5.1W (bit2 = LSB) = 30.6W
As a result, it adds cost and complexity to the power factor correction circuit 100, but it is advantageous to connect the switches 109A-109C to a heat sink.

  The MOS transistor and the MOSFFT transistor are generally low power consumption elements. However, the MOS transistor and the MOSFFT transistor also have a unidirectional current direction and require protection from an excessive reverse voltage VGS. The power wasted by a MOS or MOSFFT switch that is conducting in half the sine wave period can be approximated as follows:

Power = RDS_ON × IDS / 2 = (RDS_ON / 2) × (UAC / Z) 2
For example, when ST microelectronics STF20N20 is used, RDS_ON = 0.13Ω at 10A, and general residential power line in the US is wasted as heat of MOS or MOSFFT switch if UAC = 110, Z = 10.59Ω. The power can be approximated as follows.

Power = 0.13Ω / 2 × (110VAC / 10.59Ω) 2 = 7.01W
A 2-bit reactive power improvement system requires four transistors, four capacitors, and four power diodes. The total power wasted as heat of the MOS or MOSFFT switch can be approximated as follows:

Power = 2 × 7.01 W (bit 2) + 2 × 3.5 W (bit 2 = LSB) = 21.0 W
When MOS or MOSFFT elements are used for the switches 109A to 109C, power consumed as heat is reduced by about 1/3, but a heat sink may be further required to disperse waste heat. MOS or MOSFFT devices with very low RDS_ON are commercially available, but these devices are usually expensive.

  FIG. 2 illustrates a power factor correction circuit 200 per embodiment of the present invention. Similar to the power factor correction circuit 100 of FIG. 1, the power factor correction circuit 200 is configured to improve the power factor of power transmitted to the residence or residence represented by the load 220. The power factor correction circuit 200 is normally connected to the 110V AC power line 201A and the neutral line 201B. The power factor correction circuit 200 is connected between a standard power meter 201 and a load 220. In some embodiments, the reactive power measurement module 205 includes a 110V AC power line 201A and a neutral line 201B with a first isolation set of isolated contacts 202 and a second isolation set of isolated contacts 203. And are electrically connected. As shown in the example, the first set of contacts 202 can be wires connected to the 110V AC power line 201A. The first set of contacts 202 measures the phase current component of the power transmitted to the load. The second set of contacts 203 is connected across the 110V AC power line 201A and the neutral line 201B and measures the phase voltage. Since lower-voltage electronic devices are cost-effective and can be easily designed, a step-down transformer 203A is provided in the power factor correction circuit 200 to reduce the voltage amplitude and simplify the circuit configuration. It may be. As an example, the reactive power measurement module 205 can be a processor unit, eg, an analog device ADE7753. Further, the reactive power measurement module 205 can send a slack or overvoltage condition to the microcontroller 207.

  The microcontroller 207 is connected to the reactive power measurement module 205. The microcontroller 207 is connected to a plurality of triac drivers 208A and 208B. The triac drivers 208A and 208B selectively operate or stop the plurality of triacs 209A and 209B, respectively, in order. In this specific example, the triacs 209A and 209B are moved using 10 mA. However, the triacs 209A and 209B may be moved according to the specifications using other drive signals. A triac, or AC triode, is an electronic component that roughly corresponds to two silicon controlled rectifiers connected in antiparallel by connecting the gates together. As a result, current can be conducted in two directions, thereby providing an electronic switch with no polarity. Electronic switches can be operated by either positive or negative voltage applied to the gate electrode. In operation, the electronic switch element remains conductive until the current drops below a certain threshold known as the holding current. As a result, the TRIACs 209A and 209B are very convenient switches for an AC circuit, and a very large power flow can be controlled by a control current on a milliamp scale. Triacs are usually understood to belong to a larger group of parts known as thyristors. Thyristors are silicon controlled rectifier (SCR), gate turn-off thyristor (GTO), electrostatic induction thyristor (SIT), MOS controlled thyristor (MCT), distributed buffer-gate turn-off thyristor (DB-GTO), integrated gate rectifier thyristor (IGCT). ), MOS synthetic electrostatic induction thyristor (CSMT), reverse conducting thyristor (RCT), asymmetric SCR (ASCR), optically operated SCR (LASCR), optical trigger thyristor (LTT), breakover diode (BOD), modified anode gate turn-off This includes a thyristor (MA-GTO), a distributed buffer gate turn-off thyristor (DB-GTO), a base resistance control thyristor (BRT), a magnetic field control thyristor (FCTh) and an optically operated semiconducting switch (LASS). But it is not limited. As will be appreciated by those skilled in the art, the embodiment of the power factor correction circuit 200 of FIG. It can be easily modified to realize the application.

  The microcontroller 207 can execute the algorithm described in FIG. 1 above to turn the triacs 209A and 209B on or off by the triac drivers 208A and 208B. Conveniently, if a triac obtains a low logic threshold, it will validate the triac. As a result, the triac drivers 208A and 208B can be made using smaller and more cost-effective components. When on, the triacs 209A, 209B connect the bit invalid loads 210A, 210B in parallel with the load 220 to compensate for the low power factor. Depending on the situation, filters 212 and 213 may be implemented to reduce switching noise or hum introduced by the triacs 209A and 209B.

  In some embodiments, the microcontroller 207 is connected to the communication module 214. The communication module 214 can communicate with any power factor correction circuit 200. In addition, in order to notify the user, for example, a homeowner, the state of the power factor correction circuit 200 and the amount of correction performed by the power factor correction circuit 200, the communication module 214 is connected to a user device such as a laptop computer or a mobile phone. Can communicate. The communication module 214 can communicate wirelessly by a wireless module 214A having an antenna 214B for using a local WiFi network, eg, IEEE 802.11. The wireless module 214A also allows the mobile phone network, eg CDMA or GSM (registered), so that the user can use the mobile phone to track the energy consumption of their homes and make knowledge-based decisions. Trademark). Alternatively, the communication module 214 can communicate over a wired network via a port 215 that can be connected to a LAN, serial, parallel, IEEE 1394 Firewire, or any other known or special purpose wired communication standard. A memory module 206 is connected to the microcontroller 207. The memory module 206 stores information, for example, the maximum expected reactive component that can be predicted from the load 120, the improvement history of the power factor correction circuit 200, or any other valid data collected or used by the power factor correction circuit 200 Can do. Furthermore, the power factor correction circuit 200 includes a DC power source 204 connected to the 110V AC power line 201A and the neutral line 201B via a step-down transformer 204A. The DC power supply 204 converts power from the 110V AC power line 201A to a desired DC voltage, and converts the converted power into electrical components such as the reactive power measurement module 205, the microcontroller 207, and the remaining modules in the power factor correction circuit 200. Can be supplied to.

As will be apparent to those skilled in the art, the power factor correction circuit 100 and the power factor correction circuit 200 in FIGS. 1 and 2 respectively show a two-phase two-wire system. The power factor improvement circuit 100 and the power factor improvement circuit 200 having a three-phase three-wire or three-phase four-wire network configuration include bit invalid loads 110A to 110C, 210A to 210B, switches 109A to 109C, triacs 209A and 209B, filters 112 and 113, 212, 213 and the number of corresponding driver circuits are tripled, the first phase line becomes the second phase line, the second phase line becomes the third phase line, and the third phase line becomes the first phase line. It is implemented according to the embodiment of FIGS. 1 and 2, except that it is connected to a phase line. If neutral wires are available, star connections may be implemented. That is, the first phase line may be connected to the neutral line, the second phase line may be connected to the neutral line, and the third phase line may be connected to the neutral line. The power factor correction circuit 100 and the power factor correction circuit 200 can independently compensate up to the maximum maximum improveable value with any reactive load. As an example, a 300-600 VAR air pressure adjustment unit connected between three phase lines, a 100-400 VAR washing machine connected between a second phase line and a neutral line, and a third phase All dwellings with 100-250 VAR dryers connected between neutral wires are fully improved to the maximum recoverable reactive power value.
Distortion improvement methods and apparatus Incomplete power factor is the most common weakness to be improved in electrical networks. Another more common disadvantage and problem source is power line distortion due to the widespread placement of electronic equipment with non-linear loads and power adapters that are available but not perfect. Normally, when no special effort is paid in the design of the power adapter, the AC power signal is usually first full-wave rectified over the entire period of the sine wave and then coarsely filtered and isolated by a large capacitor. For example, it is supplied to the integrated circuit by the electronic circuit of the DC / DC power supply. Such available non-energy star electronics generate harmonic currents that return to the network. As a result, the current waveform approaches a parabolic shape with a truncated shape rather than a sine wave. The distortion can consist of harmonic distortion that results from various characteristics in the load that absorbs and reflects power, noise, or any other form of distortion.

  FIG. 3A shows a graph 300 of amplitude over time of power factor to improve a power signal with distortion. The first axis 320 shows time in milliseconds, and the second axis 310 is a general amplitude scale showing both current and voltage amplitudes. The voltage U (t) 330 appears as an accurate 60 Hz sine wave. However, the current iTOT (t) is very distorted in that it no longer resembles the corresponding sine wave. FIG. 3B similarly shows a graph 400 having a time axis 420 and an amplitude axis 410. The voltage waveform 430 depicts a waveform close to an accurate sine wave. However, the current waveform 440 is very distorted. In homes, the frequent use of widely distributed low quality power adapters in addition to standard resistive loads causes the current waveform 440 to be somewhat similar to a sine wave, but still exhibit significant distortion. FIG. 3C similarly shows a graph 500 having a time axis 520 and an amplitude axis 510. In FIG. 3C, the current waveform 530 is even more distorted with respect to the voltage waveform 540 by the introduction of one or more large reactive loads, such as air conditioning units or dryer units. Finally, a graph 600 of voltage waveform 640 versus general current waveform 630 is shown in FIG. 3D. Large reactive loads, resistive loads and AC / DC power adapters not only cause significant distortion in the current waveform 630, but also cause a phase shift 670 between the current waveform 630 and the voltage waveform 640. In this example, the distortion is shown as a peak 660 of the distorted current waveform 630. In this example, the phase shift 670 corresponding to a power factor of 0.67 is about 30 degrees. In order to improve the distortion, it is advantageous to improve the power factor first. The power factor improvement can be achieved by the method or apparatus described above in FIGS. 1 and 2, or any other convenient method. The correction signal 650 is derived by comparing the distorted current waveform 630 with a nearly accurate sinusoidal approximate voltage waveform (not shown). The correction signal 650 has a distortion coefficient within the range of the current waveform 630. The coefficient may be 1, but the coefficient may be any necessary multiplicand that achieves the desired amplitude ratio of the current waveform 630. As an example, the multiplicand may be a coefficient that converts voltage to current or current to voltage. The correction signal 650 is selectively applied to the current signal 630, resulting in a voltage waveform 640 of the correction current signal having a greatly reduced or eliminated distortion.

  FIG. 4 is a block diagram illustrating the suppression or removal circuit 800 described in FIG. 3D. Circuit 800 is connected between the operator's power meter 801 and load 840. The load 840 may be any load, but in this application and example is a residential home. The load 840 is composed of all electronic devices within the range of the house that look like one load 840 to the power meter 801 of the operator. The characteristics of the load 840 change dynamically as the electronics are started and stopped within the home, thereby connecting and disconnecting these individual loads from the load 840. The power factor correction circuit 875 substantially improves the power factor of the power line 833 to 1. The processor 810 can detect the current by sensing the power line 833. In this exemplary embodiment, processor 810 is an analog element. However, as will be apparent to those skilled in the art, digital processing may be substituted. Further, the processor 810 can detect the voltage by detecting between the power line 833 and the neutral line 834. The power line 833 is also referred to as a phase line. In this exemplary implementation, processor 810 has two differential inputs. Each input is connected to a multiplier Gl 812 and a multiplier G2 813. Multiplier Gl 812 and multiplier G2 813 may scale the current or voltage by any factor desired or required for a particular application or implementation in circuit 800. Gl inputs current from the power line 833. In this embodiment, the multiplier G2 converts the detection voltage into a current signal. Both voltage and current are scaled by the respective RMS value. Multipliers 812 and 813 may be standard analog operational amplifiers or any other valid circuit. Outputs of the multipliers 812 and 813 are connected to a subtracter 814. In some embodiments, subtractor 814 compares the two scaled outputs of Gl 812 and G2 813, thereby deriving a correction signal, eg, correction signal 650 of FIG. 3D. Conveniently, by using a single subtractor 814, both inputs can be converted to a single current. However, similarly, both inputs may be converted to a single voltage. In some embodiments, it is preferable to have a loop gain and loop filter block 821 that controls the process and optimizes system controls such as dynamic behavior, stability, gain margin, phase margin, and the like. It should be noted that the subtractor 814 can compare the total current to the reference signal by subtracting the total current with distortion from the reference signal or subtracting the reference signal from the total current with distortion. . Configurations may be adapted to meet specific implementation or application requirements. As a result, the correction signal may be directly or inversely proportional to the total current distortion.

  The correction signal is mixed with the total current having distortion to form a correction current signal, for example, the voltage waveform 640 of FIG. In the embodiment shown in FIG. 4, the output of the loop filter 821 is supplied to a negative rectifier 815 and a positive rectifier 822. The negative rectifier 815 is connected to the first control current source 831, and the positive rectifier 822 is connected to the second control current source 832. In a particular application, for example in the example of FIG. 4, the impedance of the wiring network downstream from the power meter 801 may be very small compared to the load 840. As a result, when current is drawn to correct for negative distortion, this current is supplied to the grid rather than the load 840. As a result, distortion is amplified. For this reason, in the embodiment of FIG. 4, a current from the power line 833 is caused to flow according to negative distortion, and a current from the power line 833 is caused to flow according to positive distortion. Distortion is corrected by selectively flowing current in and out due to the impedance imbalance of the power transmission network and the load 840. The positive rectifier 822 turns on the second control current source 832 when the correction signal, which means that the distortion component is a subtraction for the total current, is negative. The second control current source 832 is connected to the negative DC power source 852. When the second control current source 832 is turned on, current is flowed from the power line 833. In an embodiment in which the impedance of the transmission line network is lower than the impedance of the load 840, the current is caused to flow out of the transmission line network rather than the load 840, thereby causing an addition action on the load 840. The negative rectifier 815 turns on the first control current source 831 when the correction signal, which means that the distortion component is an addition to the total current, is positive. The first control current source 831 is connected to the positive DC power supply 851. When the first control current source 831 is on, a current flows from the positive DC power supply 851 into the power line 833. Furthermore, in applications where the impedance of the transmission line network is lower than the load 840, the current flows into the transmission network rather than the load 840, thereby causing a subtraction effect on the load 840. During operation, the correction signal, eg, the correction signal 650, is mixed into the distorted current signal, eg, the current waveform 630 of FIG. To do. Either the positive part of the correction signal or the negative part of the correction signal is selectively supplied to one of the first and second control current sources 831 and 832. Since the processor 810 continuously compares the voltage with the current and continuously derives the correction signal, the supply of such a correction signal is performed dynamically like the distortion component of the power line 833 that changes with the change of the load 840. Is called. Alternatively, the processor 810 may generate a reference signal for the processor 810 itself and compare the distortion current signal. For example, power in the United States is supplied at 60 Hz. Thus, the 60 Hz function generator inside the processor 810 can generate an accurate sine wave and compare it with the distorted electrical signal, thereby deriving a correction signal. Alternatively, a phase-locked loop may be implemented to track the voltage zero crossing time in order to derive a nearly accurate reference signal. As described above, the subtractor 814 may generate a correction signal that is directly or inversely proportional to the total current distortion. When the subtractor 814 generates a correction signal that is directly proportional to the distortion, if the distortion is a positive part, a current must be flowed from the power line 833 accordingly. Similarly, current must flow into the power line 833 where the distortion is negative. The reverse is also true. In embodiments where the correction signal is inversely proportional to the distortion at total current, current must flow from the power line 833 if the correction signal is a negative portion. Similarly, if the correction signal is a positive part, a current must flow into the power line 833.

  Although the embodiment shown in FIG. 4 uses widely available and cost effective components, it is understood that the control current sources 831 and 832 are not very energy efficient. If the positive DC power supply 851 is 250 V, the instantaneous voltage of the power line 833 is 150 V, and the current of the correction signal is 10 A, there is a possibility that the power that is wasted and wasted due to heat is several hundred W.

  For this reason, a distortion reduction circuit 900 comprising a modulator 920 is shown in FIG. Similar to the circuit 800 shown in FIG. 4, the circuit 900 is connected between the operator's power meter 901 and the load 940. The load 940 may be any load, but in this application and embodiment is a residential house. The load 940 is composed of all electronic devices within the range of the house that look like one load 940 to the power meter 901 of the business operator. The power factor correction circuit 975 substantially improves the power factor of the power line 933 to 1. The power factor correction circuit 975 may coincide with FIG. 1 or FIG. 2 or other effective power factor correction circuit. As described above, the characteristics of the load 940 change dynamically. The processor 910 can detect the current by detecting the power line 933. In this exemplary embodiment, processor 910 is an analog element. However, as will be apparent to those skilled in the art, there are many off-the-shelf digital processors that can perform the functions described below. Further, the processor 910 can detect the voltage by detecting both the power line 933 and the neutral line 934. In this exemplary implementation, processor 910 has two differential inputs. Each input is connected to a multiplier Gl 912 and a multiplier G2 913. G2 913 can convert voltage to a current signal, similar to G2 813 in FIG. 4, and shows G2 913 in a simplified manner. Multiplier 912 and multiplier 913 may be standard analog operational amplifiers or any other valid circuit. Outputs of the multiplier 912 and the multiplier 913 are connected to a subtracter 914. In some embodiments, subtractor 914 subtracts the output of Gl 912 from the output of G2 913, thereby deriving a correction signal, eg, correction signal 650 of FIG. 3D. In some embodiments, it may be desirable to multiply this correction signal by a conversion factor. As an example, the loop gain filter includes control of similar processing as shown in FIG. 4, and in some embodiments, the loop gain filter mixes the correction signal with the RMS value of the current 811.

  The output of the loop filter is connected to the modulator 920. In this exemplary embodiment, modulator 920 is a pulse width modulator (PWM). However, specific implementation and design constraints include, but are not limited to, PWM, delta-sigma modulation, pulse code modulation, pulse density modulation, pulse position modulation, or any other known or application specific modulation scheme Any method or scheme of modulation may be performed as desired. The modulator 920 sends a signal whose logic level is High when the correction signal generated from the multiplier 915 is positive, and sends a signal whose logic level is Low when the correction signal is negative. Trigger comparator 923. In some embodiments, the logic level of Low can be a negative value. The pulse generator 921 generates a triangular wave, and the triangular wave is synthesized by the combinational logic circuit 925 into a positive part of the correction signal output from the positive trigger comparator 922 and output from the negative trigger comparator 923. Synthesized into negative part. As a result, a PWM correction signal in which the positive part and the negative part are separated is generated. The combinational logic circuit 925 selectively supplies the positive portion of the PWM correction signal to the first control switch 932. The first control switch 932 is connected to a negative DC power supply 952. The combinational logic circuit 925 selectively supplies the negative part of the PWM correction signal to the second control switch 931. The second control switch 931 is connected to a positive DC power supply 951.

  In operation, switches 931 and 932 are selectively controlled by a PWM correction signal that is determined by whether the PWM correction signal is positive or negative. In some embodiments, a positive PWM correction signal indicates that the distortion to be corrected on power line 933 is negative, and vice versa. In order to correct the negative distortion on the power line 933, the second control switch 931 is turned on based on the negative portion of the PWM correction signal. When the second control switch 931 is on, the second control switch 931 connects the positive DC power supply 951 to the power line 933 based on the PWM correction signal.

  In the embodiment of FIG. 5, an embodiment in which the power meter 901 (and downstream power transmission network) of the operator has an impedance lower than that of the load 940 is shown. As a result, when positive distortion is to be corrected by a negative PWM correction signal, the current flowing out of the power line 933 flows out of the power grid rather than the load 940. As a result, distortion will increase. For this reason, in applications where the impedance of the load 940 is greater than the impedance of the power grid downstream of the power meter 901, positive distortion is improved using a positive PWM correction signal and negative using a negative PWM correction signal. Correct distortion.

  In some embodiments, it is advantageous to filter the modulated signal. For this reason, a filter 933 is included. Similarly, in order to correct the positive distortion of the power line 933, the first control switch 932 is turned on based on the negative portion of the PWM correction signal. When the first control switch is on, the first control switch 932 causes a current to flow from the power line 933 to the negative DC power supply 952 based on the PWM correction signal. As a result, the distortion is sufficiently reduced from the power line 933 current. The second filter 938 may also be advantageous for filtering PWM noise from the power line 933. Each of the positive DC power supply 951 and the negative DC power supply 952 has a current limit and sensor module 935 and 936 for transmitting any overcurrent or low current condition to the processor 910.

  FIG. 6 shows a distortion correction circuit 1000 according to another embodiment. In addition, the circuit 1000 is connected between the power meter 1001 of the business operator and the load 1040 with a power line 1033 and a neutral line 1034 in a single-phase two-wire distribution system. The load 1040 is composed of all household electric appliances and other electronic devices within the range of a house that looks like one load 1040 having invalid characteristics. In this embodiment, the current is measured by the processor unit 1200. The power factor improvement circuit 1275 can improve the power factor of the power line 1032 as described above. The processor unit 1200 includes a current and voltage measurement module 1202. Module 1202 also performs RMS and distortion calculations. Module 1202 may be a digital processing module. In some embodiments, module 1202 includes one or more analog / digital converters that convert data, eg, amplitude, phase, and distortion, into digital bit strings that can be digitally performed. Further, the processor 1200 may include a memory module 1201. The memory module 1201 can store information regarding dynamic harmonic correction, for example, the time when the correction is most effective. The memory module 1201 can be removed and plugged into a device, such as a computer, so that the user can make decisions based on information regarding energy usage. Alternatively, the processor 1200 includes a communication module (not shown). The communication module is connected to the Internet by wire, for example via a LAN cable, or connected wirelessly by a convenient standard such as IEEE 802.11 or Bluetooth. Furthermore, the communication module can communicate according to cellular phone standards such as GSM or CDMA. The protection module 1203 integrated with the processor unit 1200 can turn off the circuit 1000 in any fault condition, such as overvoltage, overcurrent and overtemperature. Such a failure state can be stored in the memory 1201.

  The processor 1200 can calculate the total current with distortion in the power line 1032 and generate a reference signal. The digital / analog converter can convert a digital bit string indicating a total current and a reference signal into an analog waveform. Similar to the embodiment of FIGS. 4 and 5, the subtractor can subtract the total current signal from the reference signal. Alternatively, the processor 1200 can digitally subtract the total current from the reference signal, thereby generating a digital correction signal. The processor 1200 may also modulate the digital correction signal by any convenient known or special purpose means of modulation. The modulation correction signal is then applied to the first transistor 1031 or the second transistor depending on whether current must be flowed in or out of the power line 1032 to correct distortion in the total current. It is selectively supplied to the transistor 1032. When the first and second transistors 1031 and 1032 are turned on by the modulation correction signal, current flows from the positive DC power supply 1051 to the power line 1032, or current flows from the power line 1032 by the negative DC power supply 1052. Operates as a switch. In some embodiments, it is advantageous to have a first filter 1033 and a second filter 1034 to filter PWM noise from the first transistor 1031 and the second transistor 1032 respectively.

  FIG. 7 shows a further detailed embodiment of the invention of FIGS. 4, 5 and 6. The power factor correction and distortion correction module 1300 is connected between the operator's power meter 1301 and the equivalent residential load 1340. The load 1340 expresses a dynamic load that changes as a home appliance in a house that starts and stops. The positive DC power supply 1351 has an optional low pass filter 1303 that filters out any noise and harmonics that exist across the phase line 1333 and the neutral line 1334. The alternating current from the power transmission network 1302 is rectified by the bridge rectifier 1304 and supplied to the smoothing capacitor 1305. The power factor correction circuit module 1306 corrects to a smaller ideal power factor. The power factor correction circuit module 1306 can use any of the methods or apparatus described in FIGS. 1 and 2 and the accompanying description. The first switching circuit 1331 includes a first transistor 1308A connected to the processor unit 1310. The processor unit 1310 drives the transistor 1308A by using the modulation signal. The transistor 1308A supplies current from the positive DC power supply 1351 to the phase line 1333 in accordance with the correction signal, as described in the previous embodiment of FIGS. An optional low pass filter 1309A is provided to filter the modulated signal. The current limit and sensor 1310A can notify the processor 1310 of an overcurrent condition. Current limit and sensor 1310A represents a resistor, but may be any useful sensor module that detects an overcurrent condition. Further, the positive DC power source is connected to the negative power factor correction circuit module 1352 through an inverting power source capacitor 1307. The inverting smoothing capacitor 1307 supplies negative DC power proportional to the power supplied from the positive DC power supply 1351. The negative power factor correction circuit module 1352 can improve the power factor at the phase line 1333 based on the method and apparatus described in FIGS. The negative power factor correction circuit module 1352 is connected to the second switching circuit 1332. The second switching circuit 1332 includes a second switching transistor 1308B that receives a modulation correction signal from the processor unit 1310, as described in the embodiment of FIGS. The processor unit 1310 includes scaling multipliers G1 and G2. In this embodiment, G2 is connected to a voltage-current converter. The subtractor derives a correction signal by comparing one voltage signal with the other voltage signal as described in the previous embodiment. The modulator is connected to the output of the subtractor and modulates the correction signal. In this embodiment, PWM is shown. However, any known or special purpose modulation scheme may be used. In some embodiments, a loop filter is connected between the subtractor and the modulator to control processing and optimization system control, such as dynamic behavior, stability, gain margin, phase margin, etc. Yes. Furthermore, an external processor unit may share current measurements, voltage measurements, RMS and distortion calculations and may have a memory, for example RAM or ROM.

  FIG. 8 shows another embodiment that includes coils 1361 and 1362 that smooth and filter the changes caused by voltage and current spikes, respectively, in the path of flowing current in and out. First and second switching transistors 1308A and 1308B charge coils 1361 and 1362, respectively, with a quasi-linear ramp, and when either transistor 1308A or 1308B is turned off, the charging current is quasi-linear toward zero. Decrease. The freewheeling diode 1363 is necessary to avoid a suddenly interrupting current and to avoid a high voltage spark that is destroyed by the influence of the coil. The second freewheel diode 1364 is connected in parallel with the second coil 1362. The formed current waveform resembles a shape that alternates up and down, allowing for simpler filters 1309A and 1309B. In some embodiments, coils 1361 and 1362 are integrated into filters 1309A and 1309B. Conveniently, current flows in and path losses are reduced. In some embodiments, a capacitor may be included in parallel connection by the freewheeling diodes 1363 and 1364 to reuse any lost energy. In the embodiment of FIG. 8, coils 1361 and 1362 are connected between switching transistors 1308A and 1308B and low-pass filters 1309A and 1309B, respectively.

  Depending on the intended use, the coils 1361 and 1362 may be connected to the power factor correction circuit modules 1351 and 1352 so that the coils 1361 and 1362 are not directly connected to the load 1340 and the impedance measured from the power grid 1302 is improved. It is advantageous to connect between transistors 1308A and 1308B. FIG. 9 shows such an embodiment. FIG. 9 shows a first current charging coil 1363A connected between the positive power factor correction circuit module 1351 and the first transistor 1308A. There is also provided a second current charging coil 1363B connected between the negative power factor correction circuit module 1362 and the second transistor 1308B. Conveniently, when measured from the grid equivalent impedance 1302, the first and second charging coils 1363A and 1363B do not generate added inductance or reactance to the equivalent residential load 1340, thereby The demand for power factor improvement is eased. Similar to FIG. 8, first and second charging coils 1363A and 1363B are connected in parallel to freewheel diodes 1364A and 1364B, respectively. As described above, a flywheel diode is a diode that protects a transistor, a switch, a relay contact, and the like when switching a load (relay, motor, etc.) having an inductance characteristic that is driven by a DC power source. Called a back diode). Flywheel diodes are often desirable because there are instances where the current flowing through a load having inductance characteristics is suddenly interrupted. In such an example, when a magnetic field is destroyed and a back electromotive force (EMF) is generated, and there is no path for current to flow, a high voltage is generated. High voltage can damage the transistor or cause arcing across the transistor. The flywheel diode is connected in reverse to a load having inductance characteristics and provides a current path so that the magnetic field and current can be attenuated safely.

  FIG. 10 shows a distortion correction circuit in a power line according to another embodiment. In some necessary places, it is desirable to provide galvanic insulation between electronic equipment and power lines. Galvanic isolation is the principle of isolating functional parts of an electrical system that avoids direct conduction of current from one part to another. Energy and / or information can still be exchanged between sites by other means, such as capacitive, inductive, electromagnetic, optical, acoustic, or mechanical means. Galvanic isolation requires two or more electronic circuits or two places in a system to communicate or transmit energy, but their grounds can be at different potentials, or are vulnerable to current spikes depending on the location. Used for different situations or for many other protective reasons. Galvanic isolation is an effective way to break the ground loop by preventing unwanted current from flowing between two units sharing the ground line. Galvanic insulation is also used for safety reasons to prevent accidental currents from reaching the ground (building floor) through the human body.

  FIG. 10 shows a harmonic distortion correction system 1300 in which the electronic device is galvanically insulated on the output side of the equivalent residential load 1340. In FIG. 10, the outputs of the first switching transistor 1308 </ b> A and the second transistor 1308 </ b> B are connected to the first winding 1371 of the transformer 1370. The transformer 1370 is preferably a high frequency, high power transformer. Second winding 1372 of transformer 1370 is connected in parallel to the equivalent residential load. Depending on the situation, a low-pass filter 1375 may be placed between the second winding 1372 and the equivalent residential load 1340 to filter artifacts present after switching. When the harmonic distortion correction system 1300 corrects negative harmonics, that is, when a current is flowing into the equivalent residential load 1340, the center tap depends on the switching signal supplied to the transistor 1308A by the processor unit 1310. Current flows from 1374 (which is grounded). Accordingly, the voltage generated across the first winding 1371 is reflected in the second winding 1372, and a corresponding current flows into the equivalent residential load 1340. Similarly, when the positive harmonic is corrected, that is, when a current flows out from the equivalent residential load 1340, a switching signal is supplied from the processor unit 1310 to the transistor 1308B. A negative voltage is generated across the first winding 1371, which is reflected in the second winding 1372. Conveniently, none of the electronic devices, eg, processor unit 1310, current voltage measurement module and processor and memory 1305, power factor correction modules 1351 and 1352 are connected directly to equivalent residential load 1340. Depending on the situation, a harmonic distortion correction system by inserting an isolation transformer between any low pass filter 1303 and rectifier 1304 and adding a transformer for phase voltage measurement to be supplied to the calculation unit 1311 Complete galvanic isolation for 1300 can be provided. However, as can be appreciated, the current being poured or drained will flow through the path with the lowest resistance. As a result, the current flowing into the equivalent residential load 1340 or the current flowing out of the equivalent residential load 1340 to correct positive or negative harmonics is not necessarily applied to the equivalent residential load, respectively. Nodes 1380A and 1380B form a current divider between the equivalent residential load and the grid equivalent impedance 1302. Typically, the grid equivalent impedance can be quite low, approximately as high as equivalent residential load 1340 or even lower. As a result, the current flowing into the equivalent residential load 1340 instead flows into the power grid equivalent impedance 1302 and normally returns to the power grid. Similarly, current intended to drain from the equivalent residential load 1340 is instead drawn from the grid equivalent impedance 1302. As a result, the correction of harmonic distortion in the power line is incomplete.

  To this end, FIG. 11 shows that current is selectively drained or poured into the equivalent residential load 1540 in a series configuration, and the current dividers formed at nodes 1380A and 1380B of FIG. 10 are removed. 1 shows a total harmonic distortion correction system 1500. As shown in FIG. 10, transistors 1508A and 1508B are connected to the primary coil of transformer 1570 having a grounded center tap 1574. However, in the configuration of FIG. 11, second winding 1573 is connected in series to equivalent residential load 1540. Optional low pass filters 1572 and 1575 are respectively connected between the second winding 1573 and the grid equivalent resistance 1502 to filter artifacts caused by switching or other artifacts originating from the grid 1501. And between the second winding and the equivalent residential load 1540. In this exemplary embodiment, the processor unit sends a PWM signal to transistor 1508B connected to the negative power factor correction module 1535 to correct positive harmonics. When a corresponding voltage signal is generated across the first winding 1571, it is reflected in the second winding 1573. Since the second winding 1573 is in series with the equivalent residential load 1540 and there is no current divider providing a low resistance path, no current is drawn from other than the equivalent residential load 1540. Similarly, when negative harmonics are corrected, that is, when a current is passed through the equivalent residential load 1540, the current flows in only one direction. As a result, harmonics are more completely corrected.

  Depending on the intended use, the electromagnetic interference caused by the switching outputs (eg, transistor 1508A and transistor 1508B) is undesirable or unacceptable. To this end, the positive and negative power supplies that draw and draw current may be modulated or more carefully processed to eliminate the need for modulation. For this purpose, class G and class H power supplies may be integrated with the systems described in FIGS. In order to reduce power consumption and increase efficiency, Class G power supplies use “rail switching”. There are multiple buses that can be used, and different buses are used according to the instantaneous power consumption requirements. As a result, the area between the signal to be driven and the bus is smaller. Thus, the amplifier increases efficiency by reducing the power wasted on the output transistor. Class G power supplies are more efficient than class AB power supplies, but not as efficient as switching methods, but do not have the negative electromagnetic interference effect of switching. FIG. 12A shows an output graph 1200 having a voltage axis 1201 and a time axis 1202, which represents a modulation signal 1203 and a plurality of voltage rails 1204A to 1204F. From time t = 0 to t = 1, the amplitude of the modulation signal 1203 is smaller than V1. As a result, the class G power supply matches the voltage rail V1 1204C. When the switching transistor is turned on so that the upward slope appears to start near t = 1, the driver (eg, current sources 831 and 832 in FIG. 4) wastes power as heat, thereby increasing efficiency. Loses sex. Since rail V1 1204C is low compared to the amplitude of modulated signal 1203 at time t = 1, the overall inefficiency is greatly reduced. Since the amplitude of the modulation signal 1203 increases between times t = 1 and t = 2, a larger voltage rail is required to drive the modulation signal. For this reason, it switches to rail V2 1204B. Similarly, after time t = 3, rail V3 1204A is used because the amplitude of modulated signal 1203 increases again. Similarly, in the negative cycle, the amplitude of the modulation signal 1203 increases negatively from the time t = 4 to the time t = 6, so that the switching is sequentially performed from the negative rail 1204D to 1204F.

  FIG. 12B shows the output 1250 of a class H power supply. The class H amplifier modulates the power rail axis as in the class G power supply, but by continuously modulating the power rail, it goes one step further and forms a power rail that is infinitely variable. This is done by modulating the power rail so that it is relatively slightly larger in absolute quantity than the output signal at a given time. As a result, the output stage always operates at its maximum efficiency. The graph 1250 has a voltage axis 1251 and a time axis 1252. For simplicity, the same modulation signal 1253 as shown in FIG. 12A is used. In the class H amplifier, the power supply shaft voltage 1254 draws a line close to the modulation signal 1253. Therefore, the delta between the modulation signal 1253 and the shaft voltage 1254 is continuously minimized. As a result, the drive elements (eg, current power supplies 831 and 832 in FIG. 4) are driven efficiently.

  FIG. 12C shows an example of a class H power supply in harmonic distortion correction system 1600. The class H power supply includes a rectifier 1610 that supplies a DC voltage to a positive switching power supply 1620 and a negative switching power supply 1630. The rectifier 1610 is electrically connected to the phase line 1603 and the neutral line 1604, and receives AC power from them. An optional low pass filter 1611 can filter unwanted noise or artifacts in the AC power. The rectifier 1612 rectifies the filtered AC power into DC power. Any known convenient or special purpose rectifier circuit, such as a bridge rectifier, is sufficient. In one embodiment, a power factor improvement module 1615 is provided that sets the power factor of the supplied power to approximately unity. As an example, a power factor correction circuit as described in FIGS. 1 and 2 and the corresponding text can be used. The positive switching power supply 1610 includes a switching transistor 1611. Switching transistor 1611 receives a control signal from processor unit 1650 that operates as described in FIGS. 6-11 to form a correction signal by subtracting a sample of phase line 1603 from the reference signal. In accordance with the control signal, the switching transistor 1611 forms a PWM signal through the LC flywheel network 1622 that takes a positive average of the PWM signal. Artifacts or noise are filtered by an optional low pass filter 1623. An overcurrent sensor 1624 is provided to control or limit the current surge situation. Similarly, the negative switching power supply 1630 includes a switching transistor 1631. The switching transistor 1631 receives a control signal from the processor unit 1650. In the case of a negative switching power supply 1630, the processor unit 1650 sends a control signal only if there are positive harmonics to be corrected, as described in the above figures and corresponding text. According to the control signal, the switching transistor 1631 forms a PWM signal through another LC flywheel network 1632 that takes the negative average of the PWM signal. Artifacts or noise are filtered by an optional low pass filter 1633. An overcurrent sensor 1634 is provided to control or limit the current surge situation.

  FIG. 12D shows another embodiment of a harmonic distortion reduction system 1700 having a class H power supply. Similar to the embodiment of FIG. 16, the rectifier 1710 is electrically connected to the phase line 1703 and the neutral line 1704 and receives AC power from them. A low pass filter 1711 is provided to filter out unwanted artifacts in the AC power. The bridge rectifier 1712 rectifies the filtered AC power into DC power. Although a bridge rectifier is described, any known convenient or application specific circuit is sufficient as such a bridge rectifier. In some embodiments, a power factor improvement module 1715 is provided to bring the power factor of the supplied power to approximately unity. As an example, a power factor correction circuit can be used as described in the text corresponding to FIGS. The positive switching power supply 1710 includes a switching transistor 1721. Switching transistor 1721 receives a control signal from processor unit 1750 that operates as described in FIGS. 6-11 to form a correction signal by subtracting a sample of phase line 1703 from the reference signal. In accordance with the control signal, switching transistor 1721 forms a PWM signal through LC flywheel network 1722 that takes a positive average of the PWM signal. Artifacts or noise are filtered by an optional low pass filter 1723. An overcurrent sensor 1724 is provided to control or limit the current surge situation. The modulated positive power supplied by the positive switching power supply 1710 flows to the second positive switching transistor 1725. The second positive switching transistor 1725 is also controlled by the processor unit 1750. Conveniently, the modulated power supplied by the positive switching power supply 1710 draws a line close to the PWM signal received by the second positive switching transistor 1725. As a result, as explained in the output graph of FIG. 12B, the clearance between the power supply and the power demand is very small. The negative switching transistor 1731 also receives a control signal from the processor unit 1750. The negative switching transistor 1731 is activated by the processor unit 1750 only when positive harmonics are detected, that is, when current must be drawn from the equivalent residential load 1740. According to the control signal, the negative switching transistor 1731 forms a PWM signal through the LC flywheel network 1732 and thereby takes a negative average of the PWM signal. Optional low pass filter 1723 filters out artifacts or noise. An overcurrent sensor 1734 is provided to control or limit the current surge situation. The modulated positive power supplied by the negative switching power supply 1730 flows to the second switching transistor 1735. The second negative switching transistor 1735 is also controlled by the processor unit 1750. Conveniently, the modulated power supplied by the negative switching power supply 1720 draws a line close to the PWM signal received by the second positive switching transistor 1725. As a result, as explained in the output graph of FIG. 12B, the clearance between the power supply and the power demand is very small.

  FIG. 13A shows another embodiment of a harmonic distortion reduction system 1800 that is integrated with a photovoltaic system (not shown) through a selector 1870. Before discussing the benefits and values of the system shown in FIG. 13A, it is useful to understand the prior art photovoltaic transmission system. FIG. 13B shows a standard prior art photovoltaic power transmission system 1890. The solar panel 1891 is installed so as to receive the maximum amount of sunlight. The solar panel 1891 is electrically connected to the regulator 1893 through a diode 1892 that protects the solar panel 1891 from reverse current. Regulator 1892 isolates the active current from solar panel 1891 while maintaining DC 12V (or other desired voltage) for battery 1894 and inverter 1895. In the unlikely event that the solar panel 1891 stops generating current due to lack of sunlight, the battery 1894 functions as a buffer material to keep current flowing through the inverter 1895. Since the solar panel 1891 generates only a direct current, the inverter must convert the direct current to an alternating current so that the power corresponds to a house equivalent load. The inverter is connected to power lines (or phase lines) and neutral lines such as 1603 and 1604 in FIG. 12C. Inverter 1895 is also protected by a fuse 1897 connected between inverter 1895 and regulator 1893. Regulator 1893, inverter 1895 and battery 1894 are also grounded through a ground spike, usually a long metal rod, which is inserted into the ground below the house where the photovoltaic transmission system 1890 is installed. However, it is well known that DC / AC inverters are inefficient. Even the most efficient design reaches only about 85% efficiency, ie 15% of the energy generated by the solar panel 1891 is wasted as heat or mechanical vibration.

Thus, FIG. 13A illustrates harmonic distortion with the ability to either inject solar energy into the equivalent residential load 1850 or return it to the power grid 1801 without using an inefficient and cumbersome inverter. A reduction system 1800 is shown. Harmonic distortion reduction system 1800 has a DC power supply 1810. DC power supply 1810 is connected to phase line 1803 and neutral line 1804 and receives AC power therefrom. Optional low pass filter 1811 filters out harmonics or artifacts in phase line 1803. An isolation transformer 1812 is preferably provided to provide galvanic insulation to the phase line 1803 and the neutral line 1804 for the photovoltaic system (described below). Therefore, the bridge rectifier 1813 converter rectifies AC power into DC power. Although a bridge rectifier 1813 is shown, any rectifier circuit or means can be used. Depending on the situation, the power factor correction circuit modules 1814 and 1815 can improve current distortion in the power supplies 1814 and 1815, and the current harmonic distortion can be nearly zero. DC power supply 1810 is connected to switch 1870. Switch 1870 selectively connects either DC power supply 1810 or a photovoltaic power generation system (not shown) as an external DC power supply. Switch 1870 can be controlled by measurement, processor and memory unit 1820. Unit 1820 can be programmed to automatically switch between DC power source 1810 and the photovoltaic system based on time of day and pre-programmed sunrise and sunset schedules. Alternatively, the unit 1820 can command whether to switch to the DC power supply 1810 or the solar power generation system according to the instantaneous power generation of the solar power generation system. If the photovoltaic system is generating enough power to improve the measured harmonic error, the photovoltaic system can be switched to the harmonic distortion reduction system 1800. The excess power supplied by the photovoltaic system can be used by the equivalent residential load 1850. The switch 1870 is connected to a positive switching circuit 1830 and a negative power source 1815 that inverts positive DC power supplied by either a DC power source or a photovoltaic system. Negative switching circuit 1840 modulates negative DC power supplied by negative power supply 1815. Positive switching circuit 1830 and negative switching circuit 1840 are controlled by processor unit 1825, as described above in some embodiments, to generate a positive PWM signal to improve negative harmonic errors, A negative PWM signal is generated to improve the positive harmonic error. Galvanic insulation is preferably provided by high frequency transformer 1880. The high frequency transformer insulates the equivalent residential load 1850 and the power grid 1801 from potential spikes caused by the photovoltaic system. In fact, such insulation may be required by regulations relating to photovoltaic systems. An optional low pass filter 1881 filters artifacts or noise. Conveniently, the photovoltaic system shown in FIG. 13B that does not need to consider the inverter 1895 can operate with the harmonic distortion reduction system 1800 with very high efficiency. Further, the second low pass filter 1882 and the high frequency transformer 1880 are shown in parallel with an equivalent residential load 1850. One of the advantages of the system described in FIG. 13A that is readily apparent to those skilled in the art is illustrated in FIG. 13C. FIG. 13C shows a graph 1875 having a current axis I and a time axis t. The first output curve 1876 represents a very distorted current waveform. A single hatched area by selectively flowing and flowing current to improve positive and negative harmonic errors, respectively, through the means and methods described in several figures and the corresponding text It is shown that the harmonic distortion 1872 represented by can be improved. What is formed is an improved current waveform 1877. However, operating the system 1800 of FIG. 13C allows additional energy to be injected from the photovoltaic system. As a result, a new current waveform 1878 is formed by the additionally injected current 1873 represented by the area with double cross-hatched lines. As described above, PWM modulation is a very efficient method of controlling the power supply, such as transistor 1308A and transistor 1308B in FIG. During operation, the direct current generated by the photovoltaic system is converted into alternating current power that is used without loss to the equivalent residential load by an inverter found in prior art photovoltaic systems.

  FIG. 13A is a preferred embodiment of solar in-house power generation and harmonic correction distortion having a single-phase two-wire or single-phase three-wire power grid configuration. In another embodiment, solar in-house power generation and harmonic correction distortion are performed in a phase-separated 3-line or phase-separated 4-wire power grid configuration (phase line, phase-separated line, neutral line and any ground). Can do. In such a case, transformer 1890 is replaced with a transformer having the same double winding on the input and output sides. The input configuration is the same as in FIG. 13A. The two output windings are connected to the neutral line at the midpoint, and the mutual access of the windings is connected to the single phase line and the phase separation line. Two low pass filters similar to 1891 can be used to filter the PWM modulation on the wire connected to the single phase line and the wire connected to the phase separation line.

  As an alternative, a solar power generation and harmonic correction distortion configuration with a three-phase four-wire or three-phase five-wire power grid configuration (three single-phase wires, neutral wires and any ground) Is preferred. In this case, the transformer 1890 is replaced with a transformer having the same double winding on the input side but three windings on the output side. The input configuration is the same as in FIG. 13A. The configuration of the output winding may be delta or star type. In a star configuration, the common node is connected to the neutral line at the midpoint, and the mutual access of the windings is connected to each of the three phase lines. Three arbitrary low-pass filters similar to 1891 can be used to filter the PWM modulation on the wires connecting the common output node to the neutral line and leading to each phase line. Some additional details and diagrams relating to multi-phase / double-wire systems and multi-phase / double-wire circuits are listed in US Provisional Patent Application No. 61 / 435,921, filed January 25, 2011, which is incorporated in its entirety. It is.

  FIG. 14A shows another embodiment of a harmonic distortion correction system 1900. In this embodiment, the harmonic distortion correction system 1900 can capture energy in the harmonic distortion and use it to improve subsequent distortion. Distortion is not a waste process, ie the energy in the strain is not wasted as heat, so when the grid has a DC power value that is average or nearly zero, it can reshape the current waveform with its own strain energy. Is possible. Typically, the harmonic distortion correction system 1900 stores distortion energy in the reactive component and later releases it to improve distortion that is the same or smaller value, but the opposite magnitude. The reactive component may be a capacitor or a coil. Although a capacitor is described here, it will be apparent to those skilled in the art that similar implementations are possible, such as using a coil instead of a capacitor. First, it is useful to look at the distorted current waveform in a graphical representation of the energy collected and reused to improve the distortion at a later period. To this end, FIG. 14B shows a graph 1980 of time output versus current. The graph 1980 has an axis 1981 and a time axis 1982 showing the magnitude of the current. Three waveforms are shown: a current waveform 1981 with harmonic distortion, a reference current waveform 1987 and a differential signal waveform 1988. In particular, the three regions in the curve of the signal waveform 1988 represent the strain energy that can be collected, stored, and used later to improve the same or smaller strains of opposite magnitude of positive and negative. Interesting. The first E1 region 1983 is a negative total strain energy, the second E2 region 1984 is a positive total strain energy, and the third E3 region 1985 is also a negative total strain energy. Since this part of the waveform represents a half period of the improvement period T, the same harmonic energy with opposite polarity appears in the second half period of the improvement period T. As a result, E4 1983 ′, E5 1984 ′, and E6 1985 ′ are opposite in magnitude and equal to E1 1983, E2 1984, and E3 1985, respectively, and the stored energy of E1 1983, E2 1984, and E3 1985 is It can be improved by injection.

  Returning to FIG. 14A, storage element C1 1910, storage element C2 1915, and storage element C3 1920 store and release harmonic energy. As in the previous embodiment, the harmonic distortion correction system 1900 is connected between the equivalent residential load 1940 and the operator's power meter 1901. The processor unit 1920 controls whether to connect the capacitor C1 1910, the capacitor C2 1915, and the capacitor C3 1920 to the harmonic distortion correction system 1900 according to when positive or negative harmonic energy is collected. The processor unit 1920 has an averaging and subtracting unit 1921 that is substantially similar to some embodiments described in detail above. For example, the averaging and subtracting unit 1921 compares the current in the phase line 1902 with a reference signal and generates a correction signal accordingly. When storage element C2 1915 or storage element C3 1920 charges or discharges energy and simultaneously charges or discharges the corresponding reverse energy from the next half cycle, additional processor circuit element 1922 activates either of those storage elements. . Each capacitor is charged or discharged by switches 1912, 1917 and 1922. Switches 1912, 1917, and 1922 are controlled by a processor unit 1920 that generates a PWM signal in accordance with error signal 1986 of FIG. 14B. Capacitor C1 1910 and Capacitor C2 1915 are respectively connected between or between positive voltage line V + 1907 and phase line 1902 carrying DC current generated by positive DC power supply 1905 by switch 1913 and switch 1918, respectively. It can be selectively connected to the sex wire 1903. Capacitor C2 remains connected in parallel with equivalent residential load 1940. Table 3 shows exemplary connections for charging and discharging capacitors C1 1910, C2 1915 and C3 1920 with respect to error 1986 in FIG. 14B. Table 3 displays in order, such as which capacitor is being charged or discharged, where the capacitor is connected, its state, the energy being charged or discharged, and the result of the discharge. In addition, another principle must be kept in mind. That is, the capacitor can be charged only by a potential difference, and therefore, in order to charge the capacitor during the positive half cycle, a positive DC high voltage connecting one electrode, for example, the positive voltage line V + 1907, and the other A capacitor may be connected between the neutral line N1903, the phase line P, or the negative DC high voltage V− that connects the two electrodes. The same principle is applied to charge the capacitor negatively. That is, in the capacitor, one electrode may be connected to the negative voltage line V− and the other electrode may be connected to the neutral line N, the phase line P, or the positive voltage line V +. In the embodiment of FIG. 14A, the negative power supply is not shown for clarity. However, as will be apparent to those skilled in the art, the negative DC voltage is generated, for example, as described in FIGS. 4-12D and corresponding text.

  The current through capacitor C1 1910, capacitor C2 1915 and capacitor C3 1920 can flow in any direction. Switch 1912, switch 1917 and switch 1922 controlled by the respective pulse width modulators are bi-directional switches, eg, with two transistors connected in parallel and reverse (ie, drain to source and source to drain). Preferably, it is implemented. Any transistor can be used, including but not limited to bipolar transistors, MOS transistors, IGBT transistors, or JFET transistors. Depending on the situation, capacitor C1 1910, capacitor C2 1915 and capacitor C3 1920 are connected to PWM filters 1911, 1916 and 1921, respectively, to filter the modulated signal generated by processor unit 1920.

  Depending on the intended use, it is desirable to have a simpler topology and at the same time have the ability to use harmonic energy to improve the capacity of future harmonics. For this reason, FIG. 14C shows a simplified harmonic distortion correction system 1990. Harmonic distortion correction system 1990 improves some of all distortions in the power line. In the illustrated embodiment, the distortion improvement is efficient during the period in which error E2 1984 and error E5 1984 'are generated. That is, the current of the power line is larger in absolute value than the reference current. For certain applications where the distortion is described in other ways, for example differently from the system of FIGS. 4 to 13, a simpler embodiment such as the embodiment of FIG. 14C is sufficient. The harmonic distortion correction system 1990 is also connected to the phase line 1902 and the neutral line 1903 between the operator's power meter 1901 and the equivalent residential load 1940. One capacitor 1991 is selectively connected in parallel with an equivalent residential load 1940 by a switch 1992. The switch 1992 is controlled by the processor unit 1995. During the positive half-cycle where the current in phase line 1902 is distorted and larger than the reference signal (eg, error E2 1984 in FIG. 14B is formed), capacitor 1991 charges excess energy, which is the capacity of the distortion. Save. During the negative half-cycle, the same happens but with signs of reverse current, capacitor 1991 discharges and acts as a positive source that cancels the negative harmonic energy. Conveniently, capacitor 1991 is connected between phase line 1902 and neutral line 1903 so that no other current flows into any other potential or node, thereby reducing efficiency. Typically, in FIGS. 14A and 14C, a single capacitor is referenced, but it will be understood that a capacitor string may be used.

FIG. 14D illustrates another embodiment of a harmonic distortion reduction system 2000 that has the ability to reuse harmonic energy to improve subsequent harmonic distortion. The harmonic distortion reduction system 2000 is connected between the operator's power meter 2001 and the equivalent residential load. The harmonic distortion reduction system 2000 includes a negative DC power supply 2015 and a positive DC power supply 2010 that are connected to a phase line 2002 and a neutral line 2003, respectively. The first capacitor 2030 is selectively connected to the positive DC power supply 2010, the negative DC power supply 2015, or the neutral line 2003 by the three-position switch 2032. The first capacitor 2030 is also connected to the phase line 2002. Charging and discharging of the first capacitor 2030 is controlled by a switch 2033 that is controlled by a PWM signal generated by the processor unit 2020. Depending on the situation, the PWM filter 2031 filters the PWM modulation signal generated by the processor unit 2020. The second capacitor 2040 is selectively connected in parallel to the equivalent residential load 2040. Similarly, charging and discharging of the second capacitor 2040 is controlled by a switch 2043 that is sequentially controlled by a PWM signal supplied by the processor unit 2020. Although the PWM control signal is described here because it is well known and understood to be highly efficient, any method or means for controlling the switch 2033 and switch 2043 can be used. The PWM filter 2041 filters the PWM modulation signal generated by the processor unit 2020. Conveniently, the harmonic distortion reduction system 2000 provides a path to the neutral line 2003 from at least one energy storage element, which in this example is the first capacitor 2030, so that the element discharges to the intermediate line 2003. Can carry out better efficiency. This is because the energy storage element is not connected to the positive DC power supply 2010 or the negative DC power supply 2020 while discharging to the intermediate line 2020. Additional embodiments and harmonic distortion correction systems and circuits are listed in US Provisional Patent Application No. 61 / 435,658, filed January 19, 2011, which is incorporated in its entirety.
Alternative Methods of Processing In some embodiments described above, analog processing for reaching the correction signal has been widely discussed. That is, in all embodiments, analog components compare, subtract, and modulate to selectively source or inject current or store harmonic energy and control the charging of capacitors for use. A correction signal is reached that controls the switch to do either. However, processing can be performed even in the digital domain by using Fourier transform. Analog signal, eg current, voltage, active power, reactive power, phase (current to voltage), zero crossing event, active power THD, reactive power THD, voltage THD, current THD, I_RMS, U_RMS, power factor, or other Any useful signal components are digitized by one or more analog-to-digital converters (ADCs). As will be apparent to those skilled in the art, digital processing is performed by a DSP processor or ASIC, or FPGA and memory. A number of off-the-shelf processors or arrays are available from Xilinx, Analog Devices, and other suppliers. Conveniently, such a processor is flexible and most efficiently capable of digitally processing part and analog processing part. Thus, the output analog signal is generated by one or more digital-to-analog converters (DACs) or is derived internally from a digital or pseudo digital signal, such as a PWM signal or another modulated analog signal. Such embodiments may also have protection circuitry against values of overvoltage, overcurrent, overpower, overtemperature, and other related input / output parameters. As is well known, analog signals can be digitized into digital signals and processed digitally.

  In an exemplary embodiment, the total current in the phase line with power factor and total harmonic distortion loss is measured and quantified in the frequency domain by FFT or other transformers such as DFT, for example. Transformed. The FFT can be processed at several points in the total current measured once per signal period (eg 1/60 Hz) or multiple times during some of the period. Both real and imaginary vectors can be obtained. A window function can be used to reduce the artifacts generated by the FFT due to the effects of non-periodic FFT sampling. Any known window can be used, such as Hann window, Hamming window, Blackman window, cosine window, rectangular window. Many sample values input to the FFT are preferably matched to an integer time of the current signal period. Doing so reduces and suppresses the artifacts that occur in the FFT and reduces the need for window functions, but is desirable for easy processing and higher FFT frequency or amplitude selection, if any. Alternatively, the sample value is equal to several current input signals, for example 2 to 50. An ideal current frequency response Iref (f) can be used, which can be scaled with the RMS value of the input current. Both Iref (f) and Itot (f) composite vectors of size n are compared for each exponent (j = 1,..., N), so that Corr_I (f) = Real {Corr_I (f)} + Im {Corr_I (F)} is generated. Further, the loop filter and other processing are subsequently executed. The error vector signal Corr_I (f) is then retransformed into the time domain and filtered with a low pass filter to avoid aliasing. The filtered error signal can be used as a modulation signal for modulating the correction signal. At the same time, a positive error signal causes the modulated error signal to switch on / off power transistors that flow out. Similarly, a negative error signal causes the modulated error signal to switch on / off power transistors. A power transistor that flows in and out (opposite sign) is added to the sum network power node to cancel power line distortion and make it less than the ideal power factor.

  Another method of digital processing is that the input signal, denoted Itot (t), is essentially periodic and sufficiently deterministic so that the entire current is treated as a periodic and deterministic signal. Use facts. We can distinguish three cases. First, when the power grid is stationary and the state of any appliance does not change. In this case, the current (and voltage) may have a phase delay due to reactive load power factor or total harmonic distortion. The current error signal is periodic. Second, when the power grid changes slowly (the rate of change is much slower than the frequency of the AC power grid). In this case, one or more appliances may change their state, such as a motor that reaches full rate in 5 seconds. In this case, the signal is periodic for the zero-crossing period and the amplitude of the substantially constant waveform between periods. Third, when the state of the power grid changes at an intermediate or fast rate (the rate of change is much faster than the frequency of the AC power). In this case, one or more appliances may change their state, such as a switch on or off, and the signal is periodic for the zero-crossing period, but when the change continues The waveform shape and amplitude are not periodic.

  It would be desirable to improve any effect belonging to the first two categories. The effect of the third category can be improved in the range of the feedback loop reaction time. As an example, if the loop feedback reaction time RT is 0.2 seconds, any event shorter than the RT seconds becomes Category 2 and is improved. However, if it is faster than RT, the event cannot be improved in a shorter period than RT. The current error signal is obtained by comparing an ideal current waveform with a measured current waveform that may be phase shifted and / or contain various harmonic distortions. In fact, if the input signal or input signal error always changes over time and there is neither stationary nor convergent, a standard proportional, integral, derivative PID controller cannot control the loop. For this purpose, a PLL or other zero crossing detector is implemented to tune the process to the frequency / phase of the input current, eg 60 Hz and in phase. The current signal is quantized to n bits. An error signal that is the difference between the input current signal and the current reference signal is then generated. The current reference signal must be tuned with the input current signal and normalized with its RMS value. The current reference signal (simple sine wave) is generated from the voltage input waveform and scaled or internally generated by a PLL fixed in the input voltage waveform. The error input value is stored in the memory line by a power line that has exactly one power line equal to one cycle of input current. A logic synchronization signal can be generated at each zero crossing event to reset the memory writing to column zero. The synchronization logic signal can be generated by a PLL or a zero crossing detector. Only a negative to positive (or positive to negative) transition may be used to preserve the complete period.

  Since the realistic frequency is in the range of 10 to 50,000 times faster than the current input frequency, the value is between 0.6 KSample / sec and 3 MSSample / sec in the 60 Hz period. A value that satisfies the following formula is preferred.

N × 1 / fs = T_i (t)
Here, N is the number of samples in a certain period T_i (t), fs is the sampling frequency, and T_i (t) is the period of the input signal i (t). As an example, if T_i (t) = 1/60 Hz and N = 100, the sampling frequency is fs = 6.0 KS Sample / sec. The key to this method is to read the memory in columns so that, for example, a control loop feedback mechanism (controller) is used to control the signals in each column in points. Since digital processing is performed, one controller per column can be used, but otherwise, the advanced method of feedback control (multi-controller) is used, or the master controller for one column has different data Used in conjunction with the n-1 slave controller for the column. The controller is PID or any variation (P, I, D, PD, PI), linear control, Kalman filter, fuzzy logic, neuron, genetic algorithm, adaptive control, artificial intelligence, machine learning, optimal control, MPC, LQG, Coarse control, H infinite loop formation and stochastic control, or can include these. The output value is then read in power line units, processed by the controller, stored in a temporary register, output in sample units, and reconverted to an analog value. Followed by an anti-aliasing filter. Once the correction signal is generated, it can be used to drive or flow current as detailed above. Figures representing digital processing of signals using some additional details and such as FFT or DFT can be found in US Provisional Patent Application No. 61 / 435,658, filed January 19, 2011, which is incorporated in its entirety. It is.

  The present invention has been described in terms of specific embodiments embodying details in order to facilitate understanding of the principles of construction and operation of the invention. The citation of any particular embodiment and details thereof herein is not intended to limit the scope of the claims appended hereto. As will be readily apparent to those skilled in the art, various other modifications may be made from the embodiments chosen to illustrate without departing from the spirit and scope of the invention as defined by the claims. can do.

Claims (11)

In a distortion reduction system that reduces distortion of an electric signal having distortion,
a. An electrical circuit that generates a correction signal by comparing at least a portion of the electrical signal having the distortion of the power line with a desired reference signal;
b. In accordance with a correction signal that improves distortion, a current is selectively flowed out from one of a DC rectifier and a solar panel to the electric signal having the distortion, and at least one of a load or a power grid from the solar panel. And a distortion reduction system comprising an electrical circuit that selectively allows additional current to flow through.   The distortion reduction system according to claim 1, further comprising a processor that switches between the direct current rectifier and the solar panel in order to flow current in and out.   The distortion reduction system of claim 1, further comprising a transformer having a first winding and a second winding for galvanically isolating the electrical circuit that selectively flows out from the power line. .   The distortion reduction system according to claim 1, wherein the distortion includes any one of harmonic distortion, noise, high spectrum noise, and amplitude modulation.   The distortion reduction system according to claim 1, further comprising a power factor correction module that makes a power factor of an electric signal having noise substantially equal to one. The power factor improvement module is
a. A sensor for measuring reactive power of a first load connected to the power line;
b. 6. The distortion reduction system according to claim 5, further comprising: a multi-bit invalid load connected to the first load and canceling invalid components of the first load. An electrical circuit for selectively flowing out and flowing the current supplies the correction signal to at least one control current source;
The distortion reduction system according to claim 1, wherein the control current source connects one of the DC rectifier and the solar panel to the power line based on the correction signal. An electric circuit for selectively flowing out the current is:
a. A modulator that modulates the correction signal and supplies the modulation correction signal to at least one switch connected to the power line with a current supplied by one of the DC rectifier and the solar panel;
b. The distortion reduction system according to claim 1, further comprising a filter for filtering the modulation signal. An electric circuit for selectively flowing out the current is:
a. A positive DC power source for supplying a positive DC current selectively connected to one of the DC rectifier and the solar panel;
b. A negative DC power supply for supplying a negative DC current selectively connected to one of the DC rectifier and the solar panel;
c. Optionally, a processor for flowing current from one of the positive DC power sources into the power line in response to negative distortion, or current from the power line to the negative DC power source in response to positive distortion; The distortion reduction system according to claim 1, further comprising: In a distortion reduction method for reducing distortion of an electric signal having distortion,
a. Comparing at least a portion of the electrical signal having the distortion of the power line with a desired reference signal to generate a correction signal;
b. Generating a positive DC current from one of a DC rectifier and a photovoltaic system;
c. Generating a negative DC current by inverting the positive DC current;
d. Selectively flowing the positive DC current through a load in accordance with a correction signal to improve negative distortion;
e. Selectively flowing the negative DC current into the load according to a correction signal to improve positive distortion;
f. Injecting additional active power from the photovoltaic system into at least one of the load and power line, thereby increasing the total current . Generating a positive direct current from one of the direct current rectifier and the photovoltaic system;
a. Determining whether the photovoltaic system is generating current;
b. Supplying current from the solar power generation system when the solar power generation system is generating current, or supplying current from the DC rectifier when the solar power generation system is not generating current. The distortion reduction method according to claim 10.

Images