JP5019823B2 - Reactive power compensator - Google Patents

Description

  The present invention relates to a reactive power compensator that improves power factor and current distortion of a system circuit by supplying reactive power to the system circuit.

FIG. 29 shows an uninterruptible power supply device in which, for example, single-phase voltage output units having different DC voltages are cascade-connected as described in Non-Patent Document 1.
The gradation control type inverter shown in the figure has three voltage output units of a full bridge inverter configured in series, and the DC voltages are set in a ternary relationship. The number of pulses output from the voltage output unit having a large voltage is small, and high-efficiency conversion is realized by so-called gradation voltage output in which the waveform is shaped by the number of output pulses from the voltage output unit having a low voltage.

"Application of ternary gradation control type power converter to uninterruptible power supply" (National Conference of the Institute of Electrical Engineers of Japan, March 15, 2006, Volume 4 P.113-114)

  As described above, the gradation-controlled power conversion device introduced in Non-Patent Document 1 is applied to an uninterruptible power supply device and requires generation of active power. In addition, a balancer circuit for distributing and supplying power to each voltage output unit is required. When this gray level control power converter is applied to a reactive power compensator as it is, it is compared with a conventional general reactive power compensator. This is disadvantageous in terms of external shape and cost.

  The present invention has been made to solve the above-described problems, and exhibits a necessary and sufficient function as a reactive power compensator, and causes an increase in the size of the device and associated loss and cost. It is an object of the present invention to provide a grayscale voltage control reactive power compensator that can maintain a constant DC voltage ratio of each voltage output unit with no hardware, and is small, inexpensive, and low loss.

In the reactive power compensator according to the present invention, three or more voltage output units for converting the DC voltage of the power storage means into an AC voltage, the AC output sides thereof connected in series, and the AC output from the plurality of voltage output units. A reactive power compensator that compensates reactive power of a system circuit by generating reactive power using the sum of voltages as an AC output voltage,
Current control means for calculating an AC output voltage command value so that the detected current value follows the current command, unit voltage determining means for determining a combination of output voltages of the voltage output units based on the AC output voltage command value, and the voltage Means for making the voltage ratio of the power storage means of each voltage output unit constant except for the minimum voltage unit with the smallest output voltage by selecting a combination of output voltages of the output units, and the reactive power compensator to output Means for adding an effective current value generated based on the deviation between the energy command value of the power storage means and its feedback value to the current command value;
The unit voltage determining means is a gradation voltage determining means for determining a combination of output voltages of the voltage output units to output a gradation voltage based on the voltage output unit excluding the minimum voltage unit, and the AC output voltage. Pulse width modulation means for pulse width modulating the minimum voltage unit so that the deviation between the command value and the gradation voltage output is zero;
Further, the voltage of the power storage means of the minimum voltage unit is set to a voltage corresponding to the gradation value of the gradation voltage = 1, and the minimum voltage unit includes the AC output voltage command value and the gradation voltage output. The voltage of positive or negative pulse width modulation is output based on the magnitude comparison with .

According to this invention, by adding an effective current value generated based on the deviation between the energy command value of the power storage means and the feedback value to the current command value, the energy of the entire power storage means is kept constant, By selecting the combination of the output voltages of the voltage output unit, the voltage between the power storage means is kept constant, and the voltage of each power storage means is kept constant by the control operation which is a circuit or software.
The unit voltage determining means is a gradation voltage determining means for determining a combination of output voltages of each voltage output unit to output a gradation voltage based on a voltage output unit excluding the minimum voltage unit, and an AC output voltage command value and gradation. Pulse width modulation means for pulse width modulating any voltage output unit so that the deviation from the voltage output becomes zero,
Further, the voltage of the power storage means of the minimum voltage unit is set to a voltage corresponding to the gradation value of the gradation voltage = 1, and the minimum voltage unit includes the AC output voltage command value and the gradation voltage output. Since a positive or negative pulse width modulation voltage is output based on a comparison with the above, a switching loss is suppressed and a highly accurate voltage output can be obtained.

Embodiment 1 FIG.
1 is a diagram showing a configuration of a reactive power compensator 7 for compensating reactive power in a three-phase AC system in Embodiment 1 of the present invention. This compensates for the reactive power of the AC system, improves the power factor of the system, and suppresses harmonic components of the current.
In other words, the reactive power compensator 7 supplies a reactive current including a harmonic component in the load current 12 supplied to the load 8 in place of the system power supply 1, so that the harmonic component of the system current 11 is reduced. Reduce power system efficiency and improve power transmission efficiency.
As shown in the figure, the reactive power compensator 7 is configured by connecting a plurality of voltage output units 2 in series. Each voltage output unit 2 is connected to a power storage means 3, and then power is output through the voltage output unit 2.
A system inductance 6 exists between the system power supply 1 and the reactive power compensator 7 is connected to the system via an output filter reactor 9.

The voltage output unit 2 includes an inverter including semiconductor switches 20 to 23 having a full bridge configuration as shown in FIG. The semiconductor switch is composed of a switch having a self-extinguishing function and a diode connected in reverse parallel thereto.
Examples of the self-extinguishing function switch include an IGBT (Insulated Gate Bipolar Transistor), a GTO (Gate Turn Off Thyristor), a GCT (Gate Commutated Turn-off Thyristor), and a MOSFET (Power Metal Oxide Semiconductor Field Effect Transisor). Applicable. The voltage output unit 2 in FIG. 2 outputs three levels of voltages of + E, 0, and −E between its terminals based on the on / off operation of each switch.
The power storage means 3 includes, for example, a capacitor such as an electrolytic capacitor or an electric double layer capacitor, or a battery such as a lithium battery, a nickel hydride battery, or a lead storage battery.

Here, the set voltage of the power storage means 3 corresponding to each voltage output unit 2 may be different or may be equal. The ratio of the set voltages of the H bit, M bit, and L bit of the voltage output unit 2 connected in series is, for example, the number of gradation levels due to the binary 3 bit relationship as shown in the table of FIG. When there are 7 levels, as shown in FIG. 3B, the positive output is 7 levels, the negative output is 7 levels, the 0 voltage output is 1 level, and the total number of phase voltage levels to be output is 15 levels. It becomes.
Similarly, in the case of binary 4 bits, the ratio of the set voltages of the HH bit, H bit, M bit, and L bit of the voltage output unit 2 connected in series is as shown in the table of FIG. The number of phase voltage levels to be output is a total of 31 levels as shown in FIG.

  Thus, by constructing a plurality of voltage output units 2 having different voltages in series, the voltage output to the system power supply can be multi-leveled and the harmonics can be reduced. Further, by suppressing the switching frequency of the high voltage main inverter, the switching loss can be suppressed, the efficiency of the reactive power compensator 7 can be improved, and the electromagnetic noise can be reduced.

In the reactive power compensator 7 of FIG. 1, a DC power source 13, which is a constant power supply means, is connected to an L-bit voltage output unit (minimum voltage unit) 2 having a minimum voltage . As will be described in detail later, this L-bit inverter, unlike other H-bit and M-bit inverters, outputs a voltage by pulse width modulation control and realizes compensation of reactive current including harmonic components. By placing a small filter on the output, the accuracy of voltage output can be improved, and harmonics of voltage and current can be suppressed.
Even if the DC power supply 13 is attached to the L-bit voltage output unit 2, the output voltage and power are small, so the size of the DC power supply 13 is small.

  In this way, the number of output pulses of the high voltage H and M bit voltage output unit 2 is reduced, and the output of the low voltage L bit voltage output unit 2 is converted to a high frequency PWM output with an operating frequency of several kHz or more. Then, improvement of conversion efficiency and harmonic suppression can be realized, which is effective. Here, the H and M bit voltage output unit 2 does not require the constant power supply means by the inter-bit energy diversion control and the H and M bit power storage means power supply routine (constant voltage control) described later. .

  When the reactive power compensator 7 passes only reactive current, only reactive current flows through each voltage output unit 2, so that the voltage of each power storage means 3 ideally does not change in time average. . Therefore, as shown in FIG. 4, the reactive power compensator can be configured to use no constant power supply means.

  As a further modification, the configuration of the reactive power compensator may include three-phase common power storage means 3 and a voltage output unit 2 as shown in FIG. Here, the H bit is composed of a three-level common three-level voltage output unit 2 and power storage means 3. Since the current phase is shifted by 120 degrees in each of the three phases, the voltage fluctuation period of the H-bit power storage means 3 is 1/3 of the period of the commercial frequency, and the voltage fluctuation becomes small. Compared to the individual method, it is advantageous for constant voltage control.

Next, the specific content of the driving | operation operation | movement by the control part of the reactive power compensation apparatus 7 shown in FIG. 1 is demonstrated.
First, a flowchart of the overall control unit is shown in FIG. In the figure, in the system instantaneous power Pp system instantaneous imaginary power Qp routine 30, the voltage of the load 8 (load voltage 5) VLi (i = u, v, w), current (load current 12) ILi (i = u, v, w) Based on the current of the reactive power compensator 7 (reactive power compensator current 10) Isi (i = u, v, w), the system instantaneous imaginary power Qp (with filtering) and the command of the system current for the active and reactive parts The values Ipi_P and Ipi_Q (i = u, v, w) are obtained.
In order to make the voltage of the power storage means 3 of the voltage output unit constant, in the H and M-bit power storage means power supply routine (constant voltage control) 40, an effective current command superimposed on the current command of the reactive power compensator 7 ΔEc · sinωt is generated and sent to a current control routine 50 described later.
Here, the H bit and the M bit correspond to the power storage means of the unit to be energy controlled described in the claims of the present application, and the H, M bit power storage means power supply routine (voltage constant control) 40 is: Similarly, it corresponds to the energy control means, and the current command ΔEc · sin ωt for the effective portion also corresponds to the effective current value or the deviation command.

In the current control routine 50 (corresponding to the current control means described in the claims of the present application), the system current command values Ipi_P and Ipi_Q (i = u, v, w) for the effective and ineffective portions, the system instantaneous imaginary power Qp Based on the effective current command ΔEc · sinωt, voltage command values Vs (t) and Vso (t) to be output in order to flow the reactive power compensator current 10 are obtained.
Next, in the high-accuracy voltage output routine 60, a small pulse operation of the H-bit and M-bit voltage output unit 2 is realized, and a constant voltage ratio control of the H-bit and M-bit power storage means 3 is performed by diverting energy. Meanwhile, PWM output control (pulse width modulation control) using L bits is performed. Through the high-accuracy voltage output routine 60, a gate command is generated by the gate generation circuit 70, and a desired reactive power compensator current 10 is output to perform reactive power compensation.

Next, the contents of each routine will be described in detail.
FIG. 7 is a flowchart showing the processing contents of the system instantaneous power Pp system instantaneous imaginary power Qp routine 30. The system instantaneous power Pp and the system instantaneous imaginary power Qp represent instantaneous values, not average power for one cycle. In this sense, in general, the display of instantaneous power and instantaneous imaginary power is used in distinction from the display of active power and reactive power expressed by average values.
First, load current ILi (i = u, v, w), voltage VLi (i = u, v, w) and reactive power compensator current Isi (i = u, v, w) are represented in the matrix of FIG. Using the equation, the three-phase alternating current (U, V, W) -two-phase alternating current (α, β) is converted (31). Then, as shown in FIG. 7, based on the two-phase load voltage VLα, VLβ, current ILα, ILβ and reactive power compensator current Isα, Isβ (32) obtained by the conversion of (31), the grid instantaneous power Pp and system instantaneous imaginary power Qp are obtained (33, 34).

In the fundamental wave amplitude extraction filter (36), the average values of the system instantaneous power Pp and the system instantaneous imaginary power Qp are obtained by the calculation shown in FIG. Note that an average value of the load voltage VLαβ is obtained for use in this averaging calculation (35).
Specifically, the system current deriving routine (37) in FIG. 7 is based on the calculation formulas 37-1 and 37-2 in FIG. 10 and the average value of the system instantaneous power Pp and the system instantaneous imaginary power Qp and the load voltage VLα. From the average value of VLβ, the system currents Ipi_P (i = u, v, w) and Ipi_Q (i = u, v, w) of the effective and ineffective phases of the U, V, and W phases are obtained.

Next, the contents of the current control routine 50 will be described with reference to the block diagram of FIG. In the figure, Vso (t) = | Vs | · sinωt, which is a bulk portion of the output voltage of the reactive power compensator 7, is a fundamental wave having the same magnitude as the load voltage VLαβ derived in FIG.
For reactive power compensation, a current command of reactive component | Iqqu | .cosωt is obtained by I (integration) control so that the fundamental reactive power Qp of the system becomes zero. Here, the current command of the reactive component | Iqqu | · cosωt is obtained from the fundamental reactive power Qp for each phase, but the reactive component | Iqqu | · cosωt current command is obtained from the reactive system current Ipi_Q for each phase. May be requested.

Then, the active component system current Ipi_P (sinωt) obtained in the previous system current deriving routine (37), the reactive component system current command value | Iqqu | · cosωt for the reactive power compensation, and H described later. , The current command value Irefi (t) of the current command value ΔEci · sin (ωt + φi) obtained from the M-bit power storage means power supply routine 40, and the feedback system current Ipi (t) (i = u, v, w) The voltage command value ΔVsi (t) of the reactive power compensator 7 is output from the PD (proportional differentiation) control of the deviation. The bulk component Vsoi (t) is added to this ΔVsi (t), and the final voltage command Vsi (t) = Vsoi (t) + ΔVsi (t) is sent to the high-accuracy voltage output routine 60.
When the reactive power compensator 7 causes a reactive current to flow based on this voltage command, the fundamental wave reactive power Qp of the system is constantly zero. Current control that introduces the idea of instantaneous reactive power can completely compensate reactive power even during transient response.

  In addition to the original voltage command Vsi (t), in the pre-PWM gradation voltage Vpk determination routine of the high-accuracy voltage output routine 60 described later, the H and M-bit outputs are set to 1 pulse and 3 pulses, respectively. Vsoi (t) = | VLi | · sin (ωt + φi) is used as the voltage command value for the determination. As a result, when the H-bit or M-bit voltage changes, it is possible to prevent multiple pulses when the voltage command value changes suddenly.

Next, the contents of the H and M bit power storage means power supply routine (constant voltage control) 40 will be described with reference to FIG. In this control, the target voltage and the detection voltage (feedback value) of the power storage means 3 are set in order to make the energy of all the power storage means, here the H-bit and M-bit power storage means that are energy control targets, constant. From the deviation (ΔVHi, ΔVMi), an effective current command ΔEci that flows into the reactive power compensator 7 is generated. By passing this effective current, the voltage of the power storage means 3 is made constant as a whole.
When the voltages of the plurality of power storage units 3 are controlled to be constant as a whole, the current command ΔEci is set based on the deviation between the currently held energy of these plurality of power storage units 3 and the target energy (reference energy). Although it should be derived, in the lower right part of FIG. 12, both the above-mentioned energies and the energy of the difference between them, and further the difference energies under the conditions that can be normally established that ΔVH and ΔVM are sufficiently small values, respectively. As shown by the mathematical formula, it can be seen that the current command ΔEci can be obtained from the voltage deviation. By using the voltage deviation, there is an advantage that the calculation is simple.

  When the system voltage becomes unbalanced (this point will be described in the second embodiment), the reactive power compensator 7 compensates for the reactive power of the system, so that the current flowing through the reactive power compensator 7 also becomes unbalanced. . Along with this, the voltage of the power storage means 3 of each phase becomes unbalanced, but if this control is performed for each phase, the balance of the voltage of the power storage means 3 in each phase can be maintained.

  Next, the contents of the high-accuracy voltage output routine 60 will be described with reference to FIG. In this case, so-called energy diversion control and switching switching between H and M bits, in which charge amounts are exchanged between H and M bits for the purpose of stabilizing the voltage ratio of the H and M bit power storage means 3, are increased. For the purpose of avoiding this, the switch pattern is determined for each period and the output state of each bit is determined.

First, the principle of operation in this case will be described with reference to FIG. Here, the voltage ratio of the L bit, M bit, and H bit is 1: 2: 4, and the voltage at the first level is 1 A.U. (absolute unit). At least in the explanation section of this principle, for convenience of explanation, for example, in the case of the H bit, it is synonymous with a voltage output unit that outputs a voltage of 4 A.U.
As the voltage control of each bit, the gradation voltage control is performed so that the combination of output voltages of the H and M bits follows the AC output voltage command value, and the L bit is a combination of H and M bits. It is assumed that the voltage is output by PWM control so as to fill the deviation between the output voltage and the AC output voltage command value.

  In the present invention, there is a specific period in which the output voltages of the H and M bits are different, but the combined voltage is the same. Therefore, even when the control follows the voltage command value, the H and M bits are used. Focusing on the fact that there is a degree of freedom in the combination form (SW pattern), the SW pattern is selected within the range of this degree of freedom, and the voltage balancing between the H bit and the M bit is intended.

The waveform shown in the lower column of FIG. 14 shows two switch patterns SW1 and SW2 in which the combined voltage waveforms are the same but the output voltages of H and M bits are different in a specific period.
First, in the pattern SW1, a sine wave indicates a voltage command value, and a rectangular gradation voltage waveform indicates a sum of output voltages of H and M bits following the voltage command value. The figure shows one period of the fundamental wave. However, considering the symmetry between the time axis direction and the positive / negative direction, it can be discussed in 1/4 period. The hatched rectangular waveform is an output waveform of M and H bits.
In the lower pattern SW2, the waveform of the output voltage sum of H and M bits is the same as that of the pattern SW1, but the output voltage of each bit is different from the pattern SW1 in the period of θ1 to θ2 which is a specific period.

That is, the output sums in the specific period are both 2 A.U., but the individual outputs are M bit: +2 A.U. and H bit: 0 A.U. Then, M bit: -2 A.U., H bit: +4 A.U.
Since this specific period exists every quarter period, there are a total of 16 patterns that can be considered by selecting either the pattern SW1 or SW2 in each specific period as shown in the upper column of FIG. . In the claims of this application, the unit pattern setting means sets the above SW pattern.
In FIG. 14, 16 types of patterns that repeat in one period of the fundamental wave are set. However, for example, patterns that repeat in two periods of the fundamental wave may be set.

  As shown in FIG. 15, the charge amount calculation routine 61 (passage charge amount calculation means) has the charge amount Qi (i = 1 to 16) passing through the H-bit power storage means for the 16 types of SW patterns described above. ). Here, the current as the charge amount is the current flowing through the H-bit power storage means, that is, the compensation current that is the reactive power compensator current, and the current command Iref obtained by the load current IL and the current control routine 50 of FIG. Calculated by the difference from (t).

FIG. 16 is a flowchart showing the processing of the switch pattern candidate determination routine 62. The switch pattern candidate determination routine 62 applies the processing shown in FIG. 16 to the 16 types of passing charge amounts Qi obtained in the previous charge amount calculation routine 61, thereby obtaining the positive maximum H-bit passing charge amount Qpmax and its SW pattern. The number pmax, the negative minimum H-bit passing charge amount Qnmin and its SW pattern number nmin are obtained.
In FIG. 16, among the 16 types of SW patterns calculated in the previous routine 61, the one having the maximum absolute value with a positive sign and a negative sign is extracted. This will be described next. This is because the determination in the switch pattern determination routine 63 may be difficult due to a measurement error or the like, so that the determination is ensured. However, if the determination is not difficult, the voltage value of the H and M-bit power storage means is smaller when the one with the smaller absolute value is selected, so the one with the smaller absolute value may be selected.

  In the next switch pattern determination routine 63, as shown in FIG. 17, the unit voltage detection means (not shown) detects the voltage value of the H-bit and M-bit power storage means 3, and according to the comparison result of the voltage ratio between them. The voltage ratio of the H-bit and M-bit power storage means 3 is made equal by selecting the one cycle SW pattern of positive and negative charge amounts selected previously. Since this is the same as the exchange of energy between the H bit and the M bit, it is called energy diversion control here.

  As described above, the H and M bit power storage means power supply routine 40 makes the entire energy of the H and M bit power storage means constant. In the switch pattern determination routine 63, the ratio of the voltages of the H-bit and M-bit power storage means is made equal by the energy diversion control between the H-bit and M-bit. The ratio matches the target value. Here, the calculation is performed with the amount of charge passing through the H bit, and the determination is made based on the voltage of the power storage means, and the voltage of the H bit and M bit power storage means is controlled at a constant ratio. Needless to say, the same effect can be obtained even if the amount is determined.

FIG. 18 is a flowchart showing the process of the next pre-PWM process gradation voltage Vpk determination routine 64. In this routine, the voltage command value Vsoi (t) = | VLi | · sin (ωt + φi), H bits and M bits as measured values, corresponding to the 1/4 cycle SW pattern determined in the previous switch pattern determination routine. The H-bit and M-bit pre-PWM gradation values Npk = 4 × NH + 2 × NM and the pre-PWM gradation voltage output Vpk = VHB · NH + VMB · NM are determined from the capacitor voltages VHB and VMB.
A quarter cycle switch pattern determined by the processing of the previous switch pattern determination routine 63 is selected. Next, an H-bit output is determined. In the switch pattern 1 (hereinafter referred to as SW1), the gradation value ± 2 is output with only M bits, so the absolute value of the voltage command value Vso is the voltage (hereinafter referred to as VHB) of the H-bit power storage means and the M-bit power. When the storage means voltage (hereinafter referred to as VMB) is equal to or higher than the average value (that is, equivalent to a gradation value of 3 or higher), the H bit is output. The sign of the H-bit gradation value is equal to the sign of Vso. In one switch pattern 2 (hereinafter referred to as SW2), the gradation value ± 2 is output in M bits and H bits, so that the absolute value of the voltage command value Vso (t) is more than half of VMB (that is, gradation) When the value reaches 1), the H bit is output. The sign of the H-bit gradation value is equal to the sign of Vso.
Next, the M-bit output is output when the difference (hereinafter, Vim) between the voltage command value Vso and the H-bit output voltage obtained above becomes half or more of VMB. This code is the same as the Vim code as well as the H bit.

FIG. 19 shows an example of the relationship between the modulated wave and the carrier wave in the | compensation voltage−gradation value | modulation PWM control in the next PWM gradation output determination routine 65 and the generation of the pulse waveform by that. This routine is for outputting a high-accuracy voltage with respect to the voltage command value by controlling the gradation of the H bit and M bit and controlling the L bit by PWM.
First, a gradation value in a state where PWM is not performed is selected, and then a PWM waveform is generated so as to fill an error from the target value. A specific processing flow is shown in FIG. First, a triangular wave or sawtooth wave carrier wave is generated. Then, a modulated wave | voltage command value Vsi−Vpk | obtained from the gradation value Vpk before PWM processing and the voltage command value Vsi is defined. A PWM waveform is generated by comparing the carrier wave and the modulated wave.
FIG. 21 is an enlarged view of each part waveform.

The effects of the invention in the reactive power compensator of Embodiment 1 will be described below.
FIG. 22 is a current voltage waveform showing the effect of the present invention when the load 8 in FIG. 1 is an LR load. Although the phase of the load current is greatly delayed compared to the phase of the grid voltage, the reactive power compensator causes the reactive current to flow, so that the phase of the grid current approaches the phase of the grid voltage and the phase difference is almost zero. Become. As a result, the crest value of the system current becomes smaller than the crest value of the load current, and the loss of resistance is suppressed in the system. At this time, the voltages of the H-bit and M-bit power storage means are controlled to be constant and the operation can be continued.

  FIG. 23 is a current voltage waveform showing the effect of the present invention when the load 8 in FIG. 1 is a capacitor of a three-phase rectifier input. The waveform of the load current becomes two large bump-shaped waveforms and is greatly distorted. However, when the reactive power compensator passes the harmonic current, the distortion of the system current is reduced and approaches the sine wave current. As a result, adverse effects due to harmonics on the equipment connected to the system are reduced. At this time, the voltages of the H-bit and M-bit power storage means are controlled to be constant and the operation can be continued.

FIG. 24 shows the current voltage waveform in which the voltage of the H-bit and M-bit power storage means is controlled to be constant and the operation can be continued even when the two phases of the system voltage drop, that is, the so-called unbalanced state. Show. It can be seen that the U and V phase voltages of the system voltage in the upper diagram of FIG.
At this time, the reactive power compensator passes a reactive current including a reverse phase so that the voltage of the power storage unit becomes constant. Thus, the voltage of the power storage means is controlled to be constant and the operation can be continued.

  In addition, although the case where it applied to a three-phase alternating current circuit was demonstrated above, this invention is applicable also to a single phase alternating current circuit, and there exists an equivalent effect.

Embodiment 2. FIG.
In the first embodiment, the effective current corresponding to the deviation of the energy of the power storage means is added to the current command value that the reactive power compensator should flow for each phase individually, and the current value is output. Even when the system voltage is unbalanced, the energy storage means energy can be continued without being unbalanced in each phase of the reactive power compensator.
In the second embodiment, when the system voltage is unbalanced, the energy imbalance of the power storage means of each phase is improved by flowing a current with a reverse phase current superimposed on the reactive power compensator.

The configuration of the second embodiment is the block diagram of the current control routine described in FIG. 11 of the first embodiment, the H and M-bit power storage means power supply routine (voltage constant control) in FIG. Except for the power supply imbalance improvement routine to be performed, this embodiment is the same as the first embodiment.
When the system voltage is unbalanced, an unbalanced current flows through the reactive power compensator, and the voltage of the power storage means varies in each phase, and there is a possibility that the operation cannot be continued.
Therefore, as shown in FIG. 25, the unbalanced current can be expressed as a positive-phase current and a reverse-phase current. Therefore, by flowing the current of the negative-phase component according to the energy unbalance of the power storage means. The voltage of the power storage means of the reactive power device is balanced. Here, it is assumed that the system is a star-shaped non-grounded system, and no zero-phase component current flows.

  FIG. 26 is an H, M-bit power storage means power supply routine (voltage constant control) 40A in the second embodiment. A deviation between the three-phase average voltage of H and M bits and the target voltage of H and M bits is obtained, and an effective current ΔEci · sin (ωt + φi) is created based on this deviation. By adding this effective current ΔEci · sin (ωt + φi) to the current command of the current control routine 50A in FIG. 27, the effective current is exchanged between the system and the voltage output unit. As described in FIG. 12, the same effect can be obtained even if the deviation of the three-phase average voltage is replaced with the deviation of the three-phase average energy of the power storage means as shown in the equation in FIG.

Further, as shown in a power supply unbalance improvement routine (power storage means voltage imbalance improvement) 80 in FIG. 28, the negative phase component current ΔIci2 (the difference between the power storage means energy of each phase and the three-phase average of the power storage means energy) i = u, v, w). Then, as shown in the block diagram of the current control routine 50A of FIG. 27, the negative value of the negative phase component current ΔIci2 (i = u, v, w) is set to the system current so that the voltage of the power storage means is balanced. Superimpose on the command.
As a result, even when the system voltage is unbalanced with three phases, the voltage of the power storage means is not unbalanced with three phases, and the operation can be continued.

  Further, in each modification of the present invention, instead of the deviation between the energy command value of the power storage means and the feedback value, an effective current value is generated based on the deviation between the voltage command value of the power storage means and the feedback value. As a result, the above-described deviation is easily calculated.

Further, the energy control means for generating a difference command based on the deviation of the inner energy control this held energy detection value detected energy possessed by the power storage means those of interest and the predetermined reference energy of the voltage output unit several The current control means superimposes the deviation command on the current command;
A plurality of unit combination patterns in which a specific period in which there are different combinations of output voltages of energy control target voltage output units under the condition that the AC output voltage command values are the same and the combinations of output voltages of the voltage output units differ from each other in the specific period Unit pattern setting means for setting, passing charge amount calculating means for calculating the passing charge amount in the power storage means of each voltage output unit subject to energy control for each unit combination pattern, and power storage for each voltage output unit subject to energy control Unit voltage detecting means for detecting the voltage ratio of the means, and the unit voltage determining means is configured to select one unit combination pattern from a plurality of unit combination patterns in a direction in which the voltage ratio approaches a predetermined reference value based on the calculated value of the passing charge amount. Select a pattern and based on that pattern Since so as to determine the combination of the output voltage of the voltage output unit, the voltage of the power storage unit is kept constant by a control operation a circuit or software.

  In addition, the energy control means generates the sum of the deviation between the voltage detection value of the power storage means of each voltage output unit and the predetermined reference voltage value as a deviation command instead of the deviation between the stored energy and the reference energy. Therefore, the calculation of the deviation is easily performed.

  Further, the unit pattern setting means may divide one period into a plurality of periods including each specific period when there are a plurality of specific periods within one period of the AC voltage, and the voltage in the specific period within the divided arbitrary period. Since a plurality of unit combination patterns having different combinations of output voltages of the output units are set, the patterns are set appropriately.

  In addition, when the voltage of the power storage means is different from each other in each voltage output unit, the power output means that keeps the voltage constant is connected to the power storage means of the minimum voltage, and the voltage output unit according to the other power storage means Is a unit subject to energy control, so that the constant power supply means can be of a small capacity.

When the reactive power generator is applied to a three-phase AC system,
Find the reverse phase component of each phase deviation between the stored energy of each phase of the power storage means and the stored energy of the three-phase average, and superimpose each phase value of the negative phase component on the current command in the current control means of each phase Therefore, the voltage of each power storage means is kept constant even during three-phase imbalance.
Also, if the reactive power compensator is multiphase,
By adding the active current value generated based on the deviation between the multiphase average energy command value of the power storage means and its feedback value to the command value of the current to be output by the reactive power compensator, the entire multiphase power storage means The energy between the power storage means is kept constant by selecting the combination of the output voltages of the voltage output units.

In addition, the negative phase component of each phase deviation between the energy of the power storage means of each phase and the multiphase average energy is obtained, and the command value of the current to be output by the reactive power compensator is based on each phase value of the negative phase component. Since the generated amount is added, the voltage of each power storage means is kept constant even when unbalanced.
Further, by connecting the constant power supply means only to the minimum voltage unit, the capacity of the constant power supply means is reduced, and the apparatus is downsized.

  Moreover, since the combination of the output voltages of the voltage output unit is selected for each period obtained by dividing a certain period into a plurality of periods, the frequency of switching of the voltage output unit and the switching loss can be suppressed.

  Also, since the positive and negative maximum combinations are selected from the voltage output combinations of each voltage output unit, it is easy to measure the charge amount of the voltage output unit, select the output pattern, and determine the constant voltage ratio. Thus, the constant voltage ratio control of the power storage means of each voltage output unit can be reliably performed.

  Moreover, since the combination which becomes the positive minimum and the negative minimum is selected from the combination of the voltage output of each voltage output unit, the voltage fluctuation of an electric power storage means can be made small.

  In addition, since each voltage output unit has power storage means that is not connected to the constant power supply means, it is possible to omit the power supply for the constant power supply of the voltage output unit.

  Also, since the voltage of the power storage means of each voltage output unit is different from each other, so-called gradation output can be performed, and the output voltage can be multi-leveled and more accurate than a combination of voltage output units of the same voltage. Voltage output is possible.

It is a block diagram of the reactive power compensation apparatus by Embodiment 1 of this invention. It is a block diagram of the voltage output unit of the reactive power compensator by Embodiment 1 of this invention. It is the table | surface showing the output voltage (gray level) of the reactive power compensator by Embodiment 1 of this invention, and the output logic of each unit. It is a figure which shows the modification which remove | eliminated DC power supply connected to the L-bit voltage output unit of the reactive power compensation apparatus by Embodiment 1 of this invention. It is a figure which shows the modification which made the H-bit voltage output unit the three-phase 3 level inverter as a reactive power compensation apparatus by Embodiment 1 of this invention. 1 is a control flowchart of the entire reactive power compensator according to Embodiment 1 of the present invention. 3 shows a system instantaneous power and a system instantaneous imaginary power routine of the control system of the reactive power compensator according to Embodiment 1 of the present invention. 3 shows a matrix of three-phase to two-phase conversion according to Embodiment 1 of the present invention. 1 shows a numerical calculation formula of a fundamental wave amplitude extraction filter routine according to Embodiment 1 of the present invention. 3 is a flowchart of a system current deriving routine according to Embodiment 1 of the present invention. FIG. 3 is a block diagram of a current control routine according to Embodiment 1 of the present invention. 3 is a flowchart of an H and M bit power storage means power supply routine (voltage constant control) according to Embodiment 1 of the present invention. FIG. 3 is a block diagram of a high-accuracy voltage output routine according to Embodiment 1 of the present invention. FIG. 2 is a diagram illustrating a one-period pattern table and an SW pattern according to Embodiment 1 of the present invention. 3 is a flowchart of a charge amount calculation routine according to Embodiment 1 of the present invention. 3 is a flowchart of a switch pattern candidate determination routine according to Embodiment 1 of the present invention. 3 is a flowchart of a switch pattern determination routine according to Embodiment 1 of the present invention. 3 is a flowchart of a pre-PWM processing gradation voltage Vpk determination routine according to the first embodiment of the present invention. FIG. 9 shows a voltage output of | compensation voltage−gradation value | modulation PWM control according to the first embodiment of the present invention. FIG. 3 is a flowchart of a PWM gradation output determination routine according to Embodiment 1 of the present invention. FIG. 9 shows a voltage output of | compensation voltage−gradation value | modulation PWM control according to the first embodiment of the present invention. FIG. The effect of the reactive power compensation by Embodiment 1 of this invention is shown. The active filter effect by Embodiment 1 of this invention is shown. The effect of the continuation of operation in the system voltage imbalance by Embodiment 1 of this invention is shown. In Embodiment 2 of this invention, it is a figure explaining canceling | eliminating that the voltage of the electric power storage means of each phase does not become fixed by the unbalanced current by an unbalanced system voltage flowing. 7 is a flowchart of an H and M bit power storage means power supply routine (voltage constant control) according to Embodiment 2 of the present invention. FIG. 5 is a block diagram of a current control routine according to Embodiment 2 of the present invention. 7 is a flowchart of a power supply imbalance improvement routine (capacitor voltage imbalance improvement) according to Embodiment 2 of the present invention. It is the figure which showed the structure of the uninterruptible power supply device of the conventional power converter device.

Explanation of symbols

1 system power supply, 2 voltage output unit, 3 power storage means, 4 system voltage,
5 load voltage, 6 system inductance, 7 reactive power compensator, 8 load,
9 Output filter reactor, 10 Reactive power compensator current (compensation current),
11 system current, 12 load current, 20-23 switch,
30 system instantaneous power _{P P} system instantaneous imaginary power _{Q P} routine,
40, 40 AH, M-bit power storage means power supply routine,
50, 50A current control routine, 60 high precision voltage output routine,
61 charge amount calculation routine, 70 gate generation circuit, 80 power supply imbalance improvement routine.

Claims (15)

Three or more voltage output units that convert the DC voltage of the power storage means into AC voltage, the AC output side is connected in series, and the sum of the AC voltages output from the plurality of voltage output units is the AC output voltage. Is a reactive power compensator that compensates for reactive power of a system circuit,
Current control means for calculating an AC output voltage command value so that the detected current value follows the current command, unit voltage determining means for determining a combination of output voltages of the voltage output units based on the AC output voltage command value, and the voltage Means for making the voltage ratio of the power storage means of each voltage output unit constant except for the minimum voltage unit with the smallest output voltage by selecting a combination of output voltages of the output units, and the reactive power compensator to output Means for adding an effective current value generated based on the deviation between the energy command value of the power storage means and its feedback value to the current command value;
The unit voltage determining means is a gradation voltage determining means for determining a combination of output voltages of the voltage output units to output a gradation voltage based on the voltage output unit excluding the minimum voltage unit, and the AC output voltage. Pulse width modulation means for pulse width modulating the minimum voltage unit so that the deviation between the command value and the gradation voltage output is zero;
Further, the voltage of the power storage means of the minimum voltage unit is set to a voltage corresponding to the gradation value of the gradation voltage = 1, and the minimum voltage unit includes the AC output voltage command value and the gradation voltage output. A reactive power compensator that outputs a positive or negative pulse width modulation voltage based on a comparison with the above . The effective current value is generated based on the deviation between the voltage command value of the power storage means and the feedback value instead of the deviation between the energy command value of the power storage means and the feedback value. The reactive power compensator according to Item 1. Comprises an energy control means for generating a difference command based on the deviation of the upper Symbol plurality of the holders energy detection value detected energy possessed by the power storage means that the inner energy control target of the voltage output unit and a predetermined reference energy The current control means superimposes the deviation command on the current command,
A specific period in which different combinations of output voltages of the energy control target voltage output unit exist under the condition that the AC output voltage command values are the same, and a plurality of combinations of the output voltages of the voltage output units differ from each other in the specific period Unit pattern setting means for setting the unit combination pattern, passing charge amount calculation means for calculating the passing charge amount in the power storage means of each voltage output unit of the energy control target for each unit combination pattern, and the energy control target Unit voltage detection means for detecting the voltage ratio of the power storage means of each voltage output unit, the unit voltage determination means is based on the calculated value of the passing charge amount and the voltage ratio approaches the predetermined reference value. From multiple unit combination patterns Number of patterns is selected, reactive power compensation apparatus according to claim 1, characterized in that characterized in that so as to determine the combination of the output voltage of each voltage output unit based on the pattern. The energy control means creates a sum of deviations between the voltage detection value of the power storage means of each voltage output unit and a predetermined reference voltage value as the deviation command, instead of the deviation between the held energy and the reference energy. 4. The reactive power compensator according to claim 3, wherein: The unit pattern setting means divides the one period into a plurality of periods including the specific periods when there are a plurality of the specific periods in one period of the AC voltage, and specifies the specific periods in the divided arbitrary periods. 5. The reactive power compensator according to claim 3 or 4, wherein a plurality of unit combination patterns having different combinations of output voltages of the voltage output units in a period are set. When the voltage of the power storage means is different from each other by the voltage output units, the power storage means of the minimum voltage is connected to a constant power supply means for keeping the voltage constant, and the voltage output unit according to the other power storage means the reactive power compensator according to any one of claims 3 to 5, characterized in that the said energy control target unit. When the reactive power compensator is applied to a three-phase AC system,
Find the reverse phase component of each phase deviation between the stored energy of each phase of the power storage means and the stored energy of the three-phase average, and superimpose each phase value of the negative phase component on the current command in the current control means of each phase The reactive power compensator according to claim 3, wherein the reactive power compensator is configured as described above . When the reactive power compensator is multiphase,
The active current value generated based on the deviation between the multiphase average energy command value of the power storage means and its feedback value is added to the command value of the current to be output by the reactive power compensator. The reactive power compensator as described . The negative phase component of each phase deviation between the energy of the power storage means of each phase and the average energy of the multiphase is obtained, and the command value of the current to be output by the reactive power compensator is based on each phase value of the negative phase component. 9. The reactive power compensator according to claim 8, wherein the generated amount is added . 2. The minimum voltage unit has power storage means connected to a constant power supply means, and the other voltage output unit has power storage means not connected to the constant power supply means. The reactive power compensator as described . 2. The reactive power compensator according to claim 1, wherein a combination of output voltages of the voltage output unit is selected for each period obtained by dividing a certain period into a plurality of periods . 2. The reactive power compensator according to claim 1, wherein a combination having a positive maximum and a negative maximum is selected from a combination of voltage outputs of the voltage output units . 2. The reactive power compensator according to claim 1, wherein a combination of positive minimum and negative minimum is selected from combinations of voltage outputs of the voltage output units . 2. The reactive power compensator according to claim 1, wherein each of the voltage output units includes a power storage unit that is not connected to a constant power supply unit . 2. The reactive power compensator according to claim 1, wherein the voltages of the power storage means of the voltage output units are different from each other.

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