JP5374808B2 - Variable passive device and semiconductor device using the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a variable passive device having a large variable width for reducing the number of elements to be mounted. <P>SOLUTION: The variable passive device includes a plurality of passive elements 1a, 1b, and 1c formed on a substrate 3 and a plurality of switch elements 2 for selecting the desired element from the plurality of passive elements, and executes at least one of serial and parallel connections of the plurality of selected elements. Characteristic value of the passive element (at least any one of inductance, capacitance, and resistance) can be varied with the switch element. The plurality of passive elements are formed by lamination thereof and the switch element 2 is formed under these passive elements. Typically, the plurality of passive elements are constituted with a spiral coil in which a current flows in the same direction. <P>COPYRIGHT: (C)2008,JPO&amp;INPIT

Description

  BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a variable passive device suitably used for a high frequency circuit and a semiconductor device using the variable passive device, and in particular, a variable passive device capable of making a passive element characteristic value variable with a large variable width and reducing the number of mounted components. The present invention relates to a device and a semiconductor device using the device.

  In recent years, the number of parts of electronic devices such as small portable devices typified by mobile phones, whose performance has been increasing, has greatly increased. It is required to store a large number of parts. Many types of high-frequency circuits are used in electronic devices, and the high-frequency circuits are composed of a large number of components such as semiconductor chips and passive elements (inductors, capacitances, resistors). In order to reduce the size of electronic devices, in general, components that can be integrated among these components are mounted on a substrate or a package and used as a module.

  As a high-frequency circuit used in a radio communication apparatus that can handle a plurality of frequency bands, there is a system in which a plurality of high-frequency circuits corresponding to a frequency band are provided and the high-frequency circuit is selectively used for each frequency band.

  There is a strong demand for thinner, smaller, and lower-cost electronic devices. As a mounting technology to meet these demands, SiP (System in Package) that mounts multiple passive components and semiconductor chips in one package There is a WLP (Wafer-level Process) technology for manufacturing a package in which all processes are completed at the wafer level and a chip pad electrode is connected to an external connection terminal via a conductor line of a redistribution layer. In addition, a method of forming a passive element using a rewiring layer has been studied.

  For example, there are the following reports regarding variable inductance.

  Patent Document 1 below entitled “Oscillation Circuit and Load Operation Circuit” has the following description.

  The invention of Patent Document 1 is an oscillation circuit that oscillates by positive feedback of an LC resonance circuit, and the LC resonance circuit includes an inductance variable unit that varies the inductance by a switch circuit, and a capacitive element.

  18 (a), 18 (b), and 18 (c) are respectively FIGS. 2, 4, and 9 described in Patent Document 1, and FIG. 18 (a) is an example of the configuration of the inductance variable unit. 18 (b) is an equivalent circuit diagram of the inductance variable section shown in FIG. 18 (a), and FIG. 18 (c) is a configuration of a modified example of the inductance variable section shown in FIG. 18 (a). FIG.

  As shown in FIG. 18A, the inductance variable unit Lvar1 includes a spiral wiring layer formed on an unillustrated semiconductor substrate via an interlayer insulating film, and switch circuits SW1 to SW3. The spiral wiring layer is formed of, for example, a metal material such as aluminum or copper, and the shape thereof is not limited to a quadrangle as shown in FIG. 18A, but includes other polygons and circles.

  Each of the switch circuits SW1 to SW3 has a first terminal connected to each turn of the spiral wiring layer and a second terminal connected to an input / output terminal of the inductor element. Control signals S1 to S3 for controlling the on / off operation are input to the switch circuits SW1 to SW3, respectively.

  As shown in FIG. 18B, the inductance variable unit Lvar1 is divided into three inductor elements L1, L2, and L3 by switch circuits SW1 to SW3 arranged for each turn. Here, the inductance values of the inductor elements are L1, L2, and L3, respectively.

  For example, when the switch circuit SW1 is turned on, the inductance value of the entire inductor element is L1. Further, the inductance value when the switch circuit SW2 is turned on is (L1 + L2). Thus, by selectively turning on any one of the switch circuits SW1 to SW3, the obtained inductance value is set to a discrete value having a variable range from L1 to (L1 + L2 + L3). Become.

  In the modification shown in FIG. 18C, the inductance variable portion Lvar1 is coupled between a plurality of inductor elements L1 to L3 having different inductances and one end of a spiral wiring layer (not shown) of each inductor element and an input / output terminal. Switch circuits SW1 to SW3 are provided.

  The inductor variable section in FIG. 18A has a variable inductance by disposing a plurality of switch circuits in one spiral upper wiring layer, whereas the inductor element in FIG. One spiral wiring layer is provided with one switch circuit. Therefore, in the inductor variable section of FIG. 18C, the inductance can be changed by turning on only the switch circuit corresponding to the inductor element having the desired inductance.

  Patent Document 2 below entitled “Surface Mount Antenna” has the following description.

  FIG. 19A is FIG. 1 described in Patent Document 2, and is a perspective view showing the surface-mounted antenna according to the first embodiment. FIG. 19B is an equivalent circuit diagram of the surface-mounted antenna according to the first embodiment shown in FIG.

  In FIG. 19A, a surface-mounted antenna 401 has a radiation electrode 403, a ground electrode 404, a supply electrode 405, and a frequency switch on the surface of a base body 402 formed by molding a dielectric material such as ceramic or resin into a rectangular parallelepiped shape. Means 406 are provided. The base body 402 may be made of a magnetic material instead of a dielectric.

  Here, the radiation electrode 403 includes a first line 403a, a second line 403b, and a third line 403c, which are microstrip lines formed separately on one surface 402a of the base body 402. The Among these, one end of the first line 403a forms an open end 403a1, and the other end is formed with an extending portion 403a2 extending substantially at the center of one main surface 402a of the base body 402. The second line 403b is disposed on the extension c of the first line 403a, and one end is close to the other end of the first line 403a. The other end of the second line 403 b extends to the other main surface 402 b via the end surface 402 c of the base body 402. The third line 403c has an extending portion 403c1, and is continuous with the vicinity of one end of the second line 403b via the extending portion 403c1, and is formed integrally with the second line 403b. .

The ground electrode 404 is formed on substantially the entire other main surface 402b of the base body 402, is continuous with the other end of the second line 403b of the radiation electrode 403, and is formed integrally with the second line 403b.
Further, the supply electrode 405 is formed in a substantially U shape over the one main surface 402a, the end surface 402d, and the other main surface 402b of the base body 402. One end of the supply electrode 405 is close to the open end 403 a 1 of the radiation electrode 403 on one main surface 402 a of the base body 402. Further, the other end is electrically insulated from the ground electrode 404 by being disposed on the other main surface 402 b of the base body 402 with respect to the ground electrode 404 through the base of the base body 402.

  The frequency switching means 406 includes a switching electrode 407, a choke resistor 408, a diode 409 as a semiconductor element, and a bypass capacitor 410. Of these, the resistor 408, the diode 409, and the capacitor 410 are each formed of chip components. In addition to the diode, for example, an element such as a transistor or an FET may be used as the semiconductor element.

  Here, the switching electrode 407 reaches from the vicinity of the open end 403a1 of the radiation electrode 403 on the one main surface 402a of the base body 402 to the other main surface 402b via the side surface 402e of the base body 402. By being disposed through the base body 402, it is electrically insulated from the ground electrode 404. The resistor 408 is disposed between the open end 403a1 side of the first line 403a of the radiation electrode 403 and the switching electrode 407, and connects the first line 403a and the switching electrode 407. The diode 409 is disposed between the first and second lines 403a and 403b constituting the radiation electrode 403, and connects these two lines. The capacitor 410 is disposed between the extending portion 403a2 of the first line 403a and the third line 403c, and connects the two lines.

  Although not particularly shown, the surface-mounted antenna 401 configured as described above is mounted on a circuit wiring board, and the switching electrode 407 is used by being connected to a voltage control mechanism on the set side. Next, the operation of the surface mount antenna 401 will be described with reference to FIG.

  In FIG. 19B, f is a high-frequency signal source, C1 is a capacitance generated between the open end 403a1 of the radiation electrode 403 and the supply electrode 405, and C2 is generated between the ground electrode 404 and the supply electrode 405. C3 is a capacitance generated between the open end 403a1 of the first line 403a of the radiation electrode 403 and the ground electrode 404. R1 is a resistance due to the resistor 408, and C4 is a capacitance due to a bypass capacitor (not shown) provided on a circuit wiring board on which the surface mount antenna 401 is mounted. L1, L2, and L3 are microstrip lines constituting the first to third lines 403a, 403b, and 403c, respectively, and C5 is a capacitance of the capacitor 410. The diode 409 constituting the frequency switching means 406 is connected in series between the first and second lines 403a and 403b, and the third line 403c is between the first and second lines 403a and 403b. And connected in parallel to the diode 409. The high-frequency signal applied from the high-frequency signal source f to the supply electrode 405 is electromagnetically coupled to the radiation electrode 403 by the capacitor C1 and radiated as radio waves.

  Here, a voltage is applied from a voltage control mechanism (not shown) on the set side to the diode 409 constituting the frequency switching means 406 of the surface-mounted antenna 401, and this input voltage is adjusted, whereby The diode 409 is turned on / off. When the diode 409 is off, the first to third lines 403a, 403b, and 403c constituting the radiation electrode 403 are electrically connected to each other, and the inductance component of the surface mount antenna 401 is constituted by the microstrip lines L1, L2, and L3. Is done. On the other hand, when the diode 409 is on, only the first line 403a and the second line 403b are conducted, and the inductance component of the surface-mounted antenna 401 is constituted by the microstrip lines L1 and L2. In this way, by turning on / off the diode 409 and changing the inductance component that defines the resonance frequency of the antenna, a plurality of resonance frequencies can be realized.

  In Patent Document 3 below titled “Magnetic Film and Method for Forming the Same”, a fine powder as a raw material of the magnetic film to be formed is aerosolized and collided with an object to be deposited such as a substrate to form a thick film. There is a description of an apparatus for forming a magnetic film for performing an aerosol deposition (AD) method.

JP 2004-266718 A (paragraph 0026, paragraphs 0040-0050, paragraphs 0076-0079, FIG. 2, FIG. 4, FIG. 9) JP 11-68456 A (paragraphs 0013 to 0023, FIGS. 1 and 2) Japanese Patent Laying-Open No. 2003-297628 (paragraphs 0022 to 0028, FIG. 1)

  Many types of high-frequency circuits are used for electronic devices, and many passive elements are used for high-frequency circuits. For example, in an RFIC of a mobile phone communication system, it is necessary to mount and incorporate a large number of inductors when performing signal processing on the order of GHz. In addition, since the frequency of transmission / reception differs for mobile phones and the frequency used for LAN, mobile, PHS, etc., the constants of passive components (LCR) required for the matching circuit for each frequency (in the following description, The constant is called a passive element characteristic value. When the passive element is an inductor, the characteristic value is an inductance. When the passive element is a capacitor, the characteristic value is a capacitance. When the passive element is a resistor, the characteristic value is a resistance. .) Changed and required many passive components.

  In addition, for example, a plurality of high-frequency circuits corresponding to frequency bands are provided, and the high-frequency circuits are selectively used for each frequency band. In a wireless communication apparatus corresponding to a plurality of frequency bands, the frequency band is selectively used for each frequency band. Since the independent high-frequency circuits used are formed, the formation of the high-frequency circuits for each system requires a large number of passive elements, which makes it difficult to reduce the size and cost. .

  Since a high frequency circuit requires a large number of passive elements, the cost and the mounting area increase, which is an obstacle to miniaturization of electronic devices. In order to realize downsizing and cost reduction of electronic equipment, it is desirable to be able to mount on a small area using small passive components. In a high-frequency circuit, if a large inductance is to be realized by a spiral coil or the like that is often used, a large mounting area is required, which makes it difficult to reduce the size of the high-frequency circuit. ing.

  In particular, if the variable inductor has a large variable width and can be formed on a semiconductor chip in a small area, it is possible to consolidate elements, leading to a reduction in mounting area, cost, and manufacturing process, and advantages in manufacturing electronic devices. Is very big.

  In the conventional variable passive element, sufficient consideration has not been given to forming the variable passive element with a small area and increasing the variable width.

  The present invention has been made to solve the above-described problems, and its purpose is to make the passive element characteristic value variable with a large variable width, and to reduce the number of mounted components. It is to provide a variable passive device that can be used.

  That is, according to the present invention, a plurality of passive elements formed on a substrate, a desired passive element selected from the plurality of passive elements, and a plurality of the selected passive elements are connected in series or in parallel. And a plurality of switch elements for executing at least one of the above and a variable passive device having a passive element characteristic value variable by the switch element.

  The present invention also relates to a semiconductor device using the above variable passive device.

  According to the present invention, at least one of selecting a desired passive element from a plurality of passive elements formed on a substrate and connecting the selected plurality of passive elements in series or in parallel is performed. Therefore, it is possible to provide a variable passive element that can vary the characteristic value of the passive element with a large variable width. By using this variable passive element, it is possible to provide a semiconductor device that can reduce the number of mounted components and can be reduced in size and cost.

  In the variable passive device of the present invention, the passive element characteristic value is at least one of inductance, capacitance, and resistance. The plurality of passive elements include at least one of an inductor, a capacitor, and a resistor, and at least one of inductance, capacitance, and resistance (passive element characteristic value) can be made variable.

  In addition, it is preferable that the plurality of passive elements are stacked. Since the plurality of passive elements are stacked, a variable passive element can be formed with a small area, and the semiconductor device can be reduced in size and cost.

  The switch element may be formed below the plurality of passive elements. Since the switch element is formed below the switch element and the plurality of passive elements, the semiconductor device can be reduced in size and cost.

  The plurality of passive elements may be inductor elements configured by spiral coils. It is possible to provide a variable inductor element that is small and has a large variable width of inductance by forming an inductance element by a spiral coil and forming a plurality of spiral coils by stacking without requiring a large area. it can. By using this, the number of mounted components can be reduced, and a semiconductor device having a high-frequency circuit requiring a large inductance as a circuit element can be reduced in size and cost.

  The spiral coils may be configured so that current flows in the same direction. Since currents flow through the spiral coils in the same direction, the magnetic fluxes generated by the spiral coils are not canceled out. Therefore, the variable inductor element is formed with a small area, gives a large inductance, and has a large capacitance. A variable width can be realized.

  Further, it is preferable that the switch element is controlled in accordance with the frequency of the signal, the desired passive element is selected, and the inductance is variable. For example, in a wireless communication device, the switching element is controlled according to the frequency of a transmission signal and a reception signal, respectively, and an inductor element required for each high-frequency circuit that performs signal processing of the transmission signal and the reception signal is selected. Is done. Passive elements used in the high-frequency circuit of each system for each frequency of the signal are shared, and passive elements are selected and used according to each system, so if multiple high-frequency circuits are required, miniaturization of electronic equipment, A variable passive device that can reduce the cost can be provided.

  The passive element is preferably a capacitor element. A capacitor element can be used in the same way as the sharing of the inductance element described above, and when a plurality of high-frequency circuits such as a resonance circuit are required, it contributes to downsizing and cost reduction of the electronic device.

  The substrate may be a semiconductor substrate, and the switch element may be incorporated in the semiconductor substrate. Since the plurality of passive elements and the switch elements are incorporated in the same semiconductor substrate, a variable passive device can be manufactured efficiently and inexpensively through a series of processes using a wafer level process.

  The semiconductor device of the present invention is preferably a mobile phone in which a variable passive device is incorporated. By incorporating a variable passive device as a mobile phone component, in a mobile phone that transmits and receives using a plurality of frequencies, a high-frequency circuit that performs filtering and frequency separation is reduced by reducing the number of mounted components. It is small and can be manufactured at low cost.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In each drawing, only the variable passive device according to the embodiment is shown, and an analog circuit and a digital circuit constituting the semiconductor device are formed on the same semiconductor substrate, but these circuits are omitted. .

  In the following description, a variable passive device having a function of a variable inductor that varies the inductance will be described as an example of a variable passive device.

  In many types of high-frequency circuits, it is necessary to mount a large number of inductors for each frequency or frequency band of a signal. However, in the embodiment of the present invention, a configuration in which an inductor required for each frequency or frequency band is shared is used. In the configuration, a necessary inductor is selected for each frequency or frequency band by a switch circuit. As the switch of the switch circuit, an MMIC (Microwave Monolithic IC) switch or the like is used. The inductor and the switch circuit are designed in consideration of the variable width of the inductance, and the inductance is changed according to the truth table of on / off of the switch by the control signal voltage.

  By connecting the inductors selected by the switch circuit in series or in parallel, the inductance can be made variable and controlled. The variable width of the inductance can be adjusted in advance at the design stage based on simulation calculation.

  By forming the inductor in the high dielectric film, the Q value increases. Further, if the cross-sectional area in the direction of the current flowing through the conductor forming the inductor is increased, the Q value can be increased.

  The inductor element constituting the variable inductor is typically constituted by a spiral coil. The variable inductor includes a plurality of stacked spiral coils and a switch circuit to which these spiral coils are connected. By selecting a spiral coil and connecting it in series or in parallel using an MMIC switch circuit formed below the plurality of spiral coils, the inductance can be made variable.

  The plurality of spiral coils are disposed above the switch circuit formed on the semiconductor substrate. By forming a plurality of spiral coils above the switch circuit, for example, immediately above it, the chip area can be reduced. The plurality of spiral coils may be formed inside a substrate disposed on the semiconductor substrate.

  The inductance can be varied by connecting the spiral coils selected by the switch circuit in series or in parallel. For example, by switching the switch of the switch circuit for each signal frequency or frequency band, the frequency or frequency band of the signal can be changed. The inductance can be made variable corresponding to the above. The selection of the spiral coil to be connected is performed according to the truth table by the control signal input to the switch circuit corresponding to the frequency or frequency band of the signal, and a desired inductance can be selected.

  The variable width of the inductance of the variable inductor changes the conditions such as the ratio of the diameter (number of turns) and thickness of each spiral coil and the diameter (number of turns) of the spiral coil with respect to a plurality of spiral coils. Thus, the inductance can be estimated based on the simulation calculation and adjusted in advance at the design stage. Therefore, in order to generate the desired multiple values of inductance within the range of variable width, what conditions (eg, number of turns, conductor thickness, conductor length, etc.) It is possible to form a variable inductor having a desired function by designing in advance based on simulation calculation whether it is necessary to form a coil having the condition.).

  In addition, the wiring structure in which the coupling coefficient between the spiral coils can be maximized between the laminations by the laminated structure of the spiral coils so that the direction of the current flowing through each spiral coil is the same, so that it is generated in each spiral coil. The direction of the magnetic flux to be aligned can be increased, the inductance can be increased, and the Q value can be improved. That is, the switch circuit is connected so that the current flows in the same circulation direction in each spiral coil, the current flows from the switch circuit to each spiral coil from the same direction, and the current flows from each spiral coil to the switch circuit from the same direction. Align the direction of the direction and the out direction.

  In the configuration of the variable inductor using a plurality of spiral coils, a variable passive device that functions as a variable capacitor with variable capacitance can be configured by replacing each spiral coil with a capacitor. By using a variable passive device that functions as a variable capacitor and a variable passive device that functions as a variable inductor, a desired one can be selected from a plurality of spiral coils and capacitors formed in advance and connected in series or in parallel. An LC circuit having a resonance frequency can be formed.

  Hereinafter, the configuration of a variable passive device that functions as a variable inductor will be described in detail.

  1A and 1B are diagrams illustrating a configuration example of a variable passive device according to an embodiment of the present invention. FIG. 1A is a plan view, FIG. 1B is a cross-sectional view of a WW portion, and FIG. (C) is a figure which shows the element of a variable passive element.

  In the configuration example shown in FIG. 1A, the variable passive device includes three layers of a first layer passive element 1a, a second layer passive element 1b, and a third layer passive element 1c, and is formed inside the insulating layer 4b. The passive element layer and the switch circuit 2 to which the passive element of each layer is connected are formed on the silicon substrate 3. The passive elements of the first-layer passive element 1a, second-layer passive element 1b, and third-layer passive element 1c are the first-layer passive element wiring conductor 9a, the second-layer passive element wiring conductor 9b, and the third-layer passive element wiring conductor 9b, respectively. The layer passive element wiring conductor 9c is connected to the input / output terminals (pads) of the switch circuit 2 for the passive elements of each layer separated by the insulating layer 4a.

  The switch circuit 2 includes an input terminal (current is input from an external circuit) to which the input terminals for the passive elements in each layer are connected via the switch elements, and an output terminal for the passive elements in each layer. An output terminal (current is output to an external circuit) connected via the element and a control signal input terminal are provided. Further, the switch element is input to the passive element of each layer as necessary. Between the terminals, between the output terminals for the passive elements of each layer, and between the input and output terminals for the passive elements of each layer. As the switch element, for example, an FET (field effect transistor) element, a diode element, or the like is used.

  Based on a control signal input to the switch circuit 2, a plurality of switch elements constituting the switch circuit 2 can generate a desired passive signal from the first layer passive element 1a, the second layer passive element 1b, and the third layer passive element 1c. At least one of selecting an element and connecting a plurality of selected passive elements in series or in parallel is performed. As a result, a current path by the passive elements of each layer is set by the plurality of switch elements in order to generate a desired passive element characteristic value.

  The current output terminal (output terminal for outputting current to the external circuit) and the current input terminal (input terminal for inputting current from the external circuit) of the switch circuit 2 are the passive elements of each layer selected by the switch element, respectively. It is connected to an external circuit (not shown) that is connected and used.

  The arrows in the cross-sectional view shown in FIG. 1B indicate currents flowing through the respective wiring conductors of the first layer passive element wiring conductor 9a, the second layer passive element wiring conductor 9b, and the third layer passive element wiring conductor 9c. The direction, that is, the IN direction in which current is input from the switch circuit 2 to the passive element of each layer, and the OUT direction in which current is input from the passive element of each layer to the switch circuit 2 are shown. As shown in FIG. 1B, each wiring conductor is not arranged between the passive elements of each layer, but is arranged in the lateral direction of the passive elements of each layer, thereby reducing the thickness of the three-layer passive element layer. I am trying. In addition, substrate wiring materials, such as aluminum wiring and copper wiring, are used for each wiring conductor.

  In the example shown in FIG. 1, the first-layer passive element 1a, the second-layer passive element 1b, and the third-layer passive element 1c are formed in layers, and the switch circuit 2 is disposed below them. Other arrangements are possible. Although the area increases, the first-layer passive element 1a, the second-layer passive element 1b, and the third-layer passive element 1c are formed so as to be on the same plane, and the switch circuit 2 is disposed below or laterally. You can also.

  As shown in FIG. 1C, as an element of a variable passive element, a spiral inductor having various winding numbers and lengths as a representative example, between two electrodes formed with various areas and intervals. There are a capacitor in which various dielectrics are arranged, and a resistor in which two electrodes formed with various areas and intervals are connected by various resistors. The inductor may be another type of coil such as a meander coil. A semiconductor resistance element may be used as the register.

  The dielectric layer of the capacitor element can be formed using a dielectric material in which a high dielectric constant filler is dispersed in a thermosetting resin. As the high dielectric constant filler, for example, titanate, zirconate, or a dielectric ceramic composition can be used. The resistance layer of the register element can be formed using a resistance material in which a conductive filler is dispersed in a thermosetting resin. As a conductive filler, metal fillers, such as a carbon filler, copper, silver, nickel, chromium, can be used, for example. As the thermosetting resin, it is preferable to use an epoxy resin from the viewpoint of heat resistance and electrical insulation.

  Although FIG. 1 illustrates three passive element layers, the passive element layer is not limited to three layers, and may be two layers or four or more layers.

  Next, a configuration example of a variable passive device including the first layer passive element 1a, the second layer passive element 1b, and the third layer passive element 1c will be described.

  (1) The first-layer passive element 1a, the second-layer passive element 1b, and the third-layer passive element 1c can be inductors configured by spiral coils. A plurality of spiral coils may be formed in each of the first layer passive element 1a, the second layer passive element 1b, and the third layer passive element 1c. A meander coil can be used instead of the spiral coil. Further, the number of passive element layers is not limited to three, that is, the first layer passive element 1a, the second layer passive element 1b, and the third layer passive element 1c.

  (2) The first layer passive element 1a, the second layer passive element 1b, and the third layer passive element 1c can be capacitors. A plurality of capacitors may be formed in each layer of the first layer passive element 1a, the second layer passive element 1b, and the third layer passive element 1c. Further, the number of layers is not limited to three, that is, the first layer passive element 1a, the second layer passive element 1b, and the third layer passive element 1c.

  (3) The first layer passive element 1a, the second layer passive element 1b, and the third layer passive element 1c can be used as registers. A plurality of registers may be formed in each of the first layer passive element 1a, the second layer passive element 1b, and the third layer passive element 1c. Further, the number of passive element layers is not limited to three, that is, the first layer passive element 1a, the second layer passive element 1b, and the third layer passive element 1c.

  (4) The first-layer passive element 1a, the second-layer passive element 1b, and the third-layer passive element 1c are different types of passive elements, and each layer composed of an inductor, a capacitor, and a resistor is a passive-element layer 1a, Correspond to 1b and 1c. However, it is arbitrary which type of passive element corresponds to which layer. A plurality of passive elements can be formed in each layer. Further, a plurality of layers of the first layer passive element 1a, the second layer passive element 1b, and the third layer passive element 1c may be provided, and the number of passive element layers may be four or more.

  (5) Arbitrary variable inductor by a plurality of inductors and a switch circuit to which these are connected, a variable capacitor by a plurality of capacitors and a switch circuit to which these are connected, a variable resistor by a plurality of resistors and a switch circuit to which these are connected, And can be integrated into a variable passive device. In this variable passive device, the passive elements can be connected in series or in parallel.

  (6) A passive element formed by laminating a plurality of layers formed by arbitrarily combining a single or a plurality of inductors, a single or a plurality of capacitors, a single or a plurality of resistors, and the passive elements in these layers are connected. The switched switch circuit is formed on a silicon substrate, and an inductor, a capacitor, and a resistor can be selected and connected in series or in parallel by the switch circuit, and a variable passive device can be obtained.

  Of the passive elements, a spiral coil is often used to obtain an inductor having a large value. However, in order to configure a variable inductor without increasing the area, the spiral coil has a large variable width. What is necessary is just to comprise by laminating | stacking a spiral coil in at least 2 layers or more. In order to configure a variable inductor having a larger variable width, a plurality of layers each having one or more spiral coils may be stacked.

  When the variable passive device includes an inductor, for example, when the first layer passive element 1a, the second layer passive element 1b, and the third layer passive element 1c include an inductor, as shown in FIG. The current from the switch circuit 2 is formed in the same direction from the surrounding conductor portions (spiral shape, meander shape, etc.) of the first layer passive element 1a, the second layer passive element 1b, and the third layer passive element 1c. Current flowing in the same circuit direction through these circuit conductor parts substantially parallel to the surface of the switch circuit 2 and returning to the switch circuit 2 from these circuit conductor parts. The direction of (return current) is orthogonal to the surface of the switch circuit 2 so that the magnetic coupling between the magnetic flux caused by the return current and the magnetic flux caused by the current flowing through the switch circuit 2 is minimized. .

  Further, the first layer passive element 1a, the second layer passive element 1b, and the third layer passive element 1c can be formed on a substrate made of an inorganic or organic material. An inorganic or organic material substrate on which the first layer passive element 1a, the second layer passive element 1b, and the third layer passive element 1c are formed is electrically connected to the switch circuit 2 by a bump electrode and stacked in the vertical direction. .

  Next, an inductor will be described in detail as a specific example of the passive element.

  2A and 2B are diagrams illustrating a configuration example of a variable passive element that functions as a variable inductor in the embodiment of the present invention. FIG. 2A is a plan view showing a switch circuit, and FIG. 2B is a spiral. It is sectional drawing which shows the example of a connection of a coil and a switch circuit.

  In the configuration example of the present embodiment, the first layer passive element 1a, the second layer passive element 1b, and the third layer passive element 1c shown in FIG. 1 are respectively a first layer spiral coil (L1) 10 and a second layer spiral. The inductor includes a coil (L2) 20 and a third layer spiral coil (L3) 30.

  In the configuration example shown in FIG. 2, the variable inductor includes three inductor layers formed inside the insulating layer 7 and a switch circuit 18 to which a spiral coil forming the inductor of each layer is connected. Is formed.

  The current input terminal and current output terminal of the first layer spiral coil (L1) 10 are connected to the input terminal 14-1 and output terminal 16-1 of the switch circuit 18 by wiring conductors, respectively, and the second layer spiral coil (L2). The current input terminal 20 and the current output terminal 20 are connected to the input terminal 14-2 and the output terminal 16-2 of the switch circuit 18 by wiring conductors, respectively, and the current input terminal and current output of the third layer spiral coil (L3) 30 are connected. The ends are respectively connected to the input end 14-3 and the output end 16-2 of the switch circuit 18 by wiring conductors. Input / output terminals (pads) for the spiral coils of each layer are separated by an insulating layer 17.

  The switch circuit 18 is provided with an input terminal (IN) to which current is input from an external circuit (not shown) and an output terminal (OUT) from which current is output to the external circuit.

  The input terminal (P1in) 14-1 to which the current input terminal of the first layer spiral coil (L1) 10 is connected, and the input terminal (P2in) 14- to which the current input terminal of the second layer spiral coil (L2) 20 is connected. 2. The input terminal (P3in) 14-3 to which the current input terminal of the third layer spiral coil (L3) 30 is connected is connected to the switches (SW1, SW2, SW3) 12-1, 12-2, 12-3, respectively. To the input terminal (IN).

  The output terminal (P1out) 16-1 to which the current output terminal of the first layer spiral coil (L1) 10 is connected, and the output terminal (P2out) 16- to which the current output terminal of the second layer spiral coil (L2) 20 is connected. 2. The output terminals (P3out) 16-3 to which the current output terminals of the third layer spiral coil (L3) 30 are connected are respectively connected to the switches (SW4, SW5, SW6) 12-4, 12-5, 12-6. To the output terminal (OUT).

  The switch circuit 18 includes a switch (SW7) 12-7 between an input terminal (P2in) 14-2 and an output terminal (P1out) 16-1, and an input terminal (P3in) 14-3 and an output terminal (P3in). P2out) 16-2 is provided with a switch (SW8) 12-8, and an input terminal (P2in) 14-2 and an input terminal (P3in) 14-3 are provided with a switch (SW9) 12-9. It has been.

  The switch circuit 18 has control signal input terminals (CTLA, CTLB, CTLC) for controlling the on / off of the switches (SW1 to SW9) 12-1 to 12-9 and designating the mode of the switch circuit 18. Is provided.

  The switch circuit 18 includes, as necessary, between the input terminals 14-1, 14-2, 14-3, between the output terminals 16-1, 16-2, 16-3, and between the input terminals 14-1. , 14-2, 14-3 and the output terminals 16-1, 16-2, 16-3, and the mode of the switch circuit 18 according to the input from the control signal input terminals (CTLA, CTLB, CTLC). Can be specified.

  On / off of the switches (SW1 to SW9) 12-1 to 12-9 is controlled based on the control signals input from the control signal input terminals (CTLA, CTLB, CTLC), and the first layer spiral coil (L1) 10, At least one of selecting a desired spiral coil connection from the second layer spiral coil (L2) 20 and the third layer spiral coil (L3) 30, and connecting a plurality of selected spiral coils in series or in parallel. Is executed. As a result, a current path by the spiral coil of each layer is set by a plurality of switches in order to generate a desired inductance (passive element characteristic value).

  The switch circuit 18 has a current output terminal (OUT: an output terminal for outputting a current to an external circuit (not shown)) and a current input terminal (IN: an input terminal for inputting a current from the external circuit), respectively. (SW1 to SW9) The spiral coils selected by turning on and off 12-1 to 12-9 are connected to an external circuit to be used.

  The arrows shown in FIGS. 2A and 2B flow through the first layer spiral coil (L1) 10, the second layer spiral coil (L2) 20, the third layer spiral coil (L3) 30, and the wiring conductor. The current direction is shown. In the first layer spiral coil (L1) 10, the second layer spiral coil (L2) 20, and the third layer spiral coil (L3) 30, current flows in the same direction.

  As shown in FIG. 2B, the spiral coil of each layer is composed of two conductor layers, and the current input (IN) direction to the spiral coil and the current output (OUT) direction from the spiral coil are: Both are lateral directions of the spiral conductor portion of the spiral coil. The wiring conductor is not arranged between the spiral coils of each layer, but is arranged in the lateral direction of the spiral coil of each layer, thereby reducing the thickness of the three-layered spiral coil layer.

  As shown in FIG. 2 (B), the current from the switch circuit 18 flows from the same lower direction to the surrounding conductor portions of the spiral coils of the three layers, and these surrounding conductor portions that are substantially parallel to the surface of the switch circuit 18. And the direction of the current (return current) returning from the surrounding conductor portions to the switch circuit 18 is perpendicular to the surface of the switch circuit 2 and flows from the same upper direction. Magnetic coupling with the magnetic flux due to the current flowing through the switch circuit 2 is suppressed.

  In addition, it is not limited to a spiral coil, Other types of coils, such as a meander coil, can also be used, and it is good not only as 3 layers but as 4 layers or more.

  In addition, a plurality of spiral coils may be formed in each of the three layers, and the number of layers is not limited to three and may be four or more. A variable inductor having a larger variable width can be configured by laminating a plurality of layers in which one or a plurality of spiral coils are formed.

  FIG. 3 is a diagram for explaining an example of on / off of the switch of the switch circuit in this embodiment. FIG. 3 (A) is a diagram for explaining an example of the three modes and truth table of the switch circuit, and FIG. () Is a diagram for explaining an example of connection of spiral coils by turning on / off a switch of a switch circuit.

  As described above, based on the control signal (L (low) level signal or H (high) level signal) input from the control signal input terminals (CTLA, CTLB, CTLC), the switches (SW1 to SW9) 12-1 ON / OFF of -12-9 is controlled.

  An example of the three modes of the switch circuit shown in FIG. 3A is a mode in which the frequencies in the transmission filter (TX) and the reception filter (RX) in the cellular phone are 2 GHz, 1.7 GHz, and 800 MHz. Circuit 1 is a circuit in which SW1 and SW4 are turned on and the others are turned off among switches (SW1 to SW9) 12-1 to 12-9, and is a circuit for generating inductance 2nH. The circuit-2 is a circuit in which SW1, SW5, and SW7 are turned on and the others are turned off, and is a circuit for generating an inductance 4nH. Circuit-3 is a circuit in which SW1, SW6, SW7, and SW8 are turned on and the others are turned off, and is a circuit for generating an inductance of 10 nH. The circuit-1, the circuit-2, and the circuit-3 will be described with reference to FIGS.

  As is clear from FIG. 3A, the first layer spiral coil (L1) 10 is shared in the circuit-1, the circuit-2, and the circuit-3. The second layer spiral coil (L2) 20 is shared.

  FIG. 3A shows a first circuit for realizing each circuit of the circuit 1 for generating the inductance 2nH, the circuit-2 for generating the inductance 4nH, and the circuit-3 for generating the inductance 10nH. The configuration of the first layer spiral coil (L1) 10, the second layer spiral coil (L2) 20, and the third layer spiral coil (L3) 30 will be exemplified below.

  The first layer spiral coil (L1) 10 is a coil having five turns with Al or copper wiring as a coil conductor, the thickness of the coil conductor is 1 μm, the width of the coil conductor is 10 μm, the interval between the coil conductors to be wound is 10 μm, The outer diameter is 1000 μm. The second layer spiral coil (L2) 20 is a coil having five turns with Al or copper wiring as a coil conductor, the thickness of the coil conductor is 1 μm, the width of the coil conductor is 10 μm, the interval between the coil conductors to be wound is 10 μm, The outer diameter is 1000 μm. The third layer spiral coil (L3) 30 is a coil having five turns with Al or copper wiring as a coil conductor, the thickness of the coil conductor is 1 μm, the width of the coil conductor is 10 μm, the interval between the coil conductors to be wound is 10 μm, The outer diameter is 1000 μm.

The first to third layer spiral coils are formed by being laminated in an insulating layer Si ₃ N ₄ (for example, a thickness of 9 μm).

  As shown in FIG. 3 (B), the inductance can be generated by a circuit-a to circuit-n other than the mode shown in FIG. 3 (A), and the variable width of the inductance can be increased. . In FIG. 3B, for simplicity, the first layer spiral coil (L1) 10 is L1, the second layer spiral coil (L2) 20 is L2, and the third layer spiral coil (L3) 30 is L3. The current input direction to the spiral coil is indicated by IN, and the current output direction from the spiral coil is indicated by OUT. As shown in FIG. 3B, the direction of current flowing through each of the surrounding conductor portions of the illustrated spiral coils L1, L2, and L3 is the same direction.

  FIG. 3B clearly shows the connection mode of the spiral coils L1, L2, and L3 in the circuit-a to the circuit-n and only the switch (SW) that is turned on (the switch that is turned off). Not shown).

  The circuit-a and the circuit-b are circuits that generate inductance only by the spiral coils L1 and L2, respectively.

  The circuit-c, the circuit-d, and the circuit-e are circuits that generate inductance by connecting in series two coils selected from the spiral coils L1, L2, and L3.

  Each of the circuit-f to circuit-h is a circuit that generates an inductance by parallel connection of two coils selected from the spiral coils L1, L2, and L3. The circuit-i is a circuit that generates an inductance by parallel connection of three coils of the spiral coils L1, L2, and L3. Each of the circuit-j to the circuit-l (L) generates an inductance by connecting a series connection of two coils selected from the spiral coils L1, L2, and L3 and a remaining one spiral coil in parallel. Circuit. Each of the circuit-m and the circuit-n is a circuit that generates an inductance by connecting two coils selected from the spiral coils L1, L2, and L3 in parallel and one remaining spiral coil in series. is there.

  4A and 4B are diagrams for explaining connection example-1 of the switch circuit in this embodiment. FIG. 4A is a diagram illustrating the circuit-1 (see FIG. 3), and FIG. It is a figure which shows the connected spiral coil.

  5A and 5B are diagrams illustrating connection example-2 of the switch circuit in this embodiment. FIG. 5A is a diagram illustrating the circuit-2 (see FIG. 3), and FIG. It is a figure which shows the connected spiral coil.

  6A and 6B are diagrams illustrating connection example-3 of the switch circuit in this embodiment. FIG. 6A is a diagram illustrating the circuit-3 (see FIG. 3), and FIG. It is a figure which shows the connected spiral coil.

  As shown in FIG. 4, in the circuit-1, SW1 and SW4 are turned on and the others are turned off, and the first layer spiral coil (L1) 10 forms a circuit for generating an inductance 2nH.

  As shown in FIG. 5, in the circuit-2, SW1, SW5, and SW7 are turned on and the others are turned off, and the first layer spiral coil (L1) 10 and the second layer spiral coil (L2) 20 are connected in series. Thus, a circuit for generating the inductance 4nH is configured.

  As shown in FIG. 6, in the circuit-3, SW1, SW6, SW7, and SW8 are turned on and the others are turned off, the first layer spiral coil (L1) 10, the second layer spiral coil (L2) 20, A circuit for generating an inductance of 10 nH is configured by connecting the three-layer spiral coil (L3) 30 in series.

  7A and 7B are diagrams illustrating a configuration example of the variable inductor in this embodiment, in which FIG. 7A is a perspective view, and FIG. 7B is a ZZ showing connection between a spiral coil and a switch circuit. 7C is a perspective view showing a modification of the spiral coil, FIG. 7D is a diagram showing a connection state of the spiral coil, and FIG. 7E is an xy plane of the spiral coil conductor. FIG.

  As shown in FIG. 7 (A), the first layer spiral coil (L1) 10, the second layer spiral coil (L2) 20, and the third layer spiral coil (L3) 30 have the same current in their circumferential conductor portions. As shown in FIG. 7B, the current input end and current output end of the spiral coil of each layer are formed by vertical wiring conductors formed in the Z direction. Are connected to the input terminals 14-1, 14-2 and 14-3 of the switch circuit 18 and the output terminals 16-1, 16-2 and 16-3 of the switch circuit 18.

  Each layer of spiral coils is formed of a first layer including a current input end and a second layer including a current output end, and is connected to the vertical wiring conductor. That is, as a configuration in which current is input and output from the lateral direction (y direction) of the circumferential conductor portion of the spiral coil of each layer, the thin three layers are laminated. The direction of the return current described above is orthogonal to the surface of the switch circuit 18 to suppress magnetic coupling between the magnetic flux due to the return current and the magnetic flux due to the current flowing through the switch circuit 18.

  As shown in FIG. 7C, the spiral coil 5 is connected with two spiral coils at the center of the circular conductor portion, and the direction of the current flowing through the circular conductor portions of the two spiral coils is the same direction. 7 (A) can be used instead of at least one of the first layer spiral coil (L1) 10, the second layer spiral coil (L2) 20, and the third layer spiral coil (L3) 30, A large inductance can be generated.

  The diagram shown in FIG. 7D is a diagram showing the configuration of the variable inductor shown in FIG. 7A in a simplified manner. The first layer spiral coil (L1) 10, the second layer spiral coil (L2) 20, Cross sections of the respective winding conductors of the third layer spiral coil (L3) 30, connection positions of the conductor lines connected to these respective winding conductors, input (IN) positions where currents are input to these conductor lines, currents from these conductor lines It is a simplification figure showing the output (OUT) position where is outputted.

  FIG. 7 (E) shows the respective round conductor portions of the first layer spiral coil (L1) 10, the second layer spiral coil (L2) 20, and the third layer spiral coil (L3) 30 shown in FIG. FIG. 6 is a projection view on the xy plane of a conductor line up to a position where each circumferential conductor portion is connected to the vertical wiring conductor. As shown in FIG. 7E, the first layer spiral coil (L1) 10, the second layer spiral coil (L2) 20, and the third layer spiral coil (L3) 30 each have 2.75 turns. However, the external shapes are different from each other and have different lengths.

  FIG. 8 is a diagram for explaining another configuration example of the variable inductor in this embodiment. FIGS. 8A and 8C are perspective views, and FIG. 8B and FIG. 8D. FIG. 6 is a simplified diagram showing a connection state of spiral coils.

  Differences between the configuration example illustrated in FIG. 8A and the configuration example illustrated in FIG. 7 will be described below.

  An output current flows from the center part of the circumferential conductor portion of each spiral coil constituting the three layers, and the output terminal 16− of the switch circuit 18 is connected by a wiring conductor perpendicular to the xy plane, that is, perpendicular to the plane of the switch circuit 18. 1, 16-2, 16-3 and each central part are connected. In the configuration example shown in FIG. 8A, the wiring conductors that run parallel to the switch circuit 18 are not formed as much as possible, and the return current direction described above is orthogonal to the surface of the switch circuit 18 to return Magnetic coupling between the magnetic flux caused by the current and the magnetic flux caused by the current flowing through the switch circuit 18 is suppressed.

  In the configuration example shown in FIG. 8C, the vertical wiring that connects the central portion of each circumferential conductor portion and the output ends 16-1, 16-2, and 16-3 of the switch circuit 18 in FIG. Rather than directly connecting the conductors to the output ends 16-1, 16-2, 16-3, the conductors are traversed in the vertical (Z) direction in one end and in the lateral (y) direction, and then the output ends 16-1, 16 are connected. -2, 16-3. In the configuration example shown in FIG. 8C, the formation length of the wiring conductors that run parallel to the switch circuit 18 is shortened as much as possible, and the input ends 14-1, 14-2, 14-3 and the output of the switch circuit 18 are output. An attempt is made to secure the degree of freedom of the positions where the ends 16-1, 16-2, and 16-3 are formed.

  As a simplified diagram similar to FIG. 7D, the structures of the variable inductors shown in FIGS. 8A and 8C are shown in FIGS. 8B and 8D, respectively. 7D, FIG. 8B, and FIG. 8D, wiring conductors for inputting current to each of the three layers of spiral coils are formed in the same configuration, and the current from each spiral coil is It can be clearly understood that the wiring conductors for output are formed by different configurations.

  Next, the relationship between the connection of the spiral coil and the inductance will be described.

  FIG. 9 is a diagram for explaining a connection example and inductance (calculated value) of a spiral coil in the present embodiment. FIG. 9A is a perspective view of the configuration of a single-layer spiral coil, and FIG. Is a perspective view of a configuration of a two-layer spiral coil, FIG. 9E is a perspective view of a configuration of a three-layer spiral coil (No. 1), FIG. 9B, FIG. 9D, FIG. FIG. 4 is a diagram showing a connection state of spiral coils.

  FIG. 10 is a diagram for explaining a connection example and inductance (calculated value) of a spiral coil in the present embodiment, and FIG. 10 (A) is a perspective view of a configuration of a three-layer spiral coil (part 2). 10 (C) is a perspective view of the configuration of a three-layer spiral coil (No. 3), and FIGS. 10 (B) and 10 (D) are diagrams showing the connection state of the spiral coil.

  FIG. 11 is a diagram for explaining a connection example and inductance (calculated value) of a spiral coil in the present embodiment, and FIG. 11A is a perspective view of a configuration of a three-layer spiral coil (part 4). 11B is a diagram showing a connection state of the spiral coil, and FIG. 11C is a projection view of the spiral coil conductor on the xy plane.

  In the following description, the number of turns is four (in FIG. 9, FIG. 10, and FIG. 11, a coil having a number of turns of 2.75 is shown for simplicity), the copper wiring is the coil conductor, and the thickness of the coil conductor. A spiral coil having a coil conductor width of 10 μm, a winding coil conductor interval of 10 μm, and an outer diameter of 1000 μm is hereinafter referred to as a basic coil having the same conditions. As shown in FIG. 7, the current input end and the current output end of the basic coil of each layer are arranged at close positions in the same direction as shown in FIG. 7, and the relative permittivity, relative permeability, and copper conductivity of the insulating layer (Electric conductivity) was input, and the inductance was calculated by simulation for the connection method of the basic coil shown in FIG. 9, FIG. 10, and FIG. The calculation of the inductance is a result obtained by using a three-dimensional electromagnetic field simulator (using Q3D Ver6 of Ansoft Corporation) by a finite element method. The inductance was a value at a frequency of 0.1 GHz.

  The spiral coil shown in FIG. 9A shows a single-layer basic coil (hereinafter referred to as a single-layer coil), and the current flows from the outer peripheral portion of the basic coil (L1) 10 to the winding conductor portion as indicated by arrows. Flows in and out of the center. The calculated value of inductance was 114 nH.

  The diagram shown in FIG. 9 (B) is a diagram showing the configuration of the connection state of the single-layer basic coil shown in FIG. 9 (A) in a simplified manner. The cross section of the circumferential conductor portion of the basic coil (L1) 10, It is a simplified diagram showing the connection position of a conductor line connected to a winding conductor, the input (IN) position where current is input to the conductor line, and the output (OUT) position where current is output from the conductor line.

  FIG. 9C shows the direction of current flowing through the circumferential conductor portion of the first layer basic coil (L1) 10 and the current flowing through the circumferential conductor portion of the second layer basic coil (L2) 20 through two basic coils. A coil (hereinafter referred to as a two-layer coil) in which two layers are stacked and connected so that the direction is the opposite direction is shown.

  As shown in FIG. 9C, the first layer basic coil (L1) 10 and the second layer basic coil (L2) 20 are stacked in this order from below, and the current is the second as indicated by the arrows. It flows from the outer periphery of the basic coil (L2) 20 of the layer into the winding conductor, flows out of the center, flows from the center of the basic coil (L1) 10 of the first layer to the winding conductor, and flows out of the outer periphery. Go. The calculated value of the inductance of this two-layer coil was 20 nH. Since the direction of the current flowing through the circumferential conductor portion is different between the first layer and the second layer, the magnetic flux is canceled and the inductance is small.

  The diagram shown in FIG. 9D is a diagram showing a simplified configuration of the connection state in the two-layer spiral coil shown in FIG. 9C. The first layer basic coil (L1) 10 and the second layer Section of each of the surrounding conductors of the basic coil (L2) 20, the connection position of each of the surrounding conductors connecting the two conductors, the input (IN) position where the current is input to the conductor, the conductor It is a simplified diagram showing an output (OUT) position where current is output from the line.

  FIG. 9E shows the direction of current flowing through the three conductors of the basic coil (L3) 30 of the third layer and the current flowing through the conductor of the basic coil (L2) 20 of the second layer. The direction of current flowing through the circumferential conductor portion of the second layer basic coil (L2) 20 and the direction of current flowing through the circumferential conductor portion of the first layer basic coil (L1) 10 are such that the direction is opposite to the direction. A coil in which three layers are stacked and connected so as to be in the same direction (hereinafter referred to as a three-layer (part 1) coil) is shown.

  As shown in FIG. 9E, the first layer basic coil (L1) 10, the second layer basic coil (L2) 20, and the third layer basic coil (L3) 30 are stacked in this order from below. As indicated by the arrows, the current flows from the outer peripheral portion of the third layer basic coil (L3) 30 to the surrounding conductor portion, flows out from the central portion, and from the central portion of the second layer basic coil (L2) 20. It flows into the circular conductor part, flows out from the outer peripheral part, flows into the circular conductor part from the center of the basic coil (L1) 10 of the first layer, and flows out from the outer peripheral part. The calculated value of the inductance of this three-layer coil was 110 nH. The direction of the current flowing through the circumferential conductor portion is different between the first layer and the second layer, so that the magnetic flux is canceled out, and since the second layer and the third layer are the same, the magnetic flux is not canceled out, and the first layer shown in FIG. The inductance is about the same as that of the coil.

  The diagram shown in FIG. 9 (F) is a diagram showing a simplified configuration of the connection state in the three-layer spiral coil shown in FIG. 9 (E). The first layer basic coil (L1) 10 and the second layer Section of each of the surrounding conductor portions of the basic coil (L2) 20 and the third layer basic coil (L3) 30, the connection position of each of the surrounding conductor portions connecting these three surrounding conductor portions, and the current in the conductor line FIG. 6 is a simplified diagram showing an input (IN) position at which is input and an output (OUT) position at which current is output from the conductor line.

  10A is the same as the configuration of the variable inductor having the configuration shown in FIG. 7, and includes three basic coils: a first layer basic coil (L1) 10, a second layer basic coil (L2) 20, A coil (hereinafter referred to as three-layer (part 2) coil) in which three layers are stacked and connected so that the direction of current flowing through each of the surrounding conductor portions of the third-layer basic coil (L3) 30 is the same direction is shown. .

  As shown in FIG. 10A, from the bottom, the first layer basic coil (L1) 10, the second layer basic coil (L2) 20, and the third layer basic coil (L3) 30 are laminated in this order. As indicated by the arrows, the current flows from the outer periphery of the third layer basic coil (L3) 30 to the circumferential conductor, flows out of the center, and from the outer periphery of the second layer basic coil (L2) 20. It flows into the circumferential conductor part, flows out from the central part, flows into the circumferential conductor part from the outer peripheral part of the first layer basic coil (L1) 10, and flows out from the central part. The calculated value of the inductance of this three-layer coil was 725 nH, which was 6.5 times that of the one-layer coil shown in FIG. Since the direction of the current flowing through the circumferential conductor portion is the same in the first layer, the second layer, and the third layer, the magnetic flux is not canceled out, resulting in a large inductance.

  FIG. 10 (C) shows three basic coils, each of the surrounding conductor portions of the first layer basic coil (L1) 10, the second layer basic coil (L2) 20, and the third layer basic coil (L3) 30. 3 shows a coil in which three layers are stacked and connected so that the directions of the currents flowing alternately are different (hereinafter referred to as three-layer (part 3) coil).

  As shown in FIG. 10C, the first layer basic coil (L1) 10, the second layer basic coil (L2) 20, and the third layer basic coil (L3) 30 are stacked in this order from below. As indicated by the arrows, the current flows from the outer peripheral portion of the third layer basic coil (L3) 30 to the surrounding conductor portion, flows out from the central portion, and from the central portion of the second layer basic coil (L2) 20. It flows into the circular conductor part, flows out from the outer peripheral part, flows into the circular conductor part from the outer peripheral part of the basic coil (L1) 10 of the first layer, and flows out from the central part. The calculated value of the inductance of this three-layer coil was 182 nH larger than that of the three-layer (part 1) coil shown in FIG. The reason for this is thought to be that the coupling coefficient between the coils increases due to the current flowing in the same direction.

  FIG. 10B shows a simplified configuration of the connection state in the three-layer spiral coil shown in FIG. 10A and FIG. 10C shown in the same manner as the simplified diagram shown in FIG. From the comparison of FIG. 10 (D), the difference in the configuration of the wiring conductor for inputting current to each spiral coil of the three layers and the configuration of the wiring conductor for outputting current from each spiral coil is clearly understood. can do.

  The connection example of the spiral coil shown in FIG. 11 (A) is similar to the connection example of the spiral coil in the three-layer (part 2) coil shown in FIG. 10 (A), but the current input terminal and the current output of the basic coil in each layer. The position of the end is different. In the configuration shown in FIG. 11A, the current input end and the current output end of the basic coil of each layer are not arranged at adjacent positions in the same direction as shown in FIGS. 10A and 10B. Instead, they are arranged at positions different from each other by 120 ° (hereinafter referred to as three-layer (part 4) coils).

  That is, in FIG. 11A, the current input end and current output end of the first layer basic coil (L1) 10 are in the direction of 120 °, and the current input end and current of the second layer basic coil (L2) 20 are in the direction of 120 °. The output end is positioned in the direction of 240 °, and the current input end and the current output end of the third layer basic coil (L) 30 are positioned in the direction of 0 °.

  The diagram shown in FIG. 11B is a diagram showing a simplified configuration of the connection state in the three-layer spiral coil shown in FIG. 11A. The first layer basic coil (L1) 10 and the second layer are shown in FIG. Basic coil (L2) 20 and third-layer basic coil (L3) 30 surrounding conductor portions (shown in a perspective view as a disk shape), each winding conductor portion of a conductor line connecting these three surrounding conductor portions. 2 is a simplified diagram showing a connection position at, an input (IN) position where current is input to the conductor line, and an output (OUT) position where current is output from the conductor line.

  As shown in FIG. 11A and FIG. 11B, from the bottom, the first layer basic coil (L1) 10, the second layer basic coil (L2) 20, and the third layer basic coil (L3). Three basic coils are connected in the order of 30 layers. The current input end and the current output end of the basic coil are arranged at positions different from each other by 120 ° corresponding to each layer.

  Current flows from the end of the outer peripheral portion of the third layer basic coil (L3) 30 to the surrounding conductor portion and flows out of the central portion, and then the end of the outer peripheral portion of the second layer basic coil (L2) 20 ( The current flows from the central portion of the third-layer basic coil (L3) 30 to the circumferential conductor portion from the direction where the current input end and the current output end of the third layer 30 are arranged at a distance of 240 °. Next, the outer peripheral ends of the first layer basic coil (L1) 10 (current input ends and currents of the third layer basic coil (L3) 30 and the second layer basic coil (L2) 20) The current flows from the direction where the output end is disposed and the position 120 degrees away from each other), and the current flows into the circumferential conductor portion and flows out from the center portion.

  As shown in the projection view of the coil conductor in FIG. 11C, the current output end of the third layer basic coil (L3) 30 and the current input end of the second layer basic coil (L2) 20 are The current output terminal of the second layer basic coil (L2) 20 and the current input terminal of the first layer basic coil (L1) 10 are connected by a conductor 39.

  The calculated value of the inductance of the three-layer (part 4) coil shown in FIG. 11 (A) is smaller than that of the three-layer (part 2) coil shown in FIG. 10 (A), but is 637 nH. It was 5.6 times the single-layer coil shown. Even when the direction of the current flowing through the circumferential conductor portion of the basic coil of each layer is the same direction, the inductances have different values if the positions of the current input end and the current output end of the basic coil of each layer are different. This reason is considered to be due to mutual induction between the conductors 37 and 39 connecting the basic coils.

  In the examples shown in FIGS. 9, 10, and 11 described above, the spiral coil of each layer is a basic coil having the same conditions. However, when the spiral coil of each layer is a basic coil having different conditions, If the position of the current input end and the current output end of the basic coil of each layer and the direction of the current flowing through the circumferential conductor portion of the basic coil of each layer are the same, it is assumed that the inductance shows a similar change tendency.

  12A and 12B are diagrams for explaining a configuration example of the variable inductor in this embodiment. FIG. 12A is a plan view in a spiral coil formation region, and FIG. 12B is a spiral coil formation. It is sectional drawing in an area | region. FIG. 12 is a diagram illustrating details of the configuration of the first layer spiral coil (L1) 10, the second layer spiral coil (L2) 20, and the third layer spiral coil (L3) 30 in the configuration shown in FIG. . FIG. 12A is an enlarged view of a projection view of the coil conductor shown in FIG.

  12B, the spiral coils 10, 20, 30 of each layer, the input terminals 14-1, 14-2, 14-3 and the output terminals 16-1, 16-2, 16-3 of the switch circuit 18 In order to clearly show a part of the vertical wiring conductor to be connected through the pads separated by the insulating layer 17, the first layer spiral coil (L1) 10 is a sectional view taken along the line XX of FIG. The layer spiral coil (L2) 20 is a cross-sectional view of the ZZ portion, and the third layer spiral coil (L3) 30 is a cross-sectional view of the YY portion.

  The first layer pattern 41 of the first layer spiral coil (L1) 10 is formed on the first insulating layer 71, and the second layer pattern 42 of the first layer spiral coil (L1) 10 is formed on the second insulating layer 72. The first layer pattern 41 and the second layer pattern 42 are connected by a vertical interlayer conductive layer formed in the second insulating layer 72.

  The first layer pattern 51 of the second layer spiral coil (L2) 20 is formed on the third insulating layer 73, and the second layer pattern 52 of the second layer spiral coil (L2) 20 is formed on the fourth insulating layer 74. The first layer pattern 51 and the second layer pattern 52 are connected by a vertical interlayer conductive layer formed in the fourth insulating layer 74.

  The first layer pattern 61 of the third layer spiral coil (L3) 30 is formed on the fifth insulating layer 75, and the second layer pattern 62 of the third layer spiral coil (L3) 30 is formed on the sixth insulating layer 76. The first layer pattern 61 and the second layer pattern 62 are connected by a vertical interlayer conductive layer formed in the sixth insulating layer 76. A seventh insulating layer 77 is formed on the sixth insulating layer 76.

  Vertical wiring conductors connecting the current input end of the second layer pattern 42 of the first layer spiral coil (L1) 10 and the input end 14-1 of the switch circuit 18 are formed in the first and second insulating layers 71 and 72. The vertical wiring conductor that connects the current output terminal of the first layer pattern 41 of the spiral coil (L1) 10 and the output terminal 16-1 of the switch circuit 18 is formed in the second insulating layer 72.

  Vertical wiring conductors connecting the current input end of the second layer pattern 52 of the second layer spiral coil (L2) 20 and the input end 14-2 of the switch circuit 18 are formed in the first to fourth insulating layers 71 to 74. The vertical wiring conductor connecting the first layer pattern 51 current output end of the second layer spiral coil (L2) 20 and the output end 16-2 of the switch circuit 18 is connected to the first to third insulating layers 71 to 73. Is formed.

  Vertical wiring conductors connecting the current input end of the second layer pattern 62 of the third layer spiral coil (L3) 30 and the input end 14-3 of the switch circuit 18 are formed in the first to sixth insulating layers 71 to 76. The vertical wiring conductors connecting the current output end of the first layer pattern 61 of the third layer spiral coil (L3) 30 and the output end 16-3 of the switch circuit 18 are the first to fifth insulating layers 71 to 75. Is formed.

  In the example shown in FIG. 12, if the thickness of each layer is illustrated, the thickness of each layer of the first to seventh insulating layers is 2 μm, and the first, second, and third layer spiral coils (L1, L2, L3) The thickness of each layer of the second layer patterns 41, 42, 51, 52, 61, 62 is 2 μm.

In the example shown in FIG. 12, the insulating layer 17 is formed of silicon oxide (SiO ₂ ), and the insulating layers 71 to 77 are formed of silicon nitride (Si ₃ N ₄ ). The insulating layers 71 to 77 may be ferrite layers formed using an aerosol deposition (AD) method, for example, a MnZn ferrite layer, a MgMn ferrite layer, a NiZnCu ferrite layer, or the like. In this AD method, the deposition rate is fast and a stable and reliable ferrite layer can be formed. The deposition rate by the AD method is higher than that of plating or sputtering, and is 10 μm / min or more. High film formation rate. Due to the closed magnetic circuit structure in which the conductor is embedded in the ferrite layer, the eddy current loss of the conductor can be reduced, and the effect of rectifying the magnetic field by suppressing the disturbance in the direction of the current can be obtained. Further, the insulating layers 71 to 77 can be formed of a high-k material (high dielectric constant material). As a result, the mutual induction between the spiral coils is increased and the Q value is increased.

  FIG. 13 is a diagram for explaining a configuration example of a variable inductor in this embodiment, FIG. 13A is a plan view in a spiral coil formation region, and FIG. 13B is a ZZ portion. (In order to clarify a part of the above-mentioned vertical wiring conductor, the sectional view of the XX portion for the first layer spiral coil and the sectional view of the YY portion for the third layer spiral coil) Is shown.)

In the configuration shown in FIG. 13, in the configuration shown in FIG. 12, a part of the insulating layers 71 to 77 formed of silicon nitride (Si ₃ N ₄ ) is removed by etching, so that the spaces 81 to 84 without the insulating layers are formed. The formed spaces 81 to 84 having no insulating layer are covered with an electrically insulating thin plate 78 to maintain confidentiality, and the other configurations are the same as those in FIG. As a result, the electromagnetic coupling between the coils is increased, and the effect of improving the insulation of the wiring is obtained. In addition, the spaces 81 to 84 having no insulating layer can be filled with fine particles of ferrite. As a result, the dielectric effect between the coils is increased and the Q value is improved.

  14 and 15 are cross-sectional views of the ZZ portion for explaining the variable inductor manufacturing method according to the present embodiment (formation region in which the switch circuit 18 is formed, and cross-section in the region in which the spiral coil is formed). In order to clearly show a part of the above-mentioned vertical wiring conductor, the first layer spiral coil (L1) 10 is a cross-sectional view taken along the line XX, and the second layer spiral coil (L2) 20 Is a cross-sectional view of the Z-ZY portion, and the third layer spiral coil (L3) 30 is a cross-sectional view of the Y-Y portion.

  FIG. 16 is a diagram for explaining an example of a spiral carp conductor pattern in the present embodiment. FIG. 16A is a plan view of the second layer pattern 62 of the third layer spiral coil (L3) 30, and FIG. (B) is a plan view of the first layer pattern 61 of the third layer spiral coil (L3) 30, FIG. 16 (C) is a plan view of the second layer pattern 52 of the second layer spiral coil (L2) 20, and FIG. (D) is a plan view of the first layer pattern 51 of the second layer spiral coil (L2) 20, FIG. 16 (E) is a plan view of the second layer pattern 42 of the first layer spiral coil (L1) 10, FIG. FIG. 6F is a plan view of the first layer pattern 41 of the first layer spiral coil (L1) 10.

  Hereinafter, the manufacturing method of the variable inductor having the configuration shown in FIGS. 7 and 12 will be described with reference to FIG. 16 in the order shown in FIGS. 14 (A) to 14 (G) and FIGS. 15 (A) to 15 (E). While explaining.

  (S1) Formation of the switch circuit 18 (FIG. 14A).

  A switch circuit 18 is formed on the silicon substrate 19 together with an electronic circuit by an active element having a predetermined function, and a pad 85 of the switch circuit 18 and an insulating layer 17 are formed. The pad 85 includes an input end 14-1 for the first layer spiral coil (L1) 10, an input end 14-2 for the second layer spiral coil (L2) 20, and an input end 14- for the third layer spiral coil (L3) 30. 3. Output end 16-1 for the first layer spiral coil (L1) 10, output end 16-2 for the second layer spiral coil (L2) 20, and output end 16-3 for the third layer spiral coil (L3) 30. It is formed at six corresponding positions.

  (S2) Formation of the first insulating layer 71, formation of the opening, and formation of the interlayer conductor layer 86 (FIG. 14B).

  A first insulating layer 71 is formed on the entire surface of the insulating layer 17. In the first insulating layer 71, openings are formed at the positions of the six pads 85 described above, and interlayer conductors are formed in the formed six openings. A layer 86 is formed, and an interlayer conductor layer 86 is formed so as to be connected to the pad 85.

  (S3) Formation of the first layer pattern 41 of the coil (L1) (FIG. 14C).

  A first layer pattern 41 (see FIG. 16F) of the first layer spiral coil (L1) 10 is formed.

  (S4) Formation of the first insulating layer 72 (FIG. 14D).

  A first insulating layer 72 is formed on the entire surface.

  (S5) Formation of opening 87 (FIG. 14E).

  In the first insulating layer 72, a position for forming the interlayer conductor 86 connecting the first layer and second layer patterns of the first layer spiral coil (L1) 10, an input end to the first layer spiral coil (L1) 10 14-1, an input terminal 14-2 for the second layer spiral coil (L2) 10, an input terminal 14-3 for the third layer spiral coil (L3) 10, and an output terminal 16- for the second layer spiral coil (L2) 20. 2. Openings 87 are formed at six positions corresponding to the output end 16-3 with respect to the third layer spiral coil (L3) 30.

  (S6) Formation of the interlayer conductor layer 86 (FIG. 14F).

  Interlayer conductor layers 86 are formed in the openings 87 formed at the six positions formed.

  (S7) Formation of the second layer pattern 42 of the coil (L1) (FIG. 14G).

  A second layer pattern 42 (see FIG. 16E) of the first layer spiral coil (L1) 10 is formed.

  (S8) Formation of the third insulating layer 73, opening, formation of the interlayer conductor layer 86, and formation of the first layer pattern 51 of the coil (L2) (FIG. 15A).

  A third insulating layer 73 is formed on the entire surface. In the third insulating layer 73, an input end 14-2 for the second layer spiral coil (L2) 20, an input end 14-3 for the third layer spiral coil (L3) 30, Openings are formed at four positions corresponding to the output end 16-2 for the second layer spiral coil (L2) 20 and the output end 16-3 for the third layer spiral coil (L3) 30. Next, an interlayer conductor layer 86 is formed in the openings formed at the four positions. Next, a first layer pattern 51 (see FIG. 16D) of the spiral coil (L2) 20 is formed.

  (S9) Formation of the fourth insulating layer 74, opening, formation of the interlayer conductor layer 86, and formation of the second layer pattern 52 of the coil (L2) (FIG. 15B).

  A fourth insulating layer 74 is formed on the entire surface. In the fourth insulating layer 74, a position for forming an interlayer conductor 86 that connects the first layer and the second layer pattern of the second layer spiral coil (L2) 20, 4 corresponding to the input terminal 14-2 for the second layer spiral coil (L2) 20, the input terminal 14-3 for the third layer spiral coil (L3) 30, and the output terminal 16-3 for the third layer spiral coil (L3) 30. An opening is formed at the location. Next, an interlayer conductor layer 86 is formed in the openings formed at the four positions. Next, a second layer pattern 52 (see FIG. 16C) of the second layer spiral coil (L2) 20 is formed.

  (S10) Formation of the fifth insulating layer 74, opening, formation of the interlayer conductor layer 86, and formation of the first layer pattern 61 of the coil (L3) (FIG. 15C).

  A fifth insulating layer 75 is formed on the entire surface. In the fifth insulating layer 75, an input end 14-3 for the third layer spiral coil (L3) 30 and an output end 16-3 for the third layer spiral coil (L3) 30 are provided. Openings are formed at two corresponding positions. Next, an interlayer conductor layer 86 is formed in openings formed at two positions. Next, a first layer pattern 61 (see FIG. 16B) of the third layer spiral coil (L3) 30 is formed.

  (S11) Formation of the sixth insulating layer 76, opening, formation of the interlayer conductor layer 86, and formation of the second layer pattern 62 of the coil (L3) (FIG. 15D).

  A sixth insulating layer 76 is formed on the entire surface. In the sixth insulating layer 76, a position for forming an interlayer conductor 86 connecting the first layer and the second layer pattern of the third layer spiral coil (L3) 30, Openings are formed at two positions corresponding to the input end 14-3 for the three-layer spiral coil (L3) 30. Next, an interlayer conductor layer 86 is formed in openings formed at two positions. Next, a second layer pattern 62 (see FIG. 16A) of the third layer spiral coil (L3) 30 is formed.

  (S12) Formation of the seventh insulating layer 77 (FIG. 15E).

  Since the state after the seventh insulating layer 77 is formed is as shown in FIG. 12B, the illustration is omitted in FIG.

The insulating layer 17 is made of silicon oxide (SiO ₂ ), and the insulating layers 71 to 77 are made of silicon nitride (Si ₃ N ₄ ). The insulating layers 71 to 77 are formed by forming silicon nitride Si ₃ N ₄ by CVD. The opening 87 formed in the insulating layers 71 to 77 is performed by etching Si ₃ N ₄ with a hydrofluoric acid solution, and the etching rate is performed by adjusting the water temperature.

  Further, the insulating layers 71 to 77 can be ferrite layers formed by using an aerosol deposition (AD) method, and the opening 87 is formed by using a metal mask when performing aerosol deposition. A region where no film is formed can be held, and this region can be used as the opening 87.

  Further, the wiring conductor including the first and second layer conductor patterns 41, 42, 51, 52, 61, 62 and the interlayer conductor layer 86 of the first to third layer spiral coils 10, 20, 30 is formed by aluminum vapor deposition. Forming. A wiring conductor can also be formed by copper plating.

  A variable inductor composed of a plurality of stacked spiral coils and a switch circuit 18 to which these are connected is formed on a silicon wafer using WLP (wafer level process) technology, and is singulated into variable inductor chips. Can be produced. After the switch circuit 18 is formed, a plurality of spiral coils can be formed using the rewiring layer.

  Further, an electronic circuit using active elements, and a plurality of spiral coils and a switch circuit 18 to which these are connected can be formed on the same silicon wafer using WLP technology. It is also possible to make a device with a single chip. After forming the electronic circuit and the switch circuit 18 by the active element, a plurality of spiral coils can be formed by using the rewiring layer.

  In WLP, copper wiring can be used instead of aluminum wiring, and the Q value can be increased.

When the variable inductor having the configuration shown in FIG. 13 is manufactured, following the above-described (S12), a part of the Si ₃ N ₄ which is the insulating layers 71 to 77 is removed by etching, and the space without the insulating layer is obtained. 81 to 84 are formed, and the spaces 81 to 84 having no insulating layer are covered with an electrically insulating thin plate 78 using an electrically insulating adhesive, and the confidentiality is maintained. Alternatively, the spaces 81 to 84 having no insulating layer may be held airtight by the thin plate 78 after being filled with ferrite fine particles.

  FIG. 17 is a plan view for explaining an application example of a variable inductor. FIG. 17A is a plan view showing a conventional configuration in which passive elements are connected to each circuit, and FIG. FIG. 17C is a plan view illustrating a configuration in which an integrated passive element is shared by a plurality of high-frequency circuits in this embodiment.

  As shown in FIG. 17A, in the conventional mobile phone, a passive element (inductor) is provided for each of the transmission filter (TX) and the transmission filter (RX) for each of the transmission and reception frequencies f1, f2, and f3. Therefore, the number of inductor elements is large and a large mounting area is required. Transmission and reception frequencies f1, f2, and f3 are, for example, 800 MHz, 1.7 GHz, and 2 GHz.

  As shown in FIG. 17B, in this embodiment, passive elements (transmission filters (TX) and transmission filters (RX)) that are required for the transmission and reception frequencies f1, f2, and f3 are used. An IPD (Integrated Passive Device) 88 in which an inductor, a capacitor, and a resistor are integrated on one chip is formed. In the IPD 88, a variable inductor is formed by the plurality of spiral coils described above and a switch circuit to which these are connected. The variable inductor includes, for example, a transmission filter (TX) corresponding to the three modes shown in FIG. 3A, a circuit-1, a circuit-2, and a circuit for generating inductances required for the transmission filter (RX). -3.

  As shown in FIG. 17 (C), the IPD 88 is shared by the transmission filter (TX) and the transmission filter (RX) for each of the transmission and reception frequencies f1, f2, and f3. The inductance is variably controlled for each of f1, f2, and f3. As a result, the number of passive elements (inductors, capacitors, resistors) used and the mounting area can be reduced, the cost can be reduced, and the mobile phone device can be reduced in weight and thickness.

  Variable inductors with multiple inductors and switch circuits connected to them, variable capacitors with multiple capacitors and switch circuits connected to them, and any combination of multiple resistors and variable registers with switch circuits connected to them The IPD 88 can be a variable passive device.

  By using a variable passive device, the number of mounted components can be reduced and integrated, and the mobile phone device can be reduced in thickness, size, weight, and cost.

  The number of turns of the spiral coil of each layer used in the above description is 4.5 times in FIGS. 1 to 6 and 2.75 times in FIGS. The conditions such as the number of turns of the spiral coil of each layer, the length, the outer diameter, the number of spiral coils to be stacked are merely examples, and these conditions can be arbitrarily set in consideration of the variable width of the inductance. Needless to say.

  In the above description, a variable inductor having variable inductance has been described as a representative example of a variable passive device. However, in the above description, by replacing the configuration of the spiral coil with a capacitor and a resistor, the capacitance is changed. It is obvious that a variable passive device that functions as a variable capacitor that changes the resistance and a variable register that changes the resistance can be configured.

  As mentioned above, although embodiment of this invention was described, this invention is not limited to the above-mentioned embodiment, Various deformation | transformation based on the technical idea of this invention is possible.

  As described above, the present invention is suitable for a passive element device for realizing a miniaturized and integrated high-frequency circuit, and can provide a semiconductor device that is miniaturized and reduced in cost.

It is a figure explaining the structural example of the variable passive device in embodiment of this invention. It is a figure explaining the structural example of a variable inductor same as the above. It is a figure explaining the on-off example of the switch of a switch circuit same as the above. It is a figure explaining the example 1 of a connection of a switch circuit same as the above. It is a figure explaining the example 2 of a connection of a switch circuit same as the above. It is a figure explaining the example 3 of a connection of a switch circuit same as the above. It is a figure explaining the structural example of a variable inductor same as the above. It is a figure explaining the structural example of a variable inductor same as the above. It is a figure explaining the connection example and inductance (calculated value) of a spiral coil same as the above. It is a figure explaining the connection example and inductance (calculated value) of a spiral coil same as the above. The connection example and inductance (calculated value) of a spiral coil are demonstrated same as the above. It is a figure explaining the structural example of a variable inductor same as the above. It is a figure explaining the structural example of a variable inductor same as the above. It is sectional drawing explaining the manufacturing method of a variable inductor same as the above. It is sectional drawing explaining the manufacturing method of a variable inductor same as the above. It is a top view explaining the conductor pattern example of a spiral carp same as the above. It is a figure explaining the application example of a variable inductor same as the above. It is a figure explaining the variable inductor in a prior art. It is a figure explaining adjustment of the inductance component in a surface mount antenna same as the above.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1a ... 1st layer passive element, 1b ... 2nd layer passive element, 1c ... 3rd layer passive element,
2, 18 ... switch circuit, 3, 19 ... silicon substrate, 4a, 4b, 7, 17 ... insulating layer,
5 ... spiral coil, 9a ... first layer passive element wiring conductor,
9b: second-layer passive element wiring conductor, 9c: third-layer passive element wiring conductor,
10 ... 1st layer spiral coil (L1), 20 ... 2nd layer spiral coil (L2),
30 ... 3rd spiral coil (L3), 12-1 to 12-9 ... switch,
14-1 ... input terminal corresponding to L1, 14-2 ... input terminal corresponding to L2,
14-3 ... input terminal corresponding to L3, 16-1 ... output terminal corresponding to L1,
16-2 to an output terminal corresponding to L2, 16-3 to an output terminal corresponding to L3,
37 ... a conductor connecting the current output terminal of L3 and the current input terminal of L2,
39: a conductor connecting the current output end of L2 and the current input end of L1, 41 ... first layer pattern of L1,
42 ... L1 second layer pattern, 51 ... L2 first layer pattern,
52 ... L2 second layer pattern, 61 ... L3 first layer pattern,
62 ... second layer pattern of L3, 71 ... first insulating layer, 72 ... second insulating layer,
73 ... 3rd insulating layer, 74 ... 4th insulating layer, 75 ... 5th insulating layer, 76 ... 6th insulating layer,
77 ... 7th insulating layer, 78 ... Insulating thin plate, 81-84 ... Space without an insulating layer,
85 ... Pad, 86 ... Interlayer conductor layer, 87 ... Opening, 88 ... IPD

Claims (11)

A substrate,
Three or more passive elements formed on the substrate;
An external input terminal for inputting current from an external circuit, an external output terminal for outputting current to the external circuit, a plurality of switch elements, and a control signal for controlling on / off of the plurality of switch elements are input. And a switch circuit provided with a control signal input terminal,
The plurality of switch elements are:
A first switch element group disposed between the external input terminal and the input terminal of the passive element;
A second switch element group disposed between the external output terminal and the output terminal of the passive element;
A third switch element group disposed between the input ends of the passive elements;
A fourth switch element group disposed between the output ends of the passive elements;
A fifth switch element group disposed between the input end and the output end of the passive element;
The desired passive element is selected from the plurality of passive elements, and the selected desired passive element is mixed between the external input terminal and the external output terminal in series, in parallel, or in series and parallel. Connected and can be connected in series or parallel or any combination of series and parallel,
Variable passive devices that variable passive element characteristic value by said plurality of switching elements. The plurality of passive elements are formed by laminating, and the laminated body is a passive body in which each layer of a plurality of layers in which one or more passive elements are formed is laminated on the substrate via an insulating layer. variable passive device according to the element layer der Ru請 Motomeko 1. The switch circuit is formed below the passive element layer;
The first switch element group is composed of arranged switching element between said input end of said passive element to said layers and said external input terminals,
The second switch element group is composed of arranged switching elements between the output terminal of the passive element with respect to the respective layers and the external output terminal,
The third switch element group consists switching element disposed between said input end of said passive element to said layers,
The fourth switch element group is composed of switch elements arranged between the output ends of the passive elements for the respective layers,
The fifth switch element group is the variable passive device according to claim 2 consisting of arranged switching element between the output terminal and the input terminal of the passive element with respect to the respective layers. Wherein each of the plurality of layers, one or more inductors, one or more capacitors, the variable passive device according to 請 Motomeko 3 layers der Ru that one or more registers are formed in combination arbitrarily. Variable passive device according to Oh Ru請 Motomeko 3 in the inductor element of the plurality of passive elements are constituted by a spiral-shaped coil. The variable passive device according to 請 Motomeko 5 Ru current flows in the same direction in each spiral coil. Variable passive device of the passive element characteristic value, inductance, capacitance, according to 請 Motomeko 1 Ru least any one Tsudea Resistance. Said on-off switching element is controlled in accordance with the frequency of the signal, the desired passive element is selected, the variable passive device according to 請 Motomeko 7 inductance Ru is variable. Variable passive device according to 請 Motomeko 7 wherein the passive element is Ru Oh a capacitor element. A substrate,
Three or more passive elements formed on the substrate;
An external input terminal for inputting current from an external circuit, an external output terminal for outputting current to the external circuit, a plurality of switch elements, and a control signal for controlling on / off of the plurality of switch elements are input. A switch circuit provided with a control signal input terminal;
Have
The plurality of switch elements are:
A first switch element group disposed between the external input terminal and the input terminal of the passive element;
A second switch element group disposed between the external output terminal and the output terminal of the passive element;
A third switch element group disposed between the input ends of the passive elements;
A fourth switch element group disposed between the output ends of the passive elements;
A fifth switch element group disposed between the input end and the output end of the passive element;
Including
The desired passive element is selected from the plurality of passive elements, and the selected desired passive element is mixed between the external input terminal and the external output terminal in series, in parallel, or in series and parallel. Connected and can be connected in series or parallel or any combination of series and parallel,
A semiconductor device using a variable passive device in which a passive element characteristic value is variable by the plurality of switch elements . The semiconductor device according to 請 Motomeko 10 that make up the mobile phone wherein the variable passive device is incorporated.

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