JP5250804B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine, and more particularly, to a gaming machine having a storage circuit that stores gaming information that changes with gaming.

A gaming machine, for example, a pachinko machine, is provided with various gaming devices and a control circuit for controlling each gaming device. For example, a start winning opening / closing member, a large winning opening / closing member, a payout device, and the like are provided as gaming machines, and a main control circuit, a payout control circuit, and the like are provided as control circuits. In addition, a power supply circuit that supplies power to the control circuit and the gaming machine is provided. As the power supply circuit, for example, an AC / DC conversion circuit that converts AC commercial power into DC power is used.
In such a pachinko machine, when the player is playing a game and the supply of DC power from the power supply circuit is stopped due to a power failure, the processing of the control circuit and the gaming machine is interrupted. For example, if the supply of DC power from the power supply circuit is stopped while the payout device is paying out the prize ball, the payout device stops in the middle of paying out the prize ball. At this time, since the main control circuit and the payout control circuit also stop operating, the information on the number of unpaid prize balls is also erased.
Therefore, the game information at the time when the power failure occurs is stored, and when the power failure is restored, the game is resumed from the gaming state interrupted by the occurrence of the power failure. For example, when a power failure occurs, the control circuit executes a power failure process. In the power failure processing, determination information is created based on the game information stored in the memory circuit (RAM) at the time when the power failure occurs, and stored in the memory circuit. During a power failure, game information and determination information stored in the storage circuit are held by backup power supplied from a backup power source. Then, when the power failure is restored (power is restored), the control circuit executes a restoration process. In the return process, determination information is created based on the game information stored in the storage circuit, and the game stored in the storage circuit is compared by comparing the generated determination information with the determination information stored in the storage circuit. It is determined whether the information is normal (whether it has changed during a power failure). When it is determined that the game information stored in the storage circuit is normal, the game is resumed based on the game information stored in the storage circuit when a power failure occurs. That is, the game is resumed from the game state interrupted by the occurrence of a power failure. On the other hand, when it is determined that the game information stored in the memory circuit is abnormal, the memory circuit is initialized. That is, the game is started based on the game information in the initial state.
In a conventional gaming machine, a backup power source that supplies backup power to a memory circuit is provided on a power supply board together with the power circuit (see Patent Document 1).
JP 2000-279579 A

In the pachinko machine, when a start winning ball signal indicating that a game ball has entered the start winning opening is input, a lottery is performed to determine whether or not to generate a winning gaming state advantageous to the player. . For example, a jackpot determination random number for determining whether or not to generate a jackpot gaming state (open control or open / close control of a bonus opening opening / closing member that opens / closes the winning prize opening) is acquired, and the acquired jackpot determination random number is acquired Whether or not matches the set value (win value). As the jackpot determination random number, for example, a jackpot determination count value that is repeatedly updated (counted) between “0” and “299” is used. Here, when the jackpot determination count value is constantly updated (counted) between “0” and “299”, the timing at which the jackpot determination count value matches the set value occurs at equal intervals. To do. For this reason, a fraud board using a sensory device that informs the timing when the jackpot determination count value matches the set value, or an illegal board that illegally inputs the start winning ball signal at the timing when the jackpot determination count value matches the set value. There is a risk of fraud being used.
Therefore, the initial value update type jackpot determination count value is used as the jackpot determination random number. The initial value update type jackpot determination count value is repeatedly updated (counted) over one period (one cycle) with a random number for the jackpot initial value as an initial value for each period (one cycle) of the jackpot determination count value. Is done. The jackpot initial value count value is used as the jackpot initial value random number. The initial value update type jackpot determination count value changes, for example, as shown in FIG. When the memory circuit (RAM) is initialized at time t21, the jackpot initial value count value is set to the initial value “0”. For this reason, the big hit determination count value starts to be updated (counted) in the first cycle from the initial value “0”. When the jackpot determination count value reaches “299” (the last value in one cycle with “0” as an initial value) at time t22, the update in the first cycle is completed. Here, the count value for the jackpot initial value is acquired (in FIG. 8, “60” is acquired). The jackpot determination count value starts counting (updating) in the second cycle using the acquired jackpot initial value count value “60” as an initial value. When the jackpot determination count value reaches “299” at time t23, it returns to “0” and continues counting. At time t24, when the jackpot determination count value reaches “59” (the last value in one cycle with “60” as an initial value), the update in the second cycle is completed. Thereafter, similarly, the jackpot determination count value is updated over one cycle within the range of “0” and “299” from the initial value updated using the jackpot initial value count value every cycle. (Counted).
In this way, by using the initial value update type jackpot determination count value as the jackpot determination count value, the timing at which the jackpot determination count value matches the set value (winning value) is prevented from occurring at equal intervals. can do.
However, even when the initial value update type jackpot determination count value is used, the jackpot initial value count value immediately after the memory circuit (RAM) is initialized is the initial value “0”, so the jackpot determination count The value is updated (counted) from the initial value “0”. For this reason, if the update interval (count interval) of the jackpot determination count value and the set value (win value) are known, the period until the jackpot determination count value reaches the set value (win value) from the initial value “0” ( The timing at which the jackpot determination count value matches the set value) can be predicted.

Here, in the conventional gaming machine, since the backup power supply is provided on the power supply board, a power line for supplying backup power to the memory circuit provided on the control board is connected between the power supply board and the control board. Has been. In this case, if a fraud in which the supply of DC power to the control board is stopped for a certain period while the power line for supplying backup power is short-circuited or disconnected, the supply of DC power to the control board is stopped. During this time, the backup power is not supplied from the backup power source to the storage circuit, so that the game information stored in the storage circuit is erased. For this reason, in the return processing in the control circuit after the supply of DC power to the control circuit is resumed, the memory circuit is initialized and the jackpot determination count value starts to be updated (counted) from the initial value “0”. Is done.
In order to prevent such fraud, it is conceivable to provide a backup power supply on the control board. However, if a backup power supply is provided on the control board, the control board may be illegally removed from the gaming machine, and game information stored in the storage circuit may be illegally rewritten. For example, if the main control board is removed from the gaming machine and the start winning ball signal is input to the main control circuit until the probability fluctuation state (the probability that the lottery result is a hit is higher than normal) is entered, Done. In this case, the game is played in an illegally set probability variation state. For this reason, it is difficult to employ a method of providing a backup power source on the control board.
The present invention has been made in view of such a point, and an object of the present invention is to provide a technique capable of preventing an illegal game even when a backup power supply is provided on a power supply board.

The gaming machine of the present invention has a control board and a power supply board.
The power supply board is provided with power supply means for supplying power to the control board. As the power source means, for example, an AC-DC conversion circuit that converts an AC 24V power source into a DC 34V power source and a DC 12V power source is used.
The control board is provided with processing means, lottery means, hit determination random number generation means, initial value random number generation means, random number generation means, storage means, voltage conversion means, and power failure detection means. Typically, the processing means, the lottery means, the hit determination random number generation means, and the initial value random number generation means are executed by a common control circuit, and the random number generation means is executed by a random number generation circuit. .
The storage means includes a processing means, a lottery means, a winning determination random number generating means, an operation program for executing processing such as an initial value random number generating means, game information that changes with the game, a winning determination random number, an initial value Value random numbers, unique identification information unique to each gaming machine, and the like are stored. As the game information, for example, in a pachinko machine, the number of start winning ball signals indicating that the game medium has entered the start winning opening, and a winning game state (such as a big hit gaming state or a probable game state) have occurred. The winning game information indicating the number of winning balls to be paid out from the payout device, etc. are stored. The unique identification information typically includes a circuit or element used in a gaming machine, for example, a processing means, a lottery means, a hit determination random number generation means, an initial value random number generation means, and a storage means. Identification information (manufacturing number, etc.) of the IC chip being used is used. ROM or RAM is used as the storage means. Typically, the storage means includes a RAM for storing information that changes during the game, such as game information, a winning determination random number, and an initial value random number, and a ROM for storing fixed information such as operation programs and unique identification information. Consists of.
The hit determination random number generating means generates the hit determination random number from the first initial value within the first range between the first value and the second value to the direction from the first value to the second value. In addition, a process of sequentially updating (generating) each first update value over one period within the first range is executed while updating the first initial value every period. Typically, the hit determination random number generation means is configured as a hit determination counter that sequentially counts (updates) the first update value from the first initial value over one period within the first range, The random number for hit determination stored in the storage means is represented by a count value for hit determination that is sequentially counted (updated) within the first range by the first update value from the first initial value. The first value, the second value, the first update value, and the update direction (count direction) can be selected as appropriate. As the first update value and the update direction, “1” and the addition direction are typically used. “One period within the first range” means a range from the first value to the second value when the first initial value is the first value, and the first initial value is When it is a value other than the first value, it is updated (counted) from the first initial value in the direction of the second value, and when it reaches the second value, the update (count) is continued from the first value. , Means a range up to a value immediately before the first initial value (for example, [first initial value-1]). As a method of updating the first initial value of the hit determination random number, for example, a method of setting the initial value random number stored in the storage means as the first initial value of the hit determination random number is used.
The initial value random number generating means generates the initial value random number from the initial value in the second range between the third value and the fourth value, in increments of the second updated value within the second range. A process of updating sequentially (a process of generating) is executed. The second range is set from the first range. That is, the third value and the fourth value are selected from the first range. Of course, the first value and the second value may be set as the third value and the fourth value, and the second range may be matched with the first range. Typically, the initial value random number generating means is configured as an initial value counter that sequentially updates the second value from the second value by the second update value within the second range. It is represented by a count value for initial value that is sequentially counted (updated) within the second range from the initial value by the second update value. The second initial value can be set as appropriate, but typically, the initial value random number initial value (for example, set in the initial value random number storage area of the storage unit when the storage unit is initialized (for example, , “0”). The second update value and the update direction can be set as appropriate, but typically, “1” and the addition direction are used. The update interval of the initial value random number generation means is set shorter than the update interval of the hit determination random number generation means. Thus, when the initial value random number is used as the first initial value of the hit determination random number for each cycle of the hit determination random number (when the initial value update type hit determination random number is used), for the hit determination The random number changes randomly.
When the gaming machine has a plurality of winning game states, a plurality of winning determination random number generation means for generating a plurality of winning determination random numbers and a plurality of winning determination random numbers are used. For example, depending on the result of a lottery performed due to a game ball entering a start winning opening, a big hit gaming state in which a big winning opening opening / closing member that opens / closes the big winning opening is controlled or opened / closed, and a big win gaming state In a pachinko machine that generates a probabilistic gaming state that has a higher probability of occurrence of a big hit gaming state than normal, depending on the winning symbol used when displaying the occurrence on the display device, the jackpot gaming state is set as a random number for the hit determination. A jackpot determination random number for determining whether or not to generate (a lottery) and a winning symbol determination random number for determining whether or not to generate a probability variation gaming state (a lottery) are used. As the random number generating means, a jackpot determining random number generating means and a winning symbol determining random number generating means are used. Further, a plurality of hit initial value random numbers and hit initial value random number generating means can be used corresponding to each of a plurality of hit determination random numbers.
The random number generation means generates a random number based on the unique identification information stored in the storage means. The random number generation means generates a known random number such as an M-sequence random number.
The lottery means executes a lottery process for acquiring a winning determination random number stored in the storage means and comparing it with a set value (winning value) due to establishment of the lottery condition. As a lottery condition, for example, in a pachinko machine, a condition in which a start winning ball signal indicating that a game ball has entered a start winning opening is used.
The processing means generates a winning gaming state advantageous to the player when the lottery result of the lottery means indicates that the winning determination random number matches the set value (that it is a winning). The winning gaming state advantageous to the player is appropriately set according to the gaming machine.
The processing means executes a power failure process when a power failure detection signal indicating that a power failure has occurred is input. In the power failure process, a process of generating determination information based on game information stored in the storage circuit and storing it in the storage circuit is executed. As the determination information, for example, a checksum value such as game information stored in the storage circuit is used. On the other hand, when drive power is supplied to the processing means, a return process is executed. In the return process, it is determined whether or not the game information and the like stored in the storage unit is normal based on the determination information stored in the storage unit. For example, by calculating a checksum value such as game information stored in the storage means, and comparing the calculated checksum value and the checksum value stored in the storage means and calculated in the previous power failure process Then, it is determined whether or not the game information stored in the storage means is normal. When it is determined that the game information stored in the storage means is normal, the game is resumed based on the game information stored in the storage means, and the game information stored in the storage means If it is determined that there is an abnormality, the storage means is initialized, and the game is started based on the initial values such as game information.
Further, in the present invention, when the storage means is initialized by the processing means , the initial value random number generation means starts the process of updating the initial value random number when the storage means is initialized. Further, the hit determination random number generation means, when the storage means is initialized by the processing means, is a period determined based on the random number generated by the random number generation means from the time when the storage means is initialized. There upon expiration, starts the process of updating the hit determining random number while updating using the random number initial value a first initial value for each period.
The voltage conversion means converts the voltage of the power supplied from the power supply means (power supply board) to the control board into a voltage corresponding to the voltage of the drive power of the processing means provided on the control board. As the voltage conversion means, for example, a switching circuit or a three-terminal regulator that converts a DC12V power source into a DC5V power source is used.
The power failure detection means outputs a power failure detection signal indicating that a power failure has occurred when it is detected that the power supplied from the power supply means (power supply board) to the control board is decreasing. As a method of detecting that the power supplied to the control board is reduced, for example, a method of detecting that the voltage of the DC12V power supply supplied to the control board is lower than the power failure detection set value is used. Can do. The power failure detection set value is a value at which the voltage of the electric power supplied from the voltage conversion means is kept higher than the operating voltage of the processing means until the processing means completes the power failure processing after the power failure detection signal is output from the power failure detection means. Set to
In the present invention, the voltage of the power supplied to the control board is converted by the voltage conversion means provided on the control board into a voltage corresponding to the voltage of the driving power of the processing means provided on the control board. Yes. This eliminates the need to connect a power line for supplying driving power (power having a voltage corresponding to the driving power) to the control board. For this reason, the power line supplying the driving power such as the processing means can be short-circuited for a short period of time to prevent the injustice to initialize the storage means.
Moreover, since the power failure detection means is provided on the control board, it is not necessary to connect a signal line for transmitting a power failure detection signal to the control board. For this reason, it is possible to prevent the illegality of initializing the storage means by shutting off the supply of drive power to the processing means for a certain period while the signal line for transmitting the power failure detection signal is short-circuited or disconnected. it can.
Further, since the initial value of the hit determination random number for determining to generate a win game state advantageous to the player is updated for each cycle of the hit determination random number, the hit determination random number is set to the set value ( It is difficult to predict the point in time that coincides with the hit value. In addition, when the storage unit is initialized, the process of updating the initial value random number is started at the time when the storage unit is initialized, and the random number generation unit starts from the time when the storage unit is initialized. when the period determined based on the generated and has a random number has elapsed, it has started determining random number update processing per by hitting determination random number generating means (generation processing). Further, the random number generated by the random number generation means is based on unique identification information unique to each gaming machine. For this reason, even when the storage means is illegally initialized, after the storage means is initialized, the hit determination random number coincides with the set value (win value) (the hit determination after the storage means is initialized). It is very difficult to predict the period until the random number for use matches the set value. Therefore, it is possible to reliably prevent an illegal game in which the point in time when the hit determination random number matches the set value (win value).

  By using the present invention, even if a backup power supply is provided on the power supply board, illegal games can be prevented.

Embodiments of the present invention will be described below with reference to the drawings.
The structure of the principal part of the 1st Embodiment of this invention is shown in FIG. In the present embodiment, the present invention is configured as a pachinko machine.
The present embodiment has a power supply board 10 and a main control board 20. Although not shown in FIG. 1, the pachinko machine according to the present embodiment has various boards other than the main control board 20 and gaming equipment.
The power supply board 10 corresponds to the “power supply board” of the present invention, and the main control board 20 corresponds to the “control board” of the present invention.
The power supply board 10 is provided with a power supply circuit 11 for supplying power to a control circuit in the gaming machine, gaming equipment, and the like. As the power supply circuit 11, an AC / DC conversion circuit that converts AC power into DC power is used. In the present embodiment, the power supply circuit 11 converts AC24V power supplied to the terminal 10a of the power supply board 10 into DC34V power and DC12V power.
The power supply circuit 11 corresponds to “power supply means” of the present invention.
Here, in order to supply DC5V power, which is driving power of the control circuit and the storage circuit, from the power supply board 10 to each control board, it is necessary to connect a power line for supplying DC5V power to the power supply board 10 and each control board. . Since DC5V power has a low voltage, it is greatly affected by a voltage drop caused by the power line and noise mixed in the power line. In addition, when a power line for supplying DC 5V power connected to the power supply board 10 or each control board is short-circuited for a single period, the control circuit disposed on each control board operates without performing a power failure process. After stopping, return processing is performed. In this case, since the power failure process is not performed, the control circuit initializes the memory circuit. As described above, if a power line for supplying DC 5V power is connected to the power supply board 10 or each control board, there is a risk that the power line is short-circuited for a single period to improperly initialize the memory circuit.
Therefore, in the present embodiment, DC 34V power and DC 12V power that are less affected by voltage drop due to the power line and noise mixed in the power line and that are difficult to perform fraud are supplied from the power supply board 10 to each control board. For example, the DC 34V power converted by the power circuit 11 is supplied to the terminal 20a of the main control board 20 via the terminal 10b and the power line L1 of the power board 10, and the DC 12V power is supplied to the terminal 10c and the power line L2 of the power board 10. To the terminal 20b of the main control board 20.

Further, in the event of a power failure (when the supply of drive power to the main control circuit 31 or the like is interrupted), the RAM 33 is configured so that the game can be resumed from the state before the power failure after the power failure is restored (after power recovery). It is necessary to supply backup power for holding game information and the like stored in the game. In the present embodiment, the power supply substrate 10 is provided with a backup capacitor 12 for supplying backup power. In the state in which the power is supplied from the power supply circuit 11, the backup capacitor 12 is configured such that the DC5V power converted by the voltage conversion circuit 21 provided in the main control board 20 is converted to the diode 24, the power line pattern m 3, and the main control board 20. The battery is charged by being supplied through the terminal 20e, the power line L3, and the terminal 10d of the power supply board.
The backup capacitor 12 corresponds to the “backup power supply” of the present invention.
As described above, when a backup power supply is provided on the control board, the control board is removed from the gaming machine, and the gaming information stored in the storage circuit provided on the control board is illegally rewritten, and then the gaming machine There is a risk of fraudulent attachment. In the present embodiment, a backup capacitor 12 that supplies backup power is provided on the power supply substrate 10. For this reason, for example, when the main control board 20 is removed from the gaming machine, the driving power is not supplied to the memory circuit (RAM 33), and it is possible to prevent such a fraud from being performed on the memory circuit (RAM 33). Can do.

The main control board 20 is provided with a voltage conversion circuit 21, a power failure detection circuit 22, a RAM clear switch 23, a diode 24, a main control circuit 31, a ROM 32, a RAM 33, a random number generation circuit 34, and the like. In the present embodiment, the main control circuit 31, the ROM 32, the RAM 33, and the random number generation circuit 34 are configured as an integrated main control circuit IC30. The main control board 20 is provided with other elements and circuits.
The main control board 20 is provided with terminals 20a to 20g. A DC34V power line L1 for supplying DC34V power and a DC12V power line L2 for supplying DC12V power are connected between the terminals 10b, 10c of the power supply board 10 and the terminals 20a, 20b of the main control board 20. A power line pattern m1 for supplying DC 34V power is provided between the terminals 20a and 20c, and a power line pattern m2 for supplying DC 12V power is provided between the terminals 20b and 20d. Yes. From the power line patterns m1 and m2, DC34V power and DC12V power are supplied to the DC34V load and DC12V load provided on the main control board 20. Various signals (for example, a start winning ball signal) are input to the terminal 20f of the main control board 10. The signal input to the terminal 20f is input to the main control circuit 31 via the terminal 30c of the main control circuit IC30. Signals from the main control circuit 31 (for example, main control signals such as a main command signal and a drive signal) are output via the terminal 30d of the main control circuit IC30 and the terminal 20g of the main control board 10.

The voltage conversion circuit 21 converts DC 12V power into DC 5V power used as drive power for the main control circuit 31, the RAM 33, and the like. For example, a switching regulator or a three-terminal regulator is used as the voltage conversion circuit 21.
The voltage conversion circuit 21 corresponds to “voltage conversion means” of the present invention.
The DC5V power converted by the voltage conversion circuit 21 is supplied to the terminal 30b of the main control circuit IC30 via the diode 24 and the power line pattern m3. Further, it is also supplied to the backup capacitor 12 provided on the power supply board 10 through the power line L3 connected between the terminal 20e of the main control board 20 and the terminal 10d of the power supply board 10.

The power failure detection circuit 22 detects that the power supplied to the main control board 20 has decreased, and outputs a power failure detection signal (sometimes referred to as a “power failure warning signal”). In the present embodiment, a decrease in power is detected by a decrease in power voltage. For example, the power failure detection circuit 22 detects that the voltage of the DC 12V power supplied to the voltage conversion circuit 21 has dropped below the power failure detection set value, and the voltage of the power supplied to the main control board 20 (that is, the main power detection circuit 22). A power failure detection signal indicating that the voltage of the driving power supplied to the control circuit 31 and the RAM 33 has decreased is output. The power failure detection signal is input to the main control circuit 31 via the terminal 30a of the main control circuit IC30.
The power failure detection circuit 22 corresponds to the “power failure detection means” of the present invention.
Here, as described above, when the supply of the drive power to the main control circuit 31 is stopped, it is necessary to cause the main control circuit 31 to execute a power failure process. For this reason, as the power failure detection set value, the DC 12V power supplied to the main control board 20 due to a power failure or the like decreases, and the power failure detection signal is output from the power failure detection circuit 22, and the main control circuit 31 executes the power failure process. The voltage of DC5V power supplied from the voltage conversion circuit 21 is a voltage at which the main control circuit 31 and the RAM 33 can operate (for example, 4.75V for the main control circuit 31 using 5V drive power). It is set to be held as described above.

The RAM clear switch 23 is used when the RAM 33 is initialized. When the RAM clear switch 23 is operated, an initialization instruction signal is input to the main control circuit 31 via the terminal 30e of the main control circuit IC30.
The RAM clear switch 23 corresponds to “initialization instruction means” of the present invention.
In the present embodiment, when a power failure occurs and a power failure detection signal is input, backup power is supplied from the backup capacitor 13 to the main control circuit IC 30 and stored in the RAM 33 when the power failure occurs. Game information is held. When the power failure is restored (when power is restored), the game is resumed from the gaming state at the time of the power failure based on the game information stored in the RAM 33.
However, when the game store is opened, it may be necessary to initialize the RAM provided on the control board of each gaming machine and start the game from the game information of the initial value. The RAM clear switch 23 is used when forcibly initializing the RAM 33 provided on the main control board 20 as described above. For example, when the RAM 33 is initialized, the power switch of the gaming machine is turned on with the RAM clear switch 23 operated (ON). The main control circuit 31 (the processing unit 31a) forcibly initializes the RAM 33 when the driving power is supplied in a state where the RAM clear switch 23 is operated (a state where the initialization instruction signal is input). Turn into.

The main control circuit 31 is constituted by a CPU. The main control circuit 31 operates based on an operation program stored in the ROM 32, game information stored in the RAM 33, and the like. The processing means 31a, the lottery means 31b, the hit determination random number generating means 31c, and the hit initial value The process of the random number generation means 31d is executed. That is, the present embodiment includes processing means 31a, lottery means 31b, hit determination random number generation means 31c, and hit initial value random number generation means 31d. The operation of each means will be described later.
The processing means 31a corresponds to the “processing means” of the present invention, the lottery means 31b corresponds to the “lottery means” of the present invention, and the hit determination random number generation means 31c Corresponding to “means”, the initial value random number generating means 31d corresponds to “initial value random number generating means” of the present invention.

The ROM 32 stores an operation program for each unit of the main control circuit 31, unique identification information (unique ID) 32a, and the like. As the unique identification information, identification information unique to the gaming machine, for example, identification information of an element or a circuit provided in the gaming machine is used. In the present embodiment, identification information of the main control circuit IC 30 provided on the main control board 30 and integrally formed with the ROM 32 (for example, a manufacturing number for each main control circuit IC 30 given at the time of manufacture) is used. It has been.
The identification information of the main control circuit IC 30 stored in the ROM 33 corresponds to “unique identification information unique to each gaming machine” of the present invention.

The RAM 33 stores game information that changes with the game, operation information of each means of the main control circuit 31, a hit determination random number 33a, and a hit initial value random number 33b. The hit determination random number 33a and the hit initial value random number 33b are stored in the hit determination random number storage area and the hit initial value storage area of the RAM 33, respectively.
The game information that changes with the game includes, for example, the number of start winning ball signals indicating that a game ball has entered the start winning port, and a winning ball signal indicating that the game ball has entered the winning port (for example, , The number of normal winning ball signals indicating that the player has entered the normal winning opening, the number of winning balls signal indicating that the player has entered the big winning port, the number of winning balls instructing the payout device to be paid out, and the jackpot game state The jackpot game information indicating that the player is playing is stored.
The winning determination random number 33a is used to determine (lottery) whether or not to generate a winning gaming state advantageous to the player. In the present embodiment, an initial value update type hit determination count value is used as the hit determination random number 33a. That is, the hit determination random number 33a is an initial value (hereinafter referred to as “first initial value”) within a range between the first value and the second value (hereinafter referred to as “first range”). From the first value to the second value in the direction of the first update value, the first initial value is updated every period over one period (one cycle) in the first range, It is updated sequentially. The first update value and the update direction can be set as appropriate. For example, the random number for hit determination 33a is calculated from the first initial value within the first range of the first value “0” and the second value “299” over the first period within the first range. Each update value “1” is incremented one by one (the update direction is the addition direction). In this case, in one cycle (one cycle) in the first range, the process (update process) of adding the first update value “1” from the first initial value in the first range is “300”. It is the range until it performs. When the second value “299” is reached within one period (one cycle), the count returns to the first value “0” and the count (update) is continued.
The winning initial value random number 33b is used to determine a first initial value for each period (one cycle) of the winning determination random number 33a. In the present embodiment, an initial value count value is used as the winning initial value random number 33b. That is, the hit initial value random number 33b is an initial value (hereinafter referred to as “second initial value”) within a range between the third value and the fourth value (hereinafter referred to as “second range”). ) To the fourth value in the direction from the third value to the fourth value sequentially over the second range. The second range is set so as to be included in the first range (so that the third value and the fourth value are values within the first range). Preferably, the second range is set to the same range as the first range (the third value and the fourth value are equal to the first value and the second value). The second update value and the update direction can be set as appropriate. For example, the hit initial value random number 33b is a second range (= first range) of the third value “0” (= first value) and the fourth value “299” (= second value). ), The second update value “1” (= first update value) is sequentially added from the second initial value over the second range (the update direction is the addition direction). The When the fourth value “299” is reached, the first value “0” is restored and updated. The second initial value of the hit initial value random number 33b can be selected as appropriate. When the RAM 33 is initialized, an initial value set in the hit initial value random number storage area of the RAM 33 (for example, “ 0 ") is preferred.

If the pachinko machine has a plurality of hit gaming states, the RAM 33 stores a plurality of hit determination random numbers 33a. For example, the jackpot gaming state occurs depending on the jackpot gaming state for opening or closing the jackpot opening / closing member that opens / closes the jackpot and the winning symbol used when displaying that the jackpot gaming state occurs on the display device In the case of generating a probability variation gaming state with a higher probability than normal, the jackpot determination random number 33a for determining whether to generate a jackpot gaming state (lottery) or not A random number for determining a winning symbol for determining whether or not to generate a gaming state (lottery) is stored.
When a plurality of hit determination random numbers 33 a are stored in the RAM 33, hit initial value random numbers corresponding to the plurality of hit determination random numbers 33 a can be stored in the RAM 33.
The hit determination random number 33a corresponds to the “hit determination random number” of the present invention, and the hit initial value random number 33b corresponds to the “initial value random number” of the present invention. The ROM 32 and the RAM 33 correspond to “storage means” of the present invention.

The random number generation circuit 34 generates a random number based on the unique identification information 32a unique to each gaming machine stored in the ROM 32 (with the unique identification information as an initial value). As the random number generation circuit 34, a random number generation circuit that generates a known random number such as an M-sequence random number can be used.
Here, as will be described later, the random number generated by the random number generation circuit 34 is the period from the initialization of the RAM 33 to the start of the process of generating the hit determination random number 33a (start period T), the RAM 33 Is used when determining the first initial value (start value S) of the random number for determination immediately after (initial cycle). Therefore, the start period T for starting the generation process (update process) of the hit determination random number 33a using the random number generated by the random number generation circuit 34 and the start value S of the first cycle of the hit determination random number 33a are easily set. It is preferable to configure so that it can be determined as follows. For example, the change range of the random number generated by the random number generation circuit 34 is configured to be set so as to be the same as the change range of the hit determination random number 33a. Alternatively, a method of converting the random number generated by the random number generation circuit 34 into a start period T for starting generation processing (update processing) of the hit determination random number 33a or a start value S of the first cycle of the hit determination random number 33a. Set.
The random number generation cycle (random number update cycle) in the random number generation circuit 34 can be set as appropriate.

Each means of the main control circuit 31 will be described.
The hit determination random number generation means 31 c generates a hit determination random number 33 a stored in the RAM 33. In this embodiment, an initial value update type hit determination counter is used as the hit determination random number generating means 31c. That is, the random number generator 31c for hit determination determines one cycle in the first range from the first initial value in the first range by the first updated value in the direction from the first value to the second value. The random number 33a for hit determination is generated by sequentially updating the first initial value every cycle over (one cycle). The first update value and the update direction can be set as appropriate. The hit determination random number generating means 31c uses the initial value random number 33b stored in the RAM 33 as the first initial value of the hit determination random number 33a for each cycle.
In the present embodiment, the hit determination random number generation unit 31c performs the hit determination random number update process in the timer interrupt process for each timer interrupt period (for example, 4 ms) in the main process of the processing unit 31a.

The initial value random number generation means 31 d generates a hit initial value random number 33 b stored in the RAM 33. In the present embodiment, a hit initial value counter is used as the hit initial value random number generating means 31d. That is, the hit initial value random number generation means 31d starts from the second initial value within the second range between the third value and the fourth value in the direction from the third value to the fourth value. The initial value random number 33b is generated by sequentially updating the update range by two over the second range. The second update value and the update direction can be set as appropriate.
In the present embodiment, the process for updating the hit initial value random number 33b by the hit initial value random number generating means 31d is performed in the timer interrupt period (for example, 4 ms) in the main process of the processing means 31a and the main process of the processing means 31a. This is done in each timer interrupt process.
The hit determination random number 33a is updated in the timer interrupt cycle in the main process of the processing means 31a, and the initial value random number 33d is updated in the main process of the processing means 31a and in the timer interrupt cycle in the main process. As a result, the initial value random number 33b changes more randomly than when the initial value random number 33d is updated only within the timer interrupt period in the main process of the processing means 31a. It should be noted that the process for updating the hit initial value random number 33b may be performed only within the main process of the processing means 31a.

  When the pachinko machine has a plurality of winning gaming states, a plurality of winning determination random number generating means 31c for generating a hit determining random number 33a for determining whether or not to generate each of the plurality of gaming states; A plurality of hit initial value random number generation means 31d for generating a hit initial value random number 33b corresponding to each of the plurality of hit determination random numbers 33a can be provided. For example, for the jackpot determination random number for determining (lotting) whether or not to generate the jackpot gaming state, and for determining the winning symbol for determining (lottery) whether or not to generate the probable gaming state, as described above In the case of using a random number, as the winning determination random number generating means 31c, a big hit determining random number generating means for generating a big hit determining random number and a winning symbol determining random number generating means for generating a winning symbol determining random number are provided. As the value random number generating means 31d, a jackpot initial value random number generating means for generating a jackpot initial value random number and a hit symbol initial value random number generating means for generating a winning symbol initial value random number are provided.

The lottery means 31b performs a lottery process for determining whether or not to generate a winning gaming state advantageous to the player due to the establishment of the lottery conditions.
In the lottery process, first, a random number for hit determination (in this embodiment, a count value for hit determination) 33a stored in the RAM 33 is acquired (read). Various conditions can be used as the lottery conditions. For example, a condition in which a start winning ball signal indicating that a game ball has entered a start winning opening is used. Then, the acquired winning determination random number 33a is compared with the set value (winning value) stored in the ROM 32 (a lottery is performed), and a comparison result (lottery result) is output.
When the pachinko machine has a plurality of winning game states, the lottery means 31b executes a lottery process for each of the plurality of winning game states. For example, first, the jackpot determination random number is compared with a set value (win set value). When the jackpot determination random number matches the set value (winning), the winning symbol determination random number is compared with the set value (probability variation set value). If the jackpot determination random number does not match the set value (displacement), the lost symbol determination random number is extracted.

The processing unit 31a performs various processes.
The processing unit 31a determines whether or not to generate a gaming state advantageous to the player based on the result of the lottery process (lottery result) by the lottery unit 31b. In other words, when the lottery result indicates that the acquired winning determination random number 33a matches the set value, it is determined to generate a winning gaming state. When the pachinko machine has a plurality of winning game states, the lottery means 31b determines whether to generate each of the plurality of winning game states. For example, when the lottery result indicates that the jackpot determining random number matches the set value (win set value), it is determined to generate the jackpot gaming state. Further, when the lottery result indicates that the winning symbol determination random number matches the set value (probability variation symbol setting value), it is determined to generate the probability variation gaming state.
Further, when a power failure detection signal (power failure warning signal) indicating that the voltage of the DC12V power supplied to the voltage conversion circuit 21 is lower than the power failure detection set value is output from the power failure detection circuit 22, the power failure processing is performed. Execute. In the power failure process, for example, determination information is calculated based on game information stored in the RAM 33, and the calculated determination information, game information, and the like are stored in the save area of the RAM 33. As the determination information, for example, a checksum value such as game information stored in the RAM 33 is used.
When the voltage of DC 5V power (driving power) supplied from the voltage conversion circuit 21 reaches the operating voltage at which the main control circuit 31 (processing means 31a) can operate, the return processing is executed. In the return process, for example, determination information is calculated based on game information or the like stored in the RAM 33, and the calculated determination information and the determination information stored in the RAM 33 (determination information calculated during the previous power failure process) are used. Compare. If the calculated determination information matches the determination information stored in the RAM 33, it is determined that the game information stored in the RAM 33 is normal (not changed during a power failure), and the RAM 33 The game is resumed based on the game information stored in the game. On the other hand, when the calculated determination information does not match the determination information stored in the RAM 33, it is determined that the game information stored in the RAM 33 is abnormal (there may be a change during a power failure). Then, the RAM 33 is initialized. In this case, the game is started based on the initialized game information or the like. When the RAM 33 is initialized, the hit determination random number (count value for hit determination) 33a in the hit determination random number storage area of the RAM 33 and the hit initial value random number (for hit initial value) in the hit initial value random number storage area Count value) 33b is also initialized. In the present embodiment, when the RAM 33 is initialized, the hit determination random number 33a and the hit initial value random number 33b are initialized to “0”.
Further, when the RAM clear switch 23 is operated (when the initialization instruction signal is input), the DC5V power supplied from the voltage conversion circuit 21 exceeds the operating voltage of the main control circuit 31 (processing unit 31a). Then, the RAM 33 is forcibly initialized regardless of the determination information stored in the RAM 33.
The processing unit 31a performs various other processes.

Next, the processing of the main control circuit 31 (processing means 31a, lottery means 31b, winning determination random number generating means 31c, winning initial value random number generating means 31d) of the present embodiment is shown in the flowcharts of FIGS. Will be described. 2 and 3 are flowcharts for explaining the outline of the power-on process (including the main process) of the main control circuit 31, and FIG. 4 is a flowchart for explaining the outline of the timer interrupt process of the main control circuit 31. is there. 2 to 4 is executed by the processing means 31a of the main controller circuit 31.
First, the power-on process of the main control circuit 31 will be described. The power-on process shown in FIGS. 2 and 3 allows the main control circuit 31 to operate with the voltage of DC5V power supplied from the voltage conversion circuit 21 provided on the main control board 20 when the power is turned on. It starts when the operating voltage is reached.

In step S1, a stack pointer is set. The stack pointer indicates, for example, the address of the stack that temporarily stores data, the address of the stack that temporarily stores the return address of the main routine when returning from the subroutine to the main routine, and the like. In step S1, the stack initial address is set in the stack pointer. Thereby, the data and the return address are sequentially stored in the stack from the initial address.
In step S2, output of a power failure clear signal is started. The output of the main control signal from the main control circuit 31 is prohibited by this power failure clear signal.
In step S3, wait timer process 1 is executed.
In step S4, it is determined whether a power failure notice signal (a power failure detection signal from the power failure detection circuit 22) is input. If a power failure warning signal is input, the process returns to step S3, and if a power failure warning signal is not input, the process proceeds to step S5.
Here, since it takes time until the voltage of DC 12V power reaches the power failure detection set value set in the power failure voltage detection circuit 22 after the supply of DC 12V power is started by turning on the power or the like, the main control circuit 31 When it is in an operable state (when the voltage of DC5V power becomes equal to or higher than the operating voltage of the main control circuit 31), the voltage of DC12V power has not reached the power failure detection set value set in the power failure detection circuit 22. Sometimes. In this case, the main control circuit 31 may malfunction due to a power failure warning signal (power failure detection signal) output from the power failure detection circuit 22. The processes in steps S3 and S4 are processes for waiting until the voltage of DC12V power is stabilized (until the power failure detection set value or more) at the time of turning on the power. In the present embodiment, 200 ms is set as the wait time 1 of the wait timer process 1. When the voltage of DC 12V power does not reach the power failure detection set value within the wait time 1, it is determined that an abnormality has occurred and abnormality processing is executed. For example, a light emitting device, a speaker, a liquid crystal display device, or the like is used to notify that an abnormality has occurred.
In step S5, the output of the power failure clear signal is stopped. As a result, a signal from the main control circuit 31 can be output.

In step S6, it is determined whether or not the RAM clear switch 23 is operated. Whether or not the RAM clear switch 23 is operated is determined by, for example, whether or not an initialization instruction signal is input. When the RAM clear switch 23 is operated, the process proceeds to step S7, and when the RAM clear switch 23 is not operated, the process proceeds to step S8.
In step S7, the RAM clear flag RCL is set to “1”.
In step S8, the RAM clear flag RCL is set to “0”.
In step S9, the wait timer process 2 is executed. Here, a period of time is required from when the power is turned on until image information can be displayed on the liquid crystal display device. The wait timer process 2 in step S9 is a process for waiting until image information can be displayed on the liquid crystal display device.

In step S10, it is determined whether or not the RAM clear flag RCL is set to “0”. When the RAM clear flag RCL is set to “0” (when the main control circuit 31 is in an operating state when the RAM clear switch 23 is not operated), the process proceeds to step S11, and the RAM clear flag RCL is set. When it is not set to “0”, that is, when it is set to “1” (when the main control circuit 31 is in an operating state with the RAM clear switch 23 being operated), the process proceeds to step S17. .
In step S11, determination information for determining whether or not the game information or the like stored in the RAM 33 is normal (whether or not the game information stored in the RAM 33 has changed during a power failure) is calculated. . In the present embodiment, a checksum value such as game information stored in the RAM 33 is calculated as determination information.
In step S12, whether or not the information stored in the RAM 33 is normal using the determination information calculated in step S11 (whether game information or the like stored in the AM 33 has changed during a power failure). Determine. In the present embodiment, it is determined whether or not the checksum value calculated in step S11 matches the checksum value stored in the RAM 33 (the checksum value calculated during the previous power failure process). If the calculated checksum value matches the checksum value stored in the RAM 33, the process proceeds to step S14, and if not, the process proceeds to step S17.

In step S13, it is determined whether or not the backup flag BK is set to “1”. The backup flag BK is a flag indicating whether or not the power failure process has been normally completed during the previous power failure process. That is, “1” is set when the previous power failure process is normally completed, and “0” is set when it is not normally completed. When the backup flag BK is set to “1”, the process proceeds to step S14, and when it is set to “0”, the process proceeds to step S17.
In step S14, the main control circuit 31 is in the operating state when the RAM clear switch 23 is not operated (the initialization instruction signal is not input), and the game information stored in the RAM 33 is normal. In addition, it is determined that the previous power failure process has been completed normally, and the game is resumed based on the game information and the like stored in the RAM 33 (the game is resumed from the gaming state at the time of the power failure). That is, the work area of the RAM 33 is set at power recovery. For example, game information or the like stored in the save area of the RAM 33 is written in the work area of the RAM 33.
In step S15, power recovery processing is executed. In the power recovery process, for example, a signal (main command signal or drive signal) corresponding to game information or the like stored in the RAM 33 is stored in a predetermined area of the RAM 33. When the process of step S15 ends, the process proceeds to step S16.

In step S17, the main control circuit 31 is in an operating state when the RAM clear switch 23 is being operated (a state where the initialization instruction signal is input), game information stored in the RAM 33, or the like. Is abnormal, or the previous power failure process is not completed normally, and the entire area of the RAM 33 is cleared (initialized). For example, an initial value “0” is set in the entire area of the RAM 33. It is also possible to use a method of reading the initial value stored in the ROM 32 and setting it in the RAM 33.
In step S18, the work area of the RAM 33 is initialized. In this initial setting, the initial value stored in the ROM 32 is read, and the read initial value is set in the work area of the RAM 33.
In step S 19, the random number generated by the random number generation circuit 34 is acquired and stored in the RAM 33. As described above, the random number generation circuit 34 generates a random number having the unique identification information 32a stored in the ROM 32 as an initial value. The random number acquired in step S19 is the period from the initialization of the RAM 33 to the start of the first cycle update process of the hit determination random number 33a by the hit determination random number generating means 31c (start period T) or the RAM 33 is initialized. This is used when the initial value (start value S) of the 33a cycle of the hit determination random number is set by the hit determination random number generating means 31c after conversion. In the present embodiment, the random number acquired in step S19 is a period from the initialization of the RAM 33 to the start of the first cycle update process of the hit determination random number 33a by the hit determination random number generation means 31c (start period) T) is used to determine.
In step S20, RAM clear processing is executed. In the RAM clearing process, for example, a RAM clear notification command indicating that the RAM 33 has been initialized and a test command for inspecting each control circuit and gaming device are created and stored in the transmission area of the RAM. When a RAM clear notification command signal is output from the main control circuit 31, image information for notifying that the RAM 33 has been initialized is displayed on the liquid crystal display device. Further, when a test command is output from the main control circuit 31, each control circuit and each gaming device are inspected.
Note that the main control circuit 31 (processing means 31a) is returned to the main control circuit 31 when the power is turned on by the processes of steps S11 to S14, step S17, and step S18.

In step S16, interrupt initialization is performed. In the interrupt initial setting, an interrupt cycle for performing timer interrupt processing in the main processing of the processing means 31a is set. In this embodiment, 4 ms is set as the interrupt cycle. Of course, the processing cycle of the main processing is shorter than the timer interrupt cycle.
In step S21, interrupt permission is set. Due to the interrupt permission setting, timer interrupt processing for each timer interrupt cycle set in step S16 is executed.

In step S22, “A” is set in the watchdog timer clear register WCL. When “A”, “B”, and “C” are sequentially set in the watchdog timer clear register WCL, the watchdog timer is cleared.
In step S23, it is determined whether or not a power failure warning signal (power failure detection signal) is input from the power failure detection circuit 22. When the power failure warning signal is not input, the process proceeds to step S24, and when the power failure warning signal is input, the process proceeds to step S25.
In step S24, the hit initial value random number 33b is updated to determine the first initial value for each cycle of the hit determination random number 33a. Here, when the RAM 33 is initialized, the hit initial value random number 33b starts to be updated from the second initial value. As the second initial value, typically, the initial value (for example, “0”) of the random number for initial value 33b in the random value storage area for initial value of the RAM 33 when the RAM 33 is initialized is used. . In this case, when the update of the hit initial value random number 33 b is started, it is only necessary to update the second update value from the initial value of the hit initial value random number 33 b stored in the RAM 33.
In step S24, non-hit determination random numbers other than the hit initial value random numbers are updated except for the hit determination random numbers used in the lottery for determining whether or not to generate a win game state advantageous to the player. It can also be done. In the non-winning determination random number, in order to determine a reach display determination random number for determining whether or not to select a display mode including reach display as a display mode for displaying the lottery result, or a variable display pattern of the lottery result Random number for determining the fluctuation display pattern. The non-hit determination random number is generated by non-hit determination random number generation means corresponding to each non-hit determination random number.
The hit initial value random number 33a is updated by the hit initial value random number generating means 31d in step S24.
After finishing the process of step S24, it returns to step S22.
The main process of the main control circuit 31 (processing unit 31a) is executed by the processes of steps S22 to S24.
In this main process, the timer interrupt process shown in FIG. 4 is executed every timer interrupt period (for example, 4 ms).

In step S25, interrupt prohibition setting is performed. Due to the interrupt prohibition setting, subsequent timer interrupt processing is prohibited, and rewriting of game information and the like stored in the RAM 33 is prohibited.
In step S26, output of the power failure clear signal is started. Thereby, the output of the signal from the main control circuit 31 is stopped, and the driving of the gaming machine is stopped. When the driving of the gaming machine is stopped, power consumption is suppressed, and power for a stop process by the main control circuit 31 (processing unit 31a) is secured.
In step S27, whether or not the game information or the like stored in the RAM 33 is normal during the next restoration process of the main control circuit 32 (processing means 31a) (the game information or the like stored in the RAM 33 is being interrupted). Determination information for determining whether or not there is a change is created. In the present embodiment, determination information is calculated based on game information and the like stored in the RAM 33. In this embodiment, the checksum value of the information stored in the RAM 33 is calculated. Then, the game information and the like (backup information) stored in the RAM 33 and the calculated checksum value are stored in the save area of the RAM 33. The determination information for determining whether or not the information stored in the RAM 33 is normal (whether or not the information stored in the RAM 33 has changed during a power failure) is not limited to the chuck sum value. Other determination information such as parity data can also be used.
In step S28, when the process of step S27 (the process of storing the game information and the like stored in the RAM 33 and the calculated checksum value in the save area of the RAM 33) is normally completed, the backup flag BK is set to the power failure process. Set to “1” to indicate normal termination. When the process of step S27 is not normally completed, the backup flag BK is in a “0” state indicating that the power failure process has not been normally completed (a state when the RAM 33 is initialized). Retained.
In step S29, the watchdog timer is cleared. For example, “A”, “B”, and “C” are sequentially set in the watchdog timer clear register WCL. When the watchdog timer is cleared in step S29, the main control circuit 31 (processing unit 31a) causes the main control circuit 31 (processing unit 31a) to change the voltage of DC5V power supplied from the voltage conversion circuit 21 by turning on the power again. It waits until it becomes more than the operating voltage of 31a) (until power is restored).
In addition, the power failure process of the main control circuit 31 (processing means 31a) is performed by the process of step S25-step S29.

Next, timer interrupt processing of the main control side circuit 31 (processing means 31a) will be described. The timer interrupt process shown in FIG. 4 is executed every timer interrupt period (4 ms in the present embodiment) set in step S16 in the main process shown in FIG.
In step T1, “B” is set in the watchdog timer clear register WCL. At this time, the watchdog timer clear register WCL is set to “B” following the setting of “A” in step S22 (main processing) of FIG.
In step T2, the interrupt flag is cleared. When the interrupt flag is cleared, the timer interrupt cycle for determining the processing timing of the next timer interrupt process is started.
In step T3, various signals are input. The input signal is stored in the input area of the RAM 33 as input information. As the input signal, for example, a start winning ball signal indicating that the game ball has entered the start winning opening, a big winning ball signal indicating that the game ball has entered the main winning opening, or the like is used.
In step T4, a timer subtraction process is performed. For example, when the symbols are variably displayed on the liquid crystal display device, the symbol variation display period is subtracted. In this case, when the variable display period becomes “0”, it is possible to determine when the variable display of the symbols on the liquid crystal display device ends. Alternatively, the input determination period of the ACK signal (response signal) after outputting the signal is subtracted. As a result, it is possible to determine that an abnormality has occurred because the ACK signal has not been input before the input determination period reaches “0”. In the present embodiment, since timer interrupt processing is executed every 4 ms, each period is subtracted by 4 ms.

In step T5, the hit determination random number update process stored in the RAM 33 is updated. When a plurality of hit determination random numbers are used, the plurality of hit determination random numbers stored in the RAM 33 are updated.
In the case of the first hit determination random number 33a update process in the first cycle after the RAM 33 is initialized, the random number acquired in step S19 is used to calculate 1 of the hit determination random number 33a after the RAM 33 is initialized. A period (start period T) until the update process of the cycle is started is determined. Then, after the RAM 33 is initialized, the process waits until the determined start period T elapses. Whether or not the start period T has elapsed since the initialization of the RAM 33 can be determined by the timer subtraction process at step T4. When the start period T elapses after the RAM 33 is initialized, the first initial value of the first cycle (first cycle) of the hit determination random number 33a is set. Here, in the present embodiment, the first initial value of each cycle of the hit determination random number 33 a is determined using the hit initial value random number 33 b stored in the RAM 33. Further, in this embodiment, the start time of the update process of the hit initial value random number 33b after the RAM 33 is initialized is made coincident with the start time of the update process of the hit determination random number 33a. For this reason, when the start period T elapses after the RAM 33 is initialized, the random number 33b for the initial value stored in the RAM 33 is the initial value when the RAM 33 is initialized (in this embodiment, “ 0 "). Accordingly, the winning determination random number 33a is updated with the initial value “0” of the winning initial value random number 33b as the first initial value in the first cycle when the start period T has elapsed since the RAM 33 was initialized. Be started.
When the hit determination random number 33a reaches the second value in the cycle, the update process is continued from the first value.
When the hit determination random number 33a reaches a value immediately before the first initial value in the cycle, the hit determination random number 33b is stored using the value of the hit initial value random number 33b stored in the RAM 33. The first initial value of the next cycle of 33a is determined, and the update processing of the next cycle of the hit determination random number 33a is performed. Thereafter, in the same manner, while updating the first initial value of the next cycle of the hit determination random number 33a using the hit initial value random number 33b for each cycle (one period) of the hit determination random number 33a), The hit determination random number 33a is updated every cycle (one cycle).
If the initialization of the RAM 33 is not performed when the main control circuit 31 (the processing unit 31a) starts operation, the hit determination random number 33a and the hit initial value random number 33b are not initialized. When the RAM 33 is not initialized, the winning determination random number 33a and the winning initial value random number 33b are updated from the values before the power failure.

  In step T5, an update process similar to the update process of the hit initial value random number 33b in step S24 is also performed. That is, the random number determination random number update process is also performed. In this way, the randomness of the winning initial value random number is further increased by performing the updating process of the winning initial value random number in each of the main process and the timer interrupt process in the main process. In step T5, the hit determination random number 33b is updated by the hit determination random number generating means 31c, and the hit initial value random number 33b is updated by the hit initial value random number generating means 31d.

In step T6, a prize ball control process is performed. In the winning ball control process, input information indicating that a game ball has entered a winning opening (general winning opening, starting winning opening, large winning opening, etc.) is read from the input area of the RAM 33, and the read input information is supported. A signal (prize ball command signal) indicating the number of winning balls (corresponding to the winning opening into which the game ball has entered) is stored in the transmission area of the RAM 33.
In step T7, fraud detection processing is performed. For example, the input information is read from the input area of the RAM 33, and the input information indicating that the jackpot gaming state in which the opening / closing control of the big winning opening / closing member for opening / closing the big winning opening is occurring is not input. Then, it is determined whether or not input information indicating that the game ball has entered the big winning opening is input. When fraud is detected, the prize ball abnormality information is stored in the transmission area of the RAM 33.

In step T8, a lottery process is performed. For example, when input information is read from the input area of the RAM 33 and input information indicating a condition for performing a lottery to determine whether or not to generate a game state advantageous to the player is input, the input information is stored in the RAM 33. The hit determination random number 33a is acquired (read). Then, the acquired winning determination random number 33a is compared (lottery) with the set value (winning value) stored in the ROM 32, and the comparison result is output (the lottery result is output). To determine if it exists). For example, in the case of generating a jackpot gaming state and a probability variation gaming state, when input information indicating that a game ball has entered the start winning opening is input, a jackpot determining random number and a winning symbol determining random number are acquired. The acquired jackpot determination random number and the winning symbol determination random number are compared with the set value (winning value) stored in the ROM 33.
Then, output information is set based on the lottery result (the comparison result between the acquired winning determination random number 33 a and the set value) and stored in the output area of the RAM 33. For example, when the jackpot determination random number generated by the jackpot determination random number generation means 31c matches the set value (big win value) (when the lottery result is a win), it is determined to generate a jackpot gaming state. To do. Further, when the winning symbol determination random number matches the set value (probability variation symbol setting value), it is determined to generate the probability variation gaming state. The hit fluctuation display pattern is determined based on the hit fluctuation display pattern random number generated by the hit fluctuation display pattern random number generating means. Then, the winning symbol information indicating the determined winning symbol and the winning variation display pattern information indicating the winning variation display pattern are stored in the output area of the RAM 33. In addition, information for generating a jackpot gaming state (for example, driving information for driving the big prize opening / closing member) and information for generating a probability changing gaming state (for example, high probability table selection information) are output to the output area of the RAM 33. Remember. On the other hand, if the jackpot determination random number generated by the jackpot determination random number generation means 31c does not match the set value (big hit value) (if the lottery result is out of place), the lost symbol determination random number generation means generates The outlier design determining random number is determined based on the outlier design determining random number, and the outbreak variation display pattern is determined based on the outlier variation display pattern random number generated by the outbreak variation display pattern random number generating means. Then, the determined symbol information indicating the error symbol and the error variation display pattern information indicating the error variation display pattern are stored in the output area of the RAM 33.
The lottery means 31b compares the hit determination random number 33a with the set value in step T8.

In step T9, signal output processing is performed. For example, information stored in the output area of the RAM 33 is read, and various signals (main command signal and drive signal) are output based on the read information.
In step T10, “C” is set in the watchdog timer clear register WCL. As a result, “A”, “B”, and “C” are sequentially set in the watchdog timer clear register WCL, so that the watchdog timer is cleared.
In step T11, the register is switched (returned). Here, when the timer interrupt process is started, the main control circuit 31 (processing unit 31a) saves the information stored in the register to the stack, and the information stored in the register used in the main process. Is prevented from being destroyed. In step T11, since the timer interrupt process is completed, the information saved in the stack is stored in the read register.

Next, the operation of the present embodiment will be described with reference to FIG. 5 showing the change state of the hit determination random number and the hit initial value random number. Hereinafter, a case where one hit determination random number 33a and one hit initial value random number 33b are used will be described. In addition, operations relating to the change state of the hit determination random number 33a and the hit initial value random number 33b will be mainly described, and description of other operations will be omitted. In FIG. 5, the hit determination random number is indicated by a solid line, and the hit initial value random number is indicated by a broken line.
In the present embodiment, when the RAM 33 is initialized, the hit determination random number 31a is updated by the hit determination random number generator 31 and the hit initial value random number 33b is updated by the hit initial value random number generator 31d. The process is configured to start after a period (start period T) determined based on the random number generated by the random number generation circuit 34 has elapsed since the RAM 33 was initialized.
Further, the random number for hit determination (count value for hit determination) 33a has a first range “0” to “299” in which the reset value “0” is the first value and the return value “299” is the second value. The first update value “1” is updated (added) in the direction from the reset value “0” to the return value “299” (addition direction). Within the second range “0” to “299” in which the third value, the return value “299” is the fourth value, the reset value “0” to the return value “299” in the direction (addition direction) It is assumed that two update values “1” are updated (added) by two. In this case, one cycle (one cycle) of the hit determination random number 33a is a range in which the update (addition) process by “1” from the first initial value is performed “300” times. Further, when the hit determination random number 33a and the hit initial value random number 33b reach the return value “299”, the update (addition) is continued from the reset value “0”.

  When the power of the pachinko machine is turned on and AC24V power is supplied to the power supply circuit 11 (power supply board 10), the power supply circuit 11 converts the AC24V power into DC34V power and DC12V power. The AC 24V power and the AC 12V power are supplied from the power supply board 10 to the main control board 20 through the power lines L1 and L2. The voltage conversion circuit 21 provided on the main control board 20 converts DC12V power supplied to the main control board 20 into DC5V power, and the main control circuit 31 and the RAM 33 are connected via the terminal 30b of the main control circuit IC30. Supply as drive power.

The main control circuit 31 (processing unit 31a) performs a return process when the voltage of DC 5V power reaches the operating voltage. First, it is determined whether or not the game information or the like stored in the RAM 33 is normal (whether or not it has changed during a power failure). For example, determination information (for example, checksum value) is calculated based on game information or the like stored in the save area of the RAM 33, and the calculated determination information and determination information stored in the save area of the RAM 33 (for example, the previous time) It is determined whether or not the checksum values calculated at the time of the power failure processing match (steps S11 and S12).
When the calculated determination information matches the determination information stored in the RAM 33, it is determined that the game information stored in the RAM 33 is normal (not changed during a power failure) and stored in the RAM 33. The game is continued based on the game information that has been played (step S14). That is, the game is resumed from the game state at the time of the previous power failure.
On the other hand, if the calculated determination information does not match the determination information stored in the RAM 33, it is determined that the game information stored in the RAM 33 is abnormal (there may be a change during a power failure). Then, the RAM 33 is initialized. At this time, the hit determination random number 33a and the hit initial value random number 33b in the RAM 33 are set to initial values (steps S17 and S18). In FIG. 5, at the time t1 when the RAM 33 is initialized, the hit determination random number 33a and the hit initial value random number 33b are set to “0” (= reset value).
In the case where the main control circuit 31 (processing means 31a) is restored in a state in which the RAM clear switch 23 is operated (a state in which an initialization instruction signal is input), it is stored in the RAM 33. The RAM 33 is initialized irrespective of the determination information (steps S7, S10, S17).

When the RAM 33 is initialized, the hit initial value random number 33b is set to the reset value “0”. Therefore, immediately after the RAM 33 is initialized, the hit determination random number generator 31c starts updating the hit determination random number 33a. Then, the hit determination random number 33a starts to be updated from the reset value “0”. In this case, as described above, it is possible to predict a period from when the RAM 33 is initialized until the hit determination random number 33a matches the set value (in FIG. 5, the hit value “140”).
In the present embodiment, when the RAM 33 is initialized, the random number generation circuit 34 acquires a random number generated based on the unique identification information 32a unique to each pachinko machine, and starts based on the acquired random number. The period T is determined (step S19). Note that the random number generation circuit 34 is preferably configured such that the random number changes within the change range of the start period T. For example, change range information (for example, the fifth value and the sixth value indicating the change range of the start period T) indicating the change range of the random number is output from the main control circuit 31 (processing unit 321a) to the random number generation circuit 34. In addition, the change range of the random number generated by the random number generation circuit 34 can be set.

Then, at the time t2 when the start period T determined based on the random number obtained from the random number generation circuit 34 has elapsed from the time t1 when the RAM 33 was initialized, the hit determination random number 33a of the hit determination random number generation means 31c The update process is started (step T5), and the update process of the hit initial value random number 33b by the hit initial value random number generating means 31d is started (steps S24 and T5).
As shown in FIG. 5, the hit initial value random number 33b starts to be updated with the reset value “0” as the second initial value at time t2. Here, at the time point t2, the hit initial value random number 33b is the reset value “0”. Therefore, in the hit determination random number 33a, the reset value “0” is set as the first initial value at the time point t2, and the first cycle (first cycle) starts to be updated from the first initial value “0”. Is done. The hit determination random number 33a is updated (counted) for one cycle (one cycle) after the first cycle update at the time point t2 (the first between the reset value “0” and the turn-back value “299”). In the case of the range, the return value “299” is reached at time t3 when “300” updates) are performed. Thereby, the update (count) of the first cycle of the hit determination random number 33a is completed. During this period, the hit initial value random number 33b is updated at a shorter update cycle than the hit determination random number 33a.
The hit determination random number 33a starts to be updated in the second cycle when the update of the first cycle is completed at time t3. Here, the hit initial value random number 33b is set as the first initial value in the second cycle. In FIG. 5, the random number for initial value 33b is “130” at time t3, “130” is set as the first initial value of the second cycle of the random number for hit determination 33a, and the first initial value “130” is set. The second cycle update is started.
When the hit determination random number 33a reaches the return value “299” at the time t4, the update from the reset value “0” is continued because the update in the second cycle is not completed. Then, at the time t5 when one cycle (one cycle) is updated from the initial value “130” (“300” update), the hit determination random number 33a is the first initial value of the second cycle. The value “129” immediately before “130” is reached. Thereby, the second cycle update (count) of the hit determination random number 33a is completed.
Thereafter, similarly, the hit determination random number 33a is updated within the first range while updating the first initial value using the hit initial value random number 33b every cycle (every period). .

As described above, in the present embodiment, an initial value update type hit determination random number is used as the hit determination random number 33a. When the RAM 33 is initialized, random number generation is performed after the RAM 33 is initialized. After the start period T determined based on the random number generated by the circuit 34 has elapsed, the process for updating the hit determination random number 33a is started. Here, since the random number generation circuit 34 generates a random number based on the unique identification information 32a unique to each gaming machine, the start period T determined based on the random number 32a generated by the random number generation circuit 34. Is different for each gaming machine.
As a result, even when the random number for hit determination 33a is updated from the first value (for example, “0”) after the RAM 33 is initialized, the random number for hit determination 33a after the RAM 33 is initialized. It is difficult to predict the period until the value matches the set value (win value) (when the hit determination random number 33a matches the set value). Therefore, an illegal game due to an illegal initialization of the RAM 33 can be prevented.

In the first embodiment, after the RAM 33 is initialized, after a start period T determined based on the random number generated by the random number generation circuit 34 has elapsed, the hit determination by the hit determination random number generation circuit 31c is performed. The process for updating the random number for random use 33a and the process for updating the random number for random initial value 33b by the random number generating circuit for successful initial value 31d are started. It may be configured to start before the hit determination random number generation circuit 31c updates the hit determination random number 33a.
Hereinafter, a second embodiment will be described in which, when the RAM 33 is initialized, the hit initial value random number update process is started, and then the hit determination random number update process is started.
The gaming machine of the second embodiment can be configured similarly to FIG.
Further, the process of the second embodiment, except for the update process of the hit initial value random number 33b in step S24 and the update process of the hit determination random number 33a and the hit initial value random number 33b in step T5, The same processing as in the flowcharts shown in FIGS. 2 to 4 is executed.

  The operation of the second embodiment will be described with reference to FIG. 6 showing the change state of the hit determination random number and the hit initial value random number. In the following, each condition is the same as that described with reference to FIG. In FIG. 6, the hit determination random number is indicated by a solid line, and the hit initial value random number is indicated by a broken line. In the second embodiment, the hit initial value random number 33b update process in step S24, the hit determination random number 33a update process, and the hit initial value random number 33b update process in step T5 are the first. Therefore, only the update process of the hit initial value random number 33b and the update process of the hit determination random number 33a will be described below.

In the present embodiment, as in the first embodiment, when the RAM 33 is initialized, the random number generated by the random number generation circuit 34 based on the unique identification information 32a unique to each pachinko machine is used. The start period T is determined based on the acquired random number (step S19).
In the first embodiment, after the start period T has elapsed from the time point t1 when the RAM 33 is initialized, the hit initial value random number generation unit 31d starts the update process of the hit initial value random number 33b. In the embodiment, at the time point t1 when the RAM 33 is initialized, the hit initial value random number generating means 31d starts updating the hit initial value random number 33b (step S24, step T5). The starting point of the process for updating the winning initial value random number 33b may be before the start period T elapses after the RAM 33 is initialized (before the updating of the winning determination random number 33a is started).
As a result, as shown in FIG. 6, the hit initial value random number 33b starts to be updated with the reset value “0” as the second initial value at the time t1 when the RAM 33 is initialized.
Then, at the time t2 when the start period T has elapsed since the initialization of the RAM 33, the hit determination random number generation means 31c starts updating the hit determination random number 33a (step T5).
Since the update process is started at the time t1 when the RAM 33 is initialized, the hit initial value random number 33b is reset at “0” and the return value “299” at the time t2 when the start period T has elapsed from the time t1. Any value within the range of. Thus, the hit determination random number 33a is set to the value of the hit initial value random number 31b for which update processing has been started at the time point t2 as the first initial value, and one cycle from the set first initial value. Update of the eye (first cycle) is started. In FIG. 6, in the hit determination random number 33a, the hit initial value random number “60” is set as the first initial value in the first cycle at the time point t2, and the first cycle from the first initial value “60” is set to the first cycle. Update starts.
The hit determination random number 33a starts updating the first cycle from the first initial value “60” at the time t2, and then reaches the return value “299” at the time t3. Therefore, the update from the reset value “0” is continued. Then, at the time t4 when one cycle (one cycle) is updated from the initial value “60” (“300” update), the hit determination random number 33a is the first initial value in the first cycle. The value “59” immediately before “60” is reached. Thereby, the second cycle update (count) of the hit determination random number 33a is completed.
The hit determination random number 33a starts to be updated in the second cycle when the update of the first cycle is completed at time t4. Here, the hit initial value random number 33b is set as the first initial value in the second cycle. In FIG. 6, the hit initial value random number 33b is “170” at the time point t4, “170” is set as the first initial value in the second cycle of the hit determination random number 33a, and the first initial value “170” is set. The second cycle update is started.
Thereafter, similarly, the hit determination random number 33a is updated within the first range while updating the first initial value using the hit initial value random number 33b every cycle (every period). .

As described above, in the present embodiment, an initial value update type hit determination random number is used as the hit determination random number 33a. When the RAM 33 is initialized, random number generation is performed after the RAM 33 is initialized. After the start period T determined based on the random number generated by the circuit 34 has elapsed, the process for updating the hit determination random number 33a is started. As described above, the start period T determined based on the random number generated by the random number generation circuit 34 is different for each gaming machine.
Further, the initial value random number 33b is updated before the start period T elapses after the RAM 33 is initialized (including the time when the RAM 33 is initialized). For this reason, the random number for initial value at the time when the start period T has elapsed since the initialization of the RAM 33 is a random value. Thereby, the first initial value of the first cycle (first cycle) of the random number for hit determination after the RAM 33 is initialized is set to a different value for each gaming machine.
Therefore, an illegal game due to an illegal initialization of the RAM 33 can be prevented more reliably.

In the first and second embodiments, as a technique for making it difficult to predict a period (a time when the random number for hit determination matches the set value) after the RAM 33 is initialized, it is specific to each gaming machine. The random number for hit determination is updated after the start period T determined based on the unique identification information (for example, determined based on the random number generated based on the unique identification information unique to each gaming machine) is passed. Although the method for starting the process is used, the unique identification information unique to each gaming machine is used to predict the period (the coincidence period) from when the RAM 33 is initialized until the hit determination random number matches the set value. However, the method for making this difficult is not limited to this.
Hereinafter, the first initial value (start value S) of the first cycle (first cycle) of the random number for hit determination after the RAM 33 is initialized is based on the unique identification information unique to each gaming machine. A third embodiment using a method that makes it difficult to predict a period from when the RAM 33 is initialized to when the hit determination random number matches the set value (matching time) will be described.
The gaming machine of the third embodiment can be configured similarly to FIG.
The processing of the third embodiment includes setting value processing based on the random number in step S19, update processing of the hit initial value random number 33b in step S24, hit determination random number 33a in step T5, and Except for the process of updating the hit initial value random number 33b, the same process as the flowchart shown in FIGS.

  The operation of the third embodiment will be described with reference to FIG. 7 showing the change state of the hit determination random number and the hit initial value random number. In the following, each condition is the same as that described with reference to FIG. In FIG. 7, the hit determination random number is indicated by a solid line, and the hit initial value random number is indicated by a broken line. In the third embodiment, the setting value process based on the random number in step S19, the update process for the random number for initial value 33b in step S24, and the update process for the random number for determination 33a in step T5. In addition, since the update process of the hit initial value random number 33b is different from that of the first embodiment, hereinafter, the set value process, the update process of the hit initial value random number 33b, and the hit determination random number 33a are based on the random number. Only the update process will be described.

In the present embodiment, when the RAM 33 is initialized, the random number generation circuit 34 acquires a random number generated based on the unique identification information 32a unique to each pachinko machine, and based on the acquired random number, A start value S of the hit determination random number 33a is determined (step S19).
In the first and second embodiments, after the start period T determined based on the unique identification information 32a has elapsed since the time point t1 when the RAM 33 was initialized, the winning initial value random number generating means 31d generates a winning initial value. In this embodiment, the update process of the random number for value 33b is started. At the time t1 when the RAM 33 is initialized, the update process of the random number for random value 33b by the random number generator for random initial value 31d is started. At the same time, the update processing of the hit determination random number 33a by the hit determination random number generation means 31c is performed by changing the start value S determined based on the random number generated by the random number generation circuit 34 to the first cycle (first cycle) It is started as an initial value of 1 (step S24, step T5).
Note that the random number generation circuit 34 has a change range of the hit determination random number 33a, that is, within a first range between the reset value “0” as the first value and the return value “299” as the second value. It is preferable that the random number is changed. For example, change range information indicating the change range of the random number (for example, the fifth value “0” and the sixth value “299” indicating the change range) from the main control circuit 31 (processing unit 321a) to the random number generation circuit 34. And the change range of the random number generated by the random number generation circuit 34 can be set.
The hit initial value random number generation means 31c starts the update process of the hit initial value random number 33b at the time t1 when the RAM 33 is initialized. In this case, as shown in FIG. 7, the hit initial value random number 33b is started to be updated with the reset value “0” as the second initial value.
The hit determination random number generation means 31c also starts the update process of the hit determination random number 33a at the time t1 when the RAM 33 is initialized. Here, when the RAM 33 is initialized as shown in FIG. 7, the hit determination random number generation means 31c uses the first initial value of the first cycle of the hit determination random number 33a as a random number. Updating (setting) is performed using the start value S determined based on the random number generated by the generation circuit 34, and updating of the first cycle (first cycle) of the hit determination random number 33a is started.
The hit determination random number 33a reaches the return value “299” at the time point t2 after the update of the first cycle is started with the start value S determined based on the random number at the time point t1 as the first initial value. Since the update in the first cycle is not completed, the update from the reset value “0” is continued. Then, at the time t3 when one cycle (one cycle) is updated from the initial value “S” (“300” update), the hit determination random number 33a is the first initial value in the first cycle. The value just before “S” is reached. Thereby, the update (count) of the first cycle of the hit determination random number 33a is completed.
The hit determination random number 33a is updated in the second cycle when the first cycle update process of the hit determination random number 33a is completed at time t3. Here, when the RAM 33 is initialized, the hit determination random number generation means 31c updates the first initial value of the second cycle of the hit determination random number 33a using the hit initial value random number 33b (setting). To do). Accordingly, the first initial value of the second cycle of the hit determination random number 33a is updated using the hit initial value random number 33b. In FIG. 7, the hit initial value random number 33b is “120” at time t3, “120” is set as the first initial value of the second cycle of the hit determination random number 33a, and the first initial value “120” is set. The second cycle update is started.
Thereafter, similarly, the hit determination random number 33a is updated within the first range while updating the first initial value using the hit initial value random number 33b every cycle (every period). .

As described above, in the present embodiment, the initial value update type hit determination random number is used as the hit determination random number 33a, and the random number generated by the random number generation circuit 34 when the RAM 33 is initialized. Is set as the first initial value of the first cycle (first period) of the hit determination random number 33a after the RAM 33 is initialized, and the hit determination random number 33a is updated. Processing has started. The random number generation circuit 34 generates a random number based on the unique identification information 32a unique to each gaming machine. For this reason, the start value S determined based on the random number generated by the random number generation circuit 34 is different for each gaming machine.
Thus, even when the update of the random number for hit determination after the RAM 33 is initialized is started, the period from when the RAM 33 is initialized until the random number for hit determination 33a matches the set value (win value) ( It is difficult to predict the time (when the hit determination random number 33a matches the set value). Therefore, an illegal game due to an illegal initialization of the RAM 33 can be prevented.

  In the first to third embodiments, the power line L3 is connected to the power supply board 10 and the main control board 20 in order to supply the backup power from the backup capacitor 12. For this reason, when the power line L2 is short-circuited in a state where the power line L3 is short-circuited or disconnected, the game information stored in the RAM 33 may be erased. In this case, when the short circuit of the power supply line L2 is canceled and the supply of DC 12V power is started, the RAM 33 is initialized by the return process of the main control circuit 31. Even in this case, as described above, since it is difficult to predict when the hit determination random number becomes equal to the set value, it is possible to prevent an illegal game from being performed.

  In the first to third embodiments, since the RAM clear switch 23 is provided on the main control board 20, the signal line for transmitting the operation signal (initialization instruction signal) of the RAM clear switch is connected to the main control board. No need to connect to 20. Since the signal line for transmitting the initialization instruction signal is not connected to the main control board 20, the RAM 33 is illegally initialized by short-circuiting the power line L2 for a short time with the initialization instruction signal inserted into the signal line. Can be prevented.

The present invention is not limited to the configuration described in the embodiment, and various changes, additions, and deletions are possible.
As a method of changing the period until the hit determination random number matches the set value after initializing the RAM (memory circuit) based on the unique identification information (unique ID) unique to the gaming machine, Various methods can be used without being limited to the described method. For example, the first initial value of the hit determination random number 33a is updated using either the hit initial value random number 33b or a value determined based on the random number generated by the random number generation circuit 34. can do. Whether to use a value determined based on the random number 33b for winning initial value or the random number generated by the random number generation circuit 34 is determined using an appropriate method such as lottery. Alternatively, until the random number for determination 33a is updated by n cycles (n: a positive integer) after the RAM 33 is initialized (preferably until one cycle is updated), the random number generator 34 generates The first initial value of the hit determination random number 33a is updated using a value determined on the basis of the random number, and after the n period update, the hit initial value random number 33b or the random number generation circuit 34 The first initial value of the hit determination random number 33a can be updated using any of the values determined based on the random number. Alternatively, until the random number for determination 33a is updated by n cycles (n: a positive integer) after the RAM 33 is initialized (preferably until one cycle is updated), the random number generator 34 generates The first initial value of the hit determination random number 33a is updated using a value determined on the basis of the random number, and after the n cycles are updated, the hit determination random number 33b is used to determine the hit determination random number 33a. The first initial value can be configured to be updated. Alternatively, the first initial value for each cycle of the hit determination random number 33 a can be updated using a value determined based on the random number generated by the random number generation circuit 34. Whichever method is used, it is difficult to predict the period from when the RAM 33 is initialized until the hit determination random number 33a matches the set value.
The configuration of the power supply substrate 10 and the configuration of the main control substrate 20 are not limited to the configurations described in the embodiments.
The present invention can be configured by individually combining the configurations described in the embodiments individually or in combination.
The voltage value of the DC power supplied to the main control board 20 can be selected as appropriate.
Although the main control board 20 provided with the main control circuit 31 has been described, the present invention can also be applied to other control boards provided with other control circuits.
Although the case where it is configured as a pachinko machine has been described, the present invention can be configured as various gaming machines other than the pachinko machine.

The present invention can be configured as follows.
For example, “(Aspect 1) The gaming machine according to claim 1, wherein the initial value random number generation means is configured such that when the storage means is initialized by the processing means, the winning determination random number generation means Before starting the process of updating the hit determination random number, the game machine is characterized in that the process of updating the initial value random number is started. "

In this aspect, when the storage means is initialized, the initial value random number update process by the initial value random number generation means is started, and the hit determination random number update process by the hit determination random number generation means is started. Start before. The initial value random number update process may be started before the hit determination random number update process is started, or may be the time when the storage unit is initialized.
In the present invention, after the storage means is initialized, after the start period determined based on the unique identification information unique to each gaming machine has elapsed, the hit determination random number update process is started and the update is started. Since the first initial value of the hit determination random number is updated using the initial value random number, the time when the hit determination random number matches the set value (win value) after the storage means is initialized It is more difficult to predict. Therefore, it is possible to more surely prevent an illegal game in which the point in time when the hit determination random number matches the set value (win value).

  Further, “(Aspect 2) Power supply board provided with a processing means, a lottery means, a control board provided with a hit determination random number generation means and a storage means, and a power supply means for supplying power to the control board. And the storage means stores a winning determination random number, and the winning determination random number generating means stores the winning determination random number within a first range between a first value and a second value. A process of sequentially updating the first range from the first initial value in the direction of the first value to the second value by the first update value over one period of the first range. The lottery means performs a lottery process for comparing the winning determination random number with a set value due to establishment of a lottery condition, and the processing means includes the lottery means. The lottery result by means that the hit determination random number matches the set value. When a power failure detection signal indicating that a power failure has occurred and a power failure detection signal has been input is generated based on the information stored in the storage means When the drive power is supplied to the storage unit, it is determined whether the information stored in the storage unit is normal based on the determination information stored in the storage unit. And a game machine that initializes the storage means when it is determined that the information stored in the storage means is abnormal. The control board includes an initial value random number generation means, a random number generation means, The initial value random number and unique identification information for each gaming machine are stored in the storage means, and the initial value random number generation means For value Executing a process of sequentially updating the number from the second initial value in the second range within the first range by the second update value over the second range, and the random number generation means Generating a random number based on the unique identification information stored in the storage means, wherein the hit determination random number generation means uses the first initial value for each cycle as the initial value random number or the random number generation means. The hit conversion random number is updated while updating using any of the random numbers generated in step (i), and the voltage conversion means drives the processing means to drive the voltage of power supplied from the power supply means. The power failure detection means outputs the power failure detection signal when the power failure detection means detects that the power supplied from the power supply means is reduced. Can be configured as Kill.

In this aspect, as with the gaming machine of claim 1, the processing means, the lottery means, the winning determination random number generating means, the initial value random number generating means, the random number generating means, the storage means, and the voltage converting means. And a power supply board on which a power supply means for supplying electric power to the control board is provided. The processing means, the lottery means, the initial value random number generation means, the random number generation means, the voltage conversion means, and the power failure detection means execute the same processing as that of the gaming machine of claim 1. The storage means stores a hit determination random number and a hit initial value random number as in the gaming machine of claim 1.
In this aspect, the hit determination random number generation means uses the first initial value for each cycle of the hit determination random number, using either the initial value random number or the random number generated by the random number generation means. While updating, the process for updating the random number for hit determination is executed. Whether to use the initial value random number or the random number generated by the random number generation means can be determined using an appropriate method such as lottery, for example.
In this aspect, since the first initial value for each cycle of the hit determination random number is updated using either the initial value random number or the random number generated by the random number generation means, the storage means is initialized. Since then, it is difficult to predict when the hit determination random number matches the set value (win value). Therefore, it is possible to prevent an illegal game in which a point in time when the winning determination random number matches the set value (winning value) is predicted.

  Further, “(Aspect 3) A gaming machine according to Aspect 2, wherein the random number generation means for hit determination is determined after the storage means is initialized when the storage means is initialized by the processing means. Until the hit determination random number is updated by n cycles (n: positive integer), the first initial value for each cycle is updated using the random number generated by the random number generation means. Can be configured as a game machine.

In this aspect, when the storage means is initialized, the hit determination random number generation means is updated until the hit determination random number is updated by n cycles (n: a positive integer) after the storage means is initialized. Preferably, the first initial value for each cycle of the hit determination random number is updated using the random number generated by the random number generation means until the cycle is updated.
By using this aspect, it becomes more difficult to predict when the hit determination random number matches the set value (win value) after the storage unit is initialized.

  Further, “(Aspect 4) is a gaming machine according to Aspect 2, wherein the random number generation means for hit determination is determined after the storage means is initialized when the storage means is initialized by the processing means. Until the hit determination random number is updated by n cycles (n: positive integer), the first initial value for each cycle is updated using the random number generated by the random number generation means, After the determination random number has been updated for n cycles, the first initial value for each cycle is updated using the initial value random number. ”

In this aspect, from the initialization of the storage means until the hit determination random number is updated by n cycles, the first random number for each hit determination random number is generated using the random number generated by the random number generation means. After the initial value is updated and n cycles are updated, the first initial value for each cycle of the hit determination random number is updated using the initial value random number.
By using this aspect, it is difficult to predict when the hit determination random number matches the set value (win value) after the storage unit is initialized.

  Further, “(Aspect 5) is the gaming machine according to any one of claims 1 and 1, wherein the hit determination random number generation means updates the hit determination random number within the main process of the processing means. The initial value random number generation means executes processing for updating the initial value random number in the main processing of the processing means and in the timer interrupt processing in the main processing of the processing means. Can be configured as a game machine.

In this aspect, the hit determination random number generating means executes a process of updating the hit determination random number within the main process of the processing means, and the initial value random number generating means is within the main process of the processing means and the main of the processing means. The process of updating the initial value random number is executed in the timer interrupt process in the process.
In this aspect, since the number of initial value random number update processes within one cycle of the hit determination random number can be increased, the update value of the hit determination random number can be updated more randomly.

  Further, “(Aspect 6): a power supply board provided with a processing means, a lottery means, a control board provided with a random number generator for hit determination and a storage means, and a power supply means for supplying power to the control board And the storage means stores a winning determination random number, and the winning determination random number generating means stores the winning determination random number within a first range between a first value and a second value. A process of sequentially updating the first range from the first initial value in the direction of the first value to the second value by the first update value over one period of the first range. The lottery means performs a lottery process for comparing the winning determination random number with a set value due to establishment of a lottery condition, and the processing means includes the lottery means. The lottery result by means that the hit determination random number matches the set value. When a power failure detection signal indicating that a power failure has occurred and a power failure detection signal has been input is generated based on the information stored in the storage means When the drive power is supplied to the storage unit, it is determined whether the information stored in the storage unit is normal based on the determination information stored in the storage unit. And a game machine that initializes the storage means when it is determined that the information stored in the storage means is abnormal. The control board includes a random number generation means, a voltage conversion means, and a power failure detection means. The random number generation unit generates a random number based on the unique identification information stored in the storage unit, and the hit determination random number generation unit generates the first initial value as the random number generation. hand The voltage conversion means converts the voltage of the power supplied from the power supply means into a voltage corresponding to the voltage of the driving power of the processing means, and the power failure detection means The power outage detection signal is output when it is detected that the power supplied from the power supply means is reduced.

In this aspect, the processing means, the lottery means, the hit determination random number generation means, the random number generation means, the storage means, the control board provided with the voltage conversion means and the power failure detection means, and power to the control board. A power supply board provided with power supply means for supplying is provided. The processing means, the lottery means, the random number generation means, the voltage conversion means, and the power failure detection means execute the same processing as that of the gaming machine according to claim 1. The storage means stores a hit determination random number.
In this aspect, the hit determination random number generation means updates the first initial value for each cycle of the hit determination random number using the random number generated by the random number generation means, while the hit determination random number is updated. Execute the update process.
In this aspect, since the first initial value for each period of the hit determination random number is updated using the random number generated by the random number generation means, the storage means is initialized with a simple configuration. Therefore, it is difficult to predict when the hit determination random number matches the set value (win value).

  In addition, “(Aspect 7) is the gaming machine according to any one of claims 1 and 1 to 6, wherein the control board outputs an initialization instruction signal for instructing initialization of the storage means. Means is provided, and the processing means initializes the storage means when drive power is supplied in a state where an initialization signal is output from the initialization instruction means. Game machine. "

In this aspect, the control board is provided with initialization instruction means for outputting an initialization instruction signal for instructing initialization of the memory circuit. The processing means initializes the storage means when operating in a state where the initialization instruction signal is output from the initialization instruction means.
In this aspect, since it is not necessary to connect a signal line for transmitting the initialization instruction signal from the initialization instruction means to the control board, it is possible to prevent an unauthorized operation on the signal line for transmitting the initialization instruction signal. Can do.

  Further, “(Aspect 8) is a gaming machine according to any one of Claims 1 and 1-7, wherein the power supply board supplies backup power to the storage means provided on the control board. It is possible to configure as a gaming machine characterized by having “.

In this aspect, a backup power supply for supplying backup power to the storage means is provided on the power supply board.
As a result, as in the case where a backup power supply is provided on the control board, it is possible to prevent an illegal act of intentionally setting the game state by removing the control board.

1 is a diagram showing a schematic configuration of a first embodiment of the present invention. It is a flowchart explaining the outline of the power-on process (a main process is included) of the 1st Embodiment of this invention. It is a flowchart explaining the outline of the power-on process (a main process is included) of the 1st Embodiment of this invention. It is a flowchart explaining the outline of the timer interruption process of the 1st Embodiment of this invention. FIG. 6 is a diagram showing a change state of a hit determination random number and a hit initial value random number according to the first embodiment of the present invention. It is a figure which shows the change state of the random number for winning determination and the random number for winning initial value of the 2nd Embodiment of this invention. It is a figure which shows the change state of the random number for winning determination and the random number for winning initial value of the 3rd Embodiment of this invention. It is a figure which shows the change state of the random number for hit determination of a prior art example.

Explanation of symbols

10 power supply board 11 power supply circuit (power supply means)
12 Backup capacitor (backup power supply)
20 Main control board 21 Voltage conversion circuit (voltage conversion means)
22 Power failure detection circuit (power failure detection means)
23 RAM clear switch (initialization instruction means)
30 Main control circuit IC
31 main control circuit 31a processing means 31b lottery means 31c hit determination random number generation means 31d initial value random number generation means 32 ROM
32a Unique identification information 33 RAM
33a Random number for judgment 33b Random number for initial value 34 Random number generation circuit (random number generation means)

Claims (1)

A processing means, a lottery means, a control board provided with a hit determination random number generating means and a storage means, and a power supply board provided with a power supply means for supplying power to the control board,
The storage means stores a hit determination random number,
The hit determination random number generator generates the hit determination random number from a first initial value within a first range between a first value and a second value, from the first value to the second value. Sequentially updating the first initial value in the direction of the value over one period within the first range while updating the first initial value every period,
The lottery means executes a lottery process for comparing the random number for hit determination and a set value due to establishment of a lottery condition,
The processing means generates a winning gaming state when a lottery result by the lottery means indicates that the winning determination random number matches the set value, and a power failure indicating that a power failure has occurred. When a detection signal is input, determination information is generated based on the information stored in the storage unit and stored in the storage unit. When drive power is supplied, the determination information is stored in the storage unit. It is determined whether or not the information stored in the storage means is normal based on the determined determination information, and the storage means is initialized when it is determined that the information stored in the storage means is abnormal A gaming machine that
The control board is provided with initial value random number generation means, random number generation means, voltage conversion means and power failure detection means, and the storage means is unique to the initial value random number and each gaming machine. Unique identification information is stored,
The initial value random number generation means generates the initial value random number from the second initial value within the second range, which is within the first range, from the second initial value over the second range. Execute the process to update sequentially,
The random number generation means generates a random number based on the unique identification information stored in the storage means,
The initial value random number generation means, when the storage means is initialized by the processing means, starts a process of updating the initial value random number when the storage means is initialized,
The hit determination random number generation means is determined based on the random number generated by the random number generation means from the time when the storage means is initialized when the storage means is initialized by the processing means. that when the period of time, starts the process of updating the hit determination random number while updating using first the initial value for the random number initial value of the 1 per cycle,
The voltage conversion means converts the voltage of power supplied from the power supply means into a voltage corresponding to the voltage of drive power of the processing means,
The gaming machine according to claim 1, wherein the power failure detection means outputs the power failure detection signal when it is detected that the power supplied from the power supply means is reduced.

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