JP5101157B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device using a support.

  In recent years, CSP (Chip Size Package) has attracted attention as a new packaging technology. CSP refers to a small package having an outer shape that is approximately the same size as the outer shape of a semiconductor chip. A BGA (Ball Grid Array) type semiconductor device is known as a kind of CSP. A BGA type semiconductor device has a plurality of ball-shaped terminals made of a metal material such as solder arranged on one surface of a package.

  Further, in order to increase the mounting density, it is required to reduce the thickness of the semiconductor chip, and it is necessary to make the semiconductor substrate thinner in order to satisfy this requirement. However, if the semiconductor substrate becomes thin, warping or breakage due to a decrease in strength occurs in the manufacturing process, which makes conveyance impossible. Therefore, a support such as a glass substrate or a protective tape is bonded to one surface of the semiconductor substrate, and the surface of the support that is not bonded is ground to thin the semiconductor substrate.

  FIG. 20 is a cross-sectional view schematically showing a conventional BGA type semiconductor device including a support. On the surface of the semiconductor substrate 100 made of silicon (Si) or the like, a semiconductor integrated circuit 101 made of elements such as a CCD (Charge Coupled Device) type image sensor or a CMOS type image sensor is formed. Connected pad electrodes 102 are formed via an insulating film 103. The pad electrode 102 is covered with a passivation film 104 made of a silicon nitride film or the like.

  On the surface of the semiconductor substrate 100, a support 105 such as a glass substrate is bonded through an adhesive layer 106 made of epoxy resin or the like. The support 105 is thick in order to firmly hold the semiconductor substrate 100 to be thinned during the manufacturing process and to prevent the support 105 itself from warping or breaking. For example, the thickness of the semiconductor substrate 100 after thinning is thin. Is about 100 μm, the thickness of the support 105 is about 400 μm.

  An insulating film 107 made of a silicon oxide film, a silicon nitride film or the like is formed on the side surface and the back surface of the semiconductor substrate 100. A wiring layer 108 electrically connected to the pad electrode 102 is formed on the insulating film 107 along the side surface and the back surface of the semiconductor substrate 100. Further, a protective layer 109 made of a solder resist or the like is formed so as to cover the insulating film 107 and the wiring layer 108. An opening is formed in a predetermined region of the protective layer 109, and a ball-shaped conductive terminal 110 electrically connected to the wiring layer 108 through the opening is formed.

  Such a semiconductor device is manufactured through a process (so-called dicing process) in which the support 105 and the protective layer 109 are individually separated by a dicing blade along a predetermined dicing line DL which is a boundary between the individual semiconductor devices. It was.

The above-described technique is described in, for example, the following patent documents.
JP 2006-93367 A

  However, since the chip size has been miniaturized in recent years, the number of dicing lines DL for one wafer is increasing. Therefore, the conventional manufacturing method in which the dicing lines DL are individually cut as described above has a problem that the dicing process takes a long time. In particular, when a highly rigid substrate such as a glass substrate is used as the support 105, it is difficult to cut the support 105, which also contributes to the long time required for the dicing process.

  In addition, since electronic devices are required to have higher functionality and thinner thickness, there has been a demand for a technique for manufacturing a highly reliable semiconductor device thinner.

  Therefore, an object of the present invention is to provide a method for manufacturing a semiconductor device that can improve the productivity by simplifying the manufacturing process, and further to reduce the thickness of the semiconductor device.

  The present invention has been made in view of the above problems, and its main features are as follows. That is, the method for manufacturing a semiconductor device of the present invention includes a step of bonding a surface side of a wafer-like semiconductor substrate and a surface of a support, a step of removing a part of the semiconductor substrate, and a surface of the support. The step of forming a groove extending in the middle of the thickness direction of the support, and etching the back surface of the support until the groove is exposed from the back surface of the support, thereby dividing the support And a step of obtaining a semiconductor device.

  The method for manufacturing a semiconductor device according to the present invention includes a step of bonding a tape to the surface side of a wafer-like semiconductor substrate, a step of bonding a surface of a support on the tape, and a step of removing a part of the semiconductor substrate. And forming a groove extending in the thickness direction of the tape on the surface of the tape on the semiconductor substrate side, and being formed on a side surface and a back surface of the semiconductor substrate and opening at a position corresponding to the groove. Forming a protective layer having a portion, etching the back surface of the support until the tape is exposed from the back surface side of the support, and supplying a dissolving agent to the exposed tape from the semiconductor substrate. And removing the tape to separate the semiconductor substrate and the support to obtain individual semiconductor devices.

  The method for manufacturing a semiconductor device of the present invention includes a step of bonding a surface side of a wafer-like semiconductor substrate and a surface of a support, a step of removing a part of the semiconductor substrate, and a surface of the support. A step of forming a groove extending in the middle of the thickness direction of the support, and a step of etching at least a position corresponding to the groove on the back surface of the support to reduce a thickness of the support at a position corresponding to the groove. And a step of obtaining individual semiconductor devices by applying a load to the support and dividing the support along the groove.

  According to the present invention, it is possible to obtain a semiconductor device separated by a single process without dividing the dicing lines individually, so that the time required for the dicing process can be greatly reduced, Can be improved.

  Next, a first embodiment of the present invention will be described with reference to the drawings. 1 to 9 are sectional views or plan views respectively shown in the order of manufacturing steps. Note that the manufacturing process described below is performed using a wafer-like semiconductor substrate, and a large number of semiconductor devices are formed in a matrix with a predetermined dicing line DL as a boundary. A process for forming the one semiconductor device will be described.

  First, as shown in FIG. 1, a semiconductor integrated circuit 1 (for example, a driver circuit in which a light receiving element such as a CCD sensor, a CMOS sensor, and an illuminance sensor, a light emitting element, and a semiconductor element such as a transistor are integrated on its surface, A wafer-like semiconductor substrate 2 made of silicon (Si) or the like on which logic circuits and wirings connected thereto are formed is prepared. The semiconductor substrate 2 has a thickness of about 300 μm to 700 μm, for example. Then, an insulating film 3 (for example, a silicon oxide film formed by a thermal oxidation method, a CVD method, or the like) is formed on the surface of the semiconductor substrate 2 to a thickness of 2 μm, for example.

  Next, a metal layer such as aluminum (Al), aluminum alloy, or copper (Cu) is formed by sputtering, plating, or other film formation methods, and then the metal layer is etched using a resist layer (not shown) as a mask. The pad electrode 4 is formed on the insulating film 3 to a thickness of 1 μm, for example. The pad electrode 4 is an external connection electrode that is electrically connected to the semiconductor integrated circuit 1 and its peripheral elements via a wiring (not shown). Then, a power supply voltage, a ground voltage, or various signals are supplied to the semiconductor integrated circuit 1 and the semiconductor substrate 2 through the pad electrode 4 from a conductive terminal 15 described later. The arrangement position of the pad electrode 4 is not limited and can be arranged on the semiconductor integrated circuit 1.

  Next, a passivation film 5 (for example, a silicon nitride film formed by a CVD method) that covers part or all of the pad electrode 4 is formed on the surface of the semiconductor substrate 2. In FIG. 1, a passivation film 5 is formed so as to cover a part of the pad electrode 4.

  Next, a wafer-like support 7 is bonded onto the surface of the semiconductor substrate 2 including the pad electrode 4 via an adhesive layer 6 made of epoxy resin, polyimide (for example, photosensitive polyimide), resist, acrylic or the like. In the present embodiment, the surface of the support 7 on the semiconductor substrate 2 side is the front surface, and the other surface is the back surface. When the semiconductor integrated circuit 1 includes a light receiving element or a light emitting element, the adhesive layer 6 is transparent because it is a path for light emitted from the semiconductor integrated circuit 1 or light incident on the semiconductor integrated circuit 1. It is preferably made of a material having a good property of transmitting light.

  The support 7 may be, for example, a film-like protective tape, a rigid substrate such as glass, quartz, ceramic, or metal, or may be made of a resin. The support 7 has a function of supporting the semiconductor substrate 2 and protecting the element surface, and has a film thickness of, for example, about 400 μm. When the semiconductor integrated circuit 1 includes a light receiving element or a light emitting element, the support 7 is made of a transparent or translucent material and has a property of transmitting light.

  Next, back grinding is performed on the back surface of the semiconductor substrate 2 using a back surface grinding device (grinder), and the semiconductor substrate 2 is thinned to a predetermined thickness (for example, about 100 μm). The grinding process may be an etching process, or a combination of a grinder and an etching process. Depending on the use and specifications of the final product and the initial thickness of the prepared semiconductor substrate 2, the grinding step may not be necessary.

  Next, as shown in FIG. 2, only a predetermined region corresponding to the pad electrode 4 in the semiconductor substrate 2 is selectively etched from the back side of the semiconductor substrate 2 to partially expose the insulating film 3. Hereinafter, this exposed portion is referred to as an opening 8. Thereby, the wafer-like semiconductor substrate 2 is divided into island shapes as shown in FIGS.

  The selective etching of the semiconductor substrate 2 will be described with reference to FIGS. 3A and 3B. 3A and 3B are schematic plan views seen from the semiconductor substrate 2 side, and FIG. 2 corresponds to a cross-sectional view taken along line XX in FIGS. 3A and 3B.

  As shown in FIG. 3A, the semiconductor substrate 2 can be etched into a substantially rectangular shape that is narrower than the width of the support 7. Moreover, as shown to FIG. 3B, it can also comprise so that the outer periphery of the semiconductor substrate 2 may become uneven | corrugated shape by etching only the area | region in which the pad electrode 4 was formed. In the latter case, the overlapping area of the semiconductor substrate 2 and the support 7 is larger, and the semiconductor substrate 2 remains near the outer periphery of the support 7. Therefore, from the viewpoint of improving the support strength of the support 7 with respect to the semiconductor substrate 2, the latter configuration is preferable. Moreover, according to the latter structure, since the curvature of the support body 7 by the difference in the thermal expansion coefficient of the semiconductor substrate 2 and the support body 7 can be prevented, the crack and peeling of a semiconductor device can be prevented. It is possible to design the semiconductor substrate 2 in a shape different from the planar shape shown in FIGS. Hereinafter, the manufacturing process when the semiconductor substrate 2 is etched as shown in FIG. 3A will be described.

  In the present embodiment, the side wall of the semiconductor substrate 2 is obliquely etched so that the lateral width of the semiconductor substrate 2 increases as it approaches the surface side. However, the width of the semiconductor substrate 2 is constant, and the side wall is a support. It is also possible to perform etching so as to be perpendicular to the main surface 7.

  Next, an insulating film 9 such as a silicon oxide film or a silicon nitride film formed by a plasma CVD method or the like is formed on the side surface and the back surface of the semiconductor substrate 2 including the inside of the opening 8. Next, using the resist layer (not shown) as a mask, the insulating film 3 and the insulating film 9 are selectively etched as shown in FIG. By this etching, the insulating film 3 and the insulating film 9 formed from a part of the pad electrode 4 to the region reaching the dicing line DL are selectively removed, and at least a part of the pad electrode 4 is formed at the bottom of the opening 8. Exposed.

  Next, a metal layer such as aluminum (Al) or copper (Cu) to be the wiring layer 10 is formed with a film thickness of, for example, 1 μm by a sputtering method, a plating method, or other film forming methods. Thereafter, the metal layer is selectively etched using a resist layer (not shown) as a mask. As a result of this etching, the metal layer is connected to the pad electrode 4 and becomes a wiring layer 10 formed on the side and back surfaces of the semiconductor substrate 2 as shown in FIG.

  Next, an electrode connection layer (not shown) that covers the wiring layer 10 (for example, a laminate of a nickel layer and a gold layer) is formed. The electrode connection layer is formed because the wiring layer 10 made of aluminum or the like and the conductive terminal 15 made of solder or the like are difficult to join, or the material of the conductive terminal 15 flows into the wiring layer 10 side. It is because of preventing. The electrode connection layer can be formed after the protective layer 14 is formed.

  Next, a part of the surface of the insulating film 3, the adhesive layer 6 and the support 7 is removed from the semiconductor substrate 2 side by a dicing blade or dry etching to form a groove 11 extending in the thickness direction of the support 7 To do. A large number of grooves 11 are formed in the vertical and horizontal directions with respect to the surface of the support 7 along the boundaries (dicing lines DL) of the individual semiconductor devices. The cross-sectional shape of the groove 11 is not limited to the V shape as shown in FIG. 6 as long as the side surface of the adhesive layer 6 is exposed, but may be an elliptical shape or a substantially rectangular shape. From the viewpoint of improving the coverage of the layer 12 in the groove 11, it is preferable to have a V shape or a shape in which an upper portion (a portion close to the surface of the semiconductor substrate 2) is curved outward. The depth of the groove 11 is set in consideration of the thickness of the support 7 after singulation. For example, if the final thickness of the support 7 is about 50 μm, the depth of the groove 11 is increased from the surface of the support 7. The groove 11 is formed so that the bottom is disposed at a depth of about 70 μm. Even when the groove 11 is formed by the dicing blade, the process using the dicing blade is only the process, and the dicing blade is not used in the process of obtaining individual semiconductor devices as described later. Therefore, compared to a manufacturing method using a dicing blade in both the step of forming the groove 11 and the step of obtaining individual semiconductor devices, this embodiment has fewer steps using the dicing blade, and therefore the time required for the entire manufacturing process. Can be shortened.

  Next, a protective layer 14 having openings 12 and 13 at positions corresponding to the formation region of the conductive terminal 15 and the groove 11 to be described later is formed with a thickness of 10 μm, for example. The protective layer 14 is formed as follows, for example. First, an organic material such as polyimide resin or solder resist is applied to the entire surface by a coating / coating method, and heat treatment (pre-baking) is performed. Next, the applied organic material is exposed and developed to form an opening that exposes a predetermined region, and then a heat treatment (post-bake) is applied thereto. As a result, a protective layer 14 having openings 12 and 13 at positions corresponding to the regions where the conductive terminals 15 are formed and the grooves 11 is obtained. The protective layer 14 of the present embodiment completely covers the side surface of the adhesive layer 6, but the side surface of the support 7 is covered only at a portion close to the semiconductor substrate 2, and at least the protective layer 14 is not formed on the dicing line DL. It is like that. In other words, the end portion of the protective layer 14 is arranged on the way from the surface of the support 7 to the bottom of the groove 11, and the protective layer 14 is not formed at the bottom of the groove 11. By forming the opening 13 at a position corresponding to the groove 11 of the protective layer 14 in this way, it is possible to prevent adjacent semiconductor devices from being connected by the protective layer 14 after the back surface etching process of the support 7 described later. Each semiconductor device can be appropriately separated.

  Next, a conductive material (for example, solder) is screen-printed on the electrode connection layer exposed from the opening 12 of the protective layer 14, and the conductive material is reflowed by heat treatment, whereby a ball-shaped conductive material is formed as shown in FIG. 7. Terminal 15 is formed. The method for forming the conductive terminal 15 is not limited to the above, and it may be formed by an electrolytic plating method, a so-called dispensing method (coating method) in which solder or the like is applied to a predetermined region using a dispenser. In this way, the pad electrode 4 is electrically connected to the conductive terminal 15 via the wiring layer 10.

  Next, a liquid resist material is spin-coated from the back surface side of the semiconductor substrate 2, and the conductive terminal 15, the protective layer 12 and the like including the inner wall of the groove 11 are covered with the resist layer 16. The resist layer 16 has such a thickness that the semiconductor substrate 2 is embedded. Next, the resist layer 16 is cured by heat treatment. In addition, since the resist layer 16 is filled in the groove 11 through the opening 13, the resist layer 16 and the support 7 are in contact with each other at the bottom of the groove 11.

  Next, a protective member 17 such as a film-like UV tape or a glass substrate is bonded to the back surface of the semiconductor substrate 2. The protection member 17 has a function of holding the semiconductor substrate 2 and protecting the conductive terminals 15 and the like during the back surface etching step of the support 7 described below and subsequent transport.

  Next, as shown in FIG. 8, the entire back surface of the support body 7 is uniformly etched from the back surface of the support body 7 until the grooves 11 and the resist layer 16 are exposed, and the support body 7 has a predetermined thickness (for example, 50 μm). Thin). As an etching method, spin wet etching is preferable in which etching is performed mechanically using a back grinding apparatus (grinder) or etching is performed using a chemical solution containing hydrofluoric acid while rotating the substrate. However, other etching methods such as dip etching may be used as long as the entire back surface of the support 7 is etched. The etching of the support 7 is terminated by a method such as managing the time based on a pre-calculated etching rate or detecting the exposure of the resist layer 16 with an optical device. Thus, the wafer-like support 7 is separated into islands, that is, the semiconductor devices 20 separated into chips are collectively formed.

  Even if the groove 11 is exposed from the back surface of the support 7, the resist layer 16 is formed in the groove 11, and the protective member 17 is bonded to the back surface of the semiconductor substrate 2. Therefore, each semiconductor device 20 does not fall apart. Further, since the resist layer 16 and the protective member 17 serve as a barrier, a corrosive substance such as a chemical solution does not enter the semiconductor substrate 2 side, and the operating characteristics of the semiconductor device 20 are not deteriorated.

  In addition, after the back surface etching of the support 7, each semiconductor device 20 is transported in a state of being bonded to the protective member 17, but the space between the adjacent semiconductor devices 20 is filled with a resist layer 16 without a gap. . Therefore, it is difficult for mechanical damages such as the semiconductor devices 20 adjacent to each other to rub against each other during transportation.

  Next, a predetermined dissolving agent is supplied from the back side of the support 7 to melt the exposed resist layer 16, and then the separated semiconductor device 20 is picked up from the protective member 17. When the protective member 17 is a UV tape, the semiconductor device 20 can be easily picked up by irradiating the protective member 17 with ultraviolet rays to reduce its adhesiveness. Note that another tape may be newly bonded on the back surface of the support 7, then the protective member 17 may be peeled off, and then the resist layer 16 may be dissolved by supplying a dissolving agent from the back surface side of the semiconductor substrate 2. .

  Through the above steps, as shown in FIG. 9, the chip size package type semiconductor device 20 is completed. The semiconductor device 20 is mounted on a printed circuit board or the like via the conductive terminal 15.

  In the first embodiment described above, each semiconductor device is obtained by etching the entire back surface of the support 7 instead of individually dividing the dicing lines DL to obtain individual semiconductor devices as in the prior art. . Therefore, since all the semiconductor devices are singulated, the time required for the dicing process can be greatly shortened, and the productivity can be greatly improved.

  In the first embodiment, since the support 7 is thinned simultaneously with the separation of the semiconductor device, the thin semiconductor device can be manufactured more efficiently than in the past. Further, since the support 7 is thinned after all the components of the semiconductor device such as the wiring layer 10, the conductive terminal 15, and the protective layer 14 are formed, the rigidity of the support 7 is reduced due to the thinning. Does not affect the formation stage of each component.

  Even if the groove 11 is exposed from the back surface of the support 7 by etching the back surface of the support 7, the resist layer 16 is formed in the groove 11, and the protective member 17 is bonded to the back surface of the semiconductor substrate 2. ing. Therefore, corrosive substances (for example, fine particles generated during the etching of the back surface of the support 7 or chemicals used in the etching process) do not enter the semiconductor substrate 2 side, and deterioration in quality can be suppressed. .

  In the first embodiment, the side surface of the adhesive layer 6 is completely covered with the protective layer 12, and the side surface of the support 7 that is close to the semiconductor substrate 2 is covered. Therefore, it is possible to prevent the adhesive layer 6 from coming into contact with outside air, and it is possible to prevent the entry of a corrosive substance (for example, moisture) into the semiconductor integrated circuit 1 or the adhesive layer 6.

  Next, a second embodiment of the present invention will be described with reference to the drawings. In addition, about the structure and manufacturing process similar to 1st Embodiment, the same code | symbol is shown and the description is abbreviate | omitted.

  In the first embodiment, as shown in FIG. 8, the back surface of the support 7 is etched halfway in the thickness direction of the support 7. On the other hand, the second embodiment is characterized in that a step of etching the entire support 7 is employed. The etching of the support 7 is terminated when the support 7 is entirely etched, for example, by managing the etching rate. By passing through this process, as shown in FIG. 10, the semiconductor device 25 whose uppermost surface is the adhesive layer 6 can be obtained. In this case, the adhesive layer 6 has a role of protecting the surface of the semiconductor substrate 2.

  In the second embodiment as well, the semiconductor devices are all separated into pieces as in the first embodiment, so that the time required for the dicing process can be greatly shortened and the productivity is improved. be able to. Further, since the thickness of the support 7 is eliminated, a semiconductor device that is thinner than that of the first embodiment can be obtained.

  Next, a third embodiment of the present invention will be described with reference to the drawings. In addition, about the structure and manufacturing process similar to 1st and 2nd embodiment, the same code | symbol is shown and the description is abbreviate | omitted.

  In the first and second embodiments, the adhesive layer 6 is uniformly formed between the semiconductor substrate 2 and the support 7. On the other hand, in the third embodiment, as shown in FIG. 11, the adhesive layer 30 is partially formed, and the cavity 31 is formed between the semiconductor substrate 2 and the support 7. It is a feature. The cavity 31 is an internal space surrounded by the semiconductor substrate 2, the adhesive layer 30, and the support 7. For example, the material of the adhesive layer 30 is applied annularly on the surface of the semiconductor substrate 2, and then the support 7 is pasted. Formed by combining.

  When the back surface of the support 7 is etched until the groove 11 is exposed in the state having the cavity 31 as described with reference to FIGS. 7 and 8, a semiconductor device including the cavity 31 is formed. .

  By the way, if an adhesive layer is formed on the semiconductor integrated circuit 1, the quality of the semiconductor device may be deteriorated. For example, in the case where the semiconductor integrated circuit 1 includes a light receiving element or a light emitting element, the incidence of light on the semiconductor integrated circuit 1 (or the emission of light from the semiconductor integrated circuit 1) is hindered by the adhesive layer, and a desired quality is achieved. It may not be obtained. In addition, there is a problem that the adhesive layer is deteriorated by light of a specific wavelength such as Blu-Ray, and the operation quality of the semiconductor device is deteriorated by the deteriorated adhesive layer.

  In the third embodiment, the formation of the cavity 31 does not interpose an adhesive layer between the semiconductor integrated circuit 1 and the support 7. Therefore, this configuration is effective for a device whose operation quality is deteriorated due to the presence of the adhesive layer (for example, a semiconductor device for receiving Blu-ray light).

  When the support 7 is entirely etched as described in the second embodiment with the cavity 31 as shown in FIG. 11, an opening is formed on the semiconductor integrated circuit 1 as shown in FIG. A semiconductor device including the adhesive layer 30 having the portion 32 is formed.

  Next, a stacked semiconductor device in which a plurality of semiconductor devices including the adhesive layer 30 having the opening 32 are stacked in the vertical direction will be described with reference to FIG. FIG. 13 shows a cross-sectional view of a stacked semiconductor device 37 in which the semiconductor devices 35 and 36 are sequentially stacked. The semiconductor devices 35 and 36 include a pad electrode 38 exposed to the outside from the opening 32. The pad electrode 38 has the same configuration as the pad electrode 4 described above except that the pad electrode 38 is exposed to the outside from the opening 32.

  In the stacked semiconductor device 37, after the semiconductor devices 35 and 36 are completed, the conductive terminals 15 of the semiconductor device 36 are superposed so as to be aligned with the pad electrodes 38 of the semiconductor device 35. 15 and the pad electrode 38 are connected. Of course, another semiconductor device can be stacked on the semiconductor device 36. Since such a stacked semiconductor device 37 does not have the support 7, the height of the stacked structure can be minimized.

  Next, a fourth embodiment of the present invention will be described with reference to the drawings. In addition, about the structure similar to 1st thru | or 3rd Embodiment, and the same manufacturing process, the same code | symbol is shown and the description is abbreviate | omitted.

  In the first to third embodiments, the entire back surface of the support 7 is uniformly etched. On the other hand, in the fourth embodiment, a process of partially etching the back surface of the support 7 is adopted. First, as shown in FIG. 14, the groove 11 and the resist layer 16 are formed, the protective member 17 is bonded to the back surface of the semiconductor substrate 2, and then the resist layer 41 having an opening 40 at a position corresponding to the groove 11. Are selectively formed on the back surface of the support 7.

  Next, as shown in FIG. 15, the opening 42 is formed by partially etching the back surface of the support 7 using the resist layer 41 as a mask. A large number of openings 42 are formed in the vertical and horizontal directions with respect to the back surface of the support 7 along the positions corresponding to the grooves 11, that is, along the boundaries of the individual semiconductor devices. The etching is performed until the opening 42 reaches the groove 11 and the groove 11 and the resist layer 16 are exposed. Thereby, the wafer-like support 7 is separated into islands, and the chips are separated into chips. The formed semiconductor devices 43 are collectively formed. As an etching method, wet etching is preferable from the viewpoint of processing a large number of substrates at a time to shorten the manufacturing process time. In this case, the resist layer 41 may be immersed in a container filled with a predetermined chemical solution. In addition, you may perform the back surface etching of the support body 7 by dry etching or sandblasting.

  In FIG. 15, the side wall of the support 7 is etched obliquely from the back surface until reaching the groove 11, but when the support 7 is etched by anisotropic etching such as dry etching or sandblasting, The side wall can be substantially perpendicular to the main surface of the support 7.

  Next, a predetermined dissolving agent is supplied from the opening 42 to dissolve the resist layer 16, and then each semiconductor device 43 is picked up from the protective member 17.

  In the fourth embodiment described above, the dicing lines DL are not individually separated as in the prior art to obtain individual semiconductor devices, but the resist layer 41 having the openings 42 along the boundaries of the individual semiconductor devices is provided. Each semiconductor device is obtained by partially etching the back surface of the support 7 by using it. Therefore, since all the semiconductor devices are singulated, the time required for the dicing process can be greatly shortened, and the productivity can be greatly improved.

  Next, a fifth embodiment of the present invention will be described with reference to the drawings. In addition, about the structure and manufacturing process similar to 1st thru | or 4th Embodiment, the same code | symbol is shown and the description is abbreviate | omitted.

  As shown in FIG. 16, the tape 50 is bonded onto the surface of the semiconductor substrate 2 via the adhesive layer 6, and the support 7 is bonded onto the tape 50. The tape 50 is made of, for example, polyimide, and is preferably made of a material different from the adhesive layer 6 and a protective layer 53 described later. This is because a solvent that lowers the viscosity of the tape 50 may be supplied when the tape 50 is removed, so that the adhesive layer 6 and the protective layer 53 are not simultaneously removed. Next, the opening 8, the insulating film 9, the wiring layer 10 and the like are formed by the same process as in the first embodiment.

  Next, as shown in FIG. 17, the insulating film 3, the adhesive layer 6, and the tape 50 are partially removed from the semiconductor substrate 2 side by a dicing blade or dry etching. 51 is formed. A large number of grooves 51 are formed in the vertical and horizontal directions with respect to the surface of the tape 50 along the boundaries (dicing lines DL) of the individual semiconductor devices.

  Next, a protective layer 53 made of a solder resist or the like having openings 12 and 52 at positions corresponding to the formation region of the conductive terminal 15 and the groove 51 is formed. The protective layer 53 of the present embodiment completely covers the side surface of the adhesive layer 6, but the side surface of the tape 50 is covered only at a portion close to the semiconductor substrate 2 so that the protective layer 53 is not formed at least on the dicing line DL. It has become. In other words, the end portion of the protective layer 53 is arranged on the way from the side surface of the adhesive layer 6 to the bottom portion of the groove 51, and the protective layer 53 is not formed on the bottom portion of the groove 51. By forming the opening 52 at a position corresponding to the groove 51 as described above, it is possible to prevent adjacent semiconductor devices from being connected by the protective layer 53 when the tape 50 is removed, and to appropriately separate each semiconductor device. Can do.

  Next, as shown in FIG. 18, the conductive terminal 15 is formed on the electrode connection layer exposed from the opening 12 of the protective layer 53. Next, a resist material is applied from the back side of the semiconductor substrate 2, and the entire conductive terminal 15, protective layer 53, and the like including the inner wall of the groove 51 are covered with the resist layer 16. The resist layer 16 and the tape 50 are in contact with each other at the bottom of the groove 51. Next, the protective member 17 is bonded to the back surface of the semiconductor substrate 2.

  Next, as described with reference to FIG. 15, the support 7 is partially etched using the resist layer 41 to expose the tape 50. Next, a predetermined dissolving agent is supplied to the exposed tape 50 and the tape 50 is removed to separate the semiconductor substrate 2 and the support 7. Next, the resist layer 16 is removed, and the separated semiconductor device 54 is picked up from the protective member 17. Through the above steps, the chip size package type semiconductor device 54 is completed.

  Also in the fifth embodiment, since all the semiconductor devices are singulated at once as in the first to fourth embodiments, the time required for the dicing process can be greatly reduced, and the productivity is improved. Can be improved. Further, since the thickness of the support 7 is eliminated, a thin semiconductor device can be obtained.

  Next, a sixth embodiment of the present invention will be described. The description of the same configuration and manufacturing process as those in the first to fifth embodiments is omitted or simplified.

  In the first embodiment, as shown in FIG. 7, the entire conductive terminal 15, protective layer 12 and the like including the inner wall of the groove 11 are covered with the resist layer 16. In contrast, in the sixth embodiment, the protective member 17 is bonded to the back surface of the semiconductor substrate 2 without forming the resist layer 16. Since the configuration is the same as that of FIG. 7 except that the resist layer 16 is not formed, the sixth embodiment is not shown.

  Next, the entire back surface of the support 7 is uniformly etched, or a resist layer having an opening at a position corresponding to the groove 11 is selectively formed on the back surface of the support 7 (see FIG. 14). The support 7 is partially etched using the resist layer as a mask.

  Here, in the first and fourth embodiments, etching is performed until the groove 11 is exposed, whereby the wafer-like support body 7 is separated into individual pieces, and the semiconductor devices separated into chip-like pieces are collectively collected. Was formed. In contrast, in the sixth embodiment, the etching of the support 7 is stopped before the groove 11 is exposed. That is, the thickness of the support 7 is made very thin at the position corresponding to the groove 11. The thickness of the support 7 at the position is, for example, 50 to 100 μm. Since etching is not performed until the groove 11 is exposed, the support 7 serves as a barrier even if the resist layer 16 is not formed. For example, fine particles generated during etching of the back surface of the support 7 The chemical solution used in the etching step does not enter the semiconductor substrate 2 side, and quality deterioration can be suppressed.

  Next, a physical / mechanical load is applied to the thinned portion of the support 7 to cut the support 7 along the groove 11. Specifically, for example, using a human hand or a predetermined instrument, the support 7 is cut by applying a predetermined pressing force along the groove 11 from the back side to the front side of the support 7. Thus, the wafer-like support 7 is divided into islands, that is, a semiconductor device is formed into chips.

  In this manner, the semiconductor device can be separated into individual pieces by going through two steps (an etching process on the back surface of the support 7 and a physical load applied to a position corresponding to the groove 11). Is possible. According to such a manufacturing method, there is an advantage of preventing the entry of the corrosive substance to the semiconductor substrate 2 side without forming the resist layer 16. Moreover, since it is not necessary to use a dicing blade, the time required for the dicing process can be shortened. In addition, by applying a physical load continuously or simultaneously to all positions corresponding to the grooves 11 on the back surface of the support body 7, individual semiconductor devices can be obtained almost collectively. Can be improved.

  Needless to say, the present invention is not limited to the above-described embodiment, and modifications can be made without departing from the scope of the invention. For example, in the above embodiment, a BGA (Ball Grid Array) type semiconductor device having ball-like conductive terminals has been described. However, the present invention is an LGA (Land Grid Array) type or other CSP (Chip Size Package) type. It may be applied to this semiconductor device. Moreover, in the said embodiment, although the conductive terminal was formed on the back surface of a semiconductor substrate, you may arrange | position a conductive terminal so that it may adjoin to the side surface of a semiconductor substrate. In the above embodiment, the protective layers 13 and 53 are formed. However, the present invention can be applied to a semiconductor device in which no protective layer is formed. In this case, it is preferable to use a metal material (for example, copper) having high resistance to corrosive substances (such as moisture) as the wiring layer 10. The present invention can be widely applied as a manufacturing method for efficiently obtaining a semiconductor device separated into chips.

It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 1st Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 1st Embodiment of this invention. It is a top view explaining the manufacturing method of the semiconductor device which concerns on the 1st Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 1st Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 1st Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 1st Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 1st Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 1st Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 1st Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 2nd Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 3rd Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 3rd Embodiment of this invention. It is sectional drawing explaining the laminated structure of the semiconductor device which concerns on the 3rd Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 4th Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 4th Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 5th Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 5th Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 5th Embodiment of this invention. It is sectional drawing explaining the manufacturing method of the semiconductor device which concerns on the 5th Embodiment of this invention. It is sectional drawing explaining the conventional semiconductor device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor integrated circuit 2 Semiconductor substrate 3 Insulating film 4 Pad electrode 5 Passivation film 6 Adhesive layer 7 Support body 8 Opening part 9 Insulating film 10 Wiring layer 11 Groove 12 Opening part 13 Opening part 14 Protection layer 15 Conductive terminal 16 Resist layer 17 Protection Member 20 Semiconductor device 25 Semiconductor device 30 Adhesive layer 31 Cavity 32 Opening 35 Semiconductor device 36 Semiconductor device 37 Semiconductor device 38 Pad electrode 40 Opening 41 Resist layer 42 Opening 43 Semiconductor device 50 Tape 51 Groove 52 Opening 53 Protective layer 54 Semiconductor device 100 Semiconductor substrate 101 Semiconductor integrated circuit 102 Pad electrode 103 Insulating film 104 Passivation film
105 Support 106 Adhesive Layer 107 Insulating Film 108 Wiring Layer 109 Protective Layer 110 Conductive Terminal DL Dicing Line

Claims (6)

Bonding the surface side of the wafer-like semiconductor substrate and the surface of the support;
Removing a portion of the semiconductor substrate;
Forming a groove reaching the middle of the support in the thickness direction on the surface of the support;
Forming a protective layer formed on side and back surfaces of the semiconductor substrate and having an opening at a corresponding position of the groove ;
Etching the back surface of the support member until the groove is exposed from the back surface of the support member, and dividing the support member to obtain individual semiconductor devices. Method. In the step of etching the support until the groove is exposed,
The method of manufacturing a semiconductor device according to claim 1, wherein all of the support is etched. Etching the back surface of the support until the groove is exposed from the back surface of the support,
Forming a mask layer having an opening at a position corresponding to the groove on the back surface of the support;
The method of manufacturing a semiconductor device according to claim 1, further comprising: etching the support using the mask layer as a mask. In the step of forming the protective layer,
The protective layer is formed so as to extend from the back surface of the semiconductor substrate onto the inner wall surface of the groove and to be disposed at an end portion of the support body on the way from the surface position to the bottom of the groove. The method for manufacturing a semiconductor device according to claim 1 , wherein: Forming a resin layer filled in the groove and in contact with the support at the bottom of the groove;
The method of manufacturing a semiconductor device according to any one of claims 1 to 4, characterized in that a step of bonding the protective member on the back surface of the semiconductor substrate. Bonding the tape to the surface side of the wafer-like semiconductor substrate, and bonding the surface of the support on the tape;
Removing a portion of the semiconductor substrate;
Forming a groove in the tape in the thickness direction on the surface of the tape on the semiconductor substrate side;
Forming a protective layer formed on a side surface and a back surface of the semiconductor substrate and having an opening at a position corresponding to the groove;
Etching the back surface of the support until the tape is exposed from the back side of the support;
A step of supplying a dissolving agent to the exposed tape, peeling the tape from the semiconductor substrate, and separating the semiconductor substrate and the support to obtain individual semiconductor devices. Device manufacturing method.

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