JP4824345B2 - Active firmware exchange device - Google Patents

Description

  The present invention relates to a hot swapping device for firmware of a storage device such as a mass storage device used for a server.

(Prior art)
Conventionally, when the firmware is exchanged from firmware A to B in the activated state in which the storage device and the host device are in the connected state, in the prior art, as shown in FIGS. I was doing that exchange. 6, reference numeral 100 denotes a storage device, 101 denotes a storage unit of the storage device 100, 102 denotes a control unit (controller module CM0) of the storage device 100, and 103 denotes another control unit (controller module CM1) of the storage device 100. , 104 is a processor that controls the control unit 102, 105 is a processor that controls the control unit 103, firmware A is firmware that operates the processors 104 and 105, and A is a version. Reference numeral 110 denotes a host device that controls access to the storage apparatus 100, and the storage apparatus 100 and the host apparatus 110 constitute a server.

  In the prior art, when the firmware A is replaced with the upgraded firmware B, the firmware is replaced with one of the control units 102 and 103 disconnected from the host device 110 as shown in FIGS. Was.

  Normally, in the state shown in FIG. 6A, the control units 102 and 103 are moved in parallel with respect to the host device 110 to perform I / O processing on the storage unit 101.

  When the firmware A is upgraded to B, as shown in FIG. 6B, the host apparatus 110 and the control unit 102 are disconnected and the firmware is exchanged.

  Then, as shown in FIG. 6C, the control unit 102 and the host device 110 are connected, the control unit 103 and the host device 110 are disconnected, and the firmware A in the control unit 103 is replaced with B. Upgrade the version.

  As described above, after the firmware replacement is completed, the host apparatus 110 and the control unit 103 also return to the connected state as shown in FIG. 6D, and the host apparatus 110 again stores the storage unit 101 from the control units 102 and 103. Access control can be performed in parallel.

(Conventional example 1)
In the conventional example 1, the internal table area for storing various data necessary for control in the firmware and the data necessary for the internal table area before and after the firmware replacement are temporarily stored during the active replacement of the firmware. A save area for automatically saving, a normal function for shifting to the process according to the interrupt while referring to the internal table area according to the interrupt, and a busy response to the host device during the active replacement of the firmware A first interrupt control unit having a busy response function as an interrupt processing function, and a second interrupt having only a busy response function as a interrupt processing function for performing a busy response to the host device during active replacement of the firmware Including the control unit, the firmware constituting the magnetic disk control device can be replaced during the coupling operation with the host device. It is obtained by the. (See Patent Document 1)
JP 11-237957 A

  In the above-described prior art, the paths of the storage apparatus 100 and the host apparatus 110 are all prevented from being cut at the same time by exchanging the firmware of the control units 102 and 103 one by one. This method has the following problems A and B.

  A. As shown in FIGS. 6B and 6C, the control unit 102 or 103 during firmware exchange cannot accept a command from the host device 110 and is in a disconnected state. That is, during this time, complicated control is required in which the command is issued only to the uncut side on the host device 110 side, and when the firmware replacement is completed, the original parallel operation is restored.

  B. Also, in order to prevent all paths from being blocked during firmware replacement, two or more control units are necessary, which hinders cost reduction.

  C. In the above prior art 1, when an I / O process from the host CPU occurs during firmware replacement, a busy response is reported, but during the busy response, not only data cannot be sent from the host CPU but also a retry process is required. Thus, response control takes time.

  For this reason, the present invention is configured to prevent path disconnection during firmware active replacement even during firmware replacement, so that even one control unit does not cause path disconnection with the host apparatus. The present invention provides an active firmware exchanging apparatus that does not need to report a busy response even when an / O process occurs.

  In order to achieve this, the present invention provides an active firmware exchanging apparatus as described in (1) below.

(1): In a storage device including a host device, a control unit connected to the host device, and a storage unit that is input / output processed by the control unit, the control unit includes at least left and right processors, The right firmware holding unit is provided, and the host I / O being executed by the firmware is continued in the firmware holding unit, and the input / output control of the storage unit is performed in response to the I / O command of the host device received after the firmware hot replacement instruction. The host I / O processing means for saving the host I / O information at the time of execution to the save memory area, and when all the host I / O being executed by the left firmware is completed, the controller interrupt is turned off and the right firmware Host I / O information when performing input / output control of the storage unit in response to an I / O command of the host device that is pending And host I / O completion monitoring means for notifying controller information related to the control of the save area address and input / output interface of the save memory area where the host I / O information is saved, and the right firmware is based on the notification from the left firmware , Controller control area construction means for constructing a controller control area so that it can take over and control the pending host I / O, CPU switching processing means for switching the interrupt notification CPU of the controller, and controller interrupt enabled state Controller interrupt processing means for resuming pending host I / O, new firmware download processing means for downloading new firmware, expanding it in another firmware area and starting the CPU, and holding the downloaded new firmware Firmware retention means For example, the firmware active replacement instruction, the host I / O processing means continues the host I / O processing running on the left firmware, retracts the host I / O information received after firmware change instruction to save memory area, the host I / O completion monitoring means to interrupt the interrupt upon completion of all the host I / O running on the left firmware notifies the host I / O information in Pendengu right firmware, and controller information, right based on the host I / O information and controller information controller control region construct means is notified from the left firmware in the firmware, built a controller control range to be able to control inherited host I / O in Pendengu, C The PU switching processing means performs controller interrupt notification and CPU switching, and controller interrupt processing Means to enable the interrupt controller, Resume host I / O in Pendengu, new firmware download processing means to download new firmware to expand the new firmware to the left firmware area, it activates the left CPU.

  The following effects can be achieved by the present invention.

  A. In the present invention, two CPUs are mounted in the control unit, and control is performed so that firmware active replacement is performed in units of CPUs, so that it is possible to prevent path interruption during firmware active replacement. This eliminates the need for special processing in the host and does not require complicated control.

B. Even if there is one control unit, there is no disconnection of the path with the host, so even one control unit can be operated safely, and the configuration becomes simple. (In the embodiment, an example in which two control units are provided has been described. However, this is due to the description in accordance with the conventional example, and it is clear that even one control unit has no pass break. is there.)
C. Since busy response interrupt processing is not performed in the present invention, there is no problem that the interface is blocked as an input / output interface error when an input / output error occurs during re-execution based on the busy response.

  An embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a schematic diagram of the present invention, and FIG. 2 is a functional configuration explanatory diagram of the present invention.

  The present invention will be outlined with reference to FIG. In FIG. 1, 0 is a host device that performs input / output access to the storage unit 101 via the controller modules CM0 and CM1, and the host device 0, the controller modules CM0 and CM1, and the storage unit 101. Thus, the server is configured.

  In the present invention, two CPUs 1 and 11 are provided in the controller module CM0, and each of the CPUs 1 and 11 uses the firmware A and A, which are firmware of the same version, to perform an I / O instruction for the host device 0 with respect to the storage unit 101. O control is performed. Similarly to the controller module CM0, the controller module CM1 is also equipped with two CPUs and performs I / O control on the storage unit 101 based on the I / O command of the host device 0.

  In FIG. 1A, when the web browser is started, a screen for controlling the controller module CM0 is downloaded, and a menu of firmware update (replacement) is output therein. The firmware exchange function is activated and the following control is performed.

  First, as shown in FIG. 1B, control is performed so that the CPUs 1 and 11 'on the left side of the controller modules CM0 and CM1 perform the control on the CPUs 11 and 11' on the right side. As a result, not only the right path (right P) but also the left path (left P) can be controlled by the right CPU (P left) by the right CPUs 11 and 11 ', and all host accesses can be continuously guaranteed. .

  Then, as shown in FIG. 1B, the firmware A, A of the left CPU (P left) 1, 1 ′ is replaced with a new version of firmware B.

  Next, as shown in FIG. 1C, the left CPU (P left) and right path (right P) are controlled by the left CPU of the controller modules CM0 and CM1, and all host accesses are continuously guaranteed. Then, the firmware A of the controller module CM0 / CM1 is replaced with a new version of firmware B.

  After the replacement of firmware A → B is completed in this way, the left path (left P) is connected to the left CPU 1 and 1 'of each controller module, and the right path (right P) is connected to the right CPU. With the new version B, it is possible to perform the same processing as in FIG. 1A based on each CPU in units of each path. In this way, it is possible to switch from farm A to B while maintaining all host access.

  The functional configuration of the present invention will be described with reference to FIGS. 1 and 2, 1, 1 'is a CPU, 2' is a host I / O processing means, 3 'is a host I / O completion monitoring means, and 4' is a controller control area construction means. 5, 5 'are CPU switching processing means, 6, 6' are controller interrupt processing means, 7, 7 'are firmware download processing means, 8, 8' are firmware holding units, 11, 11 'are CPU, CM0, CM1 Is a controller module.

  The CPU 1 normally connects the host 0 and the controller module CM. It processes control information, data, etc. via the left path (left P) in FIG. 1, but activates the right firmware activation exchange instruction (CPU 1 and firmware A (right farm) of the left CPU 1 shown in FIG. 1). In the case of an exchange instruction), control information, data, and the like that pass through the right path (right P) are processed, and the controller / module CM is controlled.

  The host I / O processing means 2 continues the host I / O being executed in the left firmware at the time of the left firmware hot replacement instruction, and evacuates the host I / O received after the left firmware hot replacement instruction to make it continue. It is. In this case, the save memory area of the host I / O is a high-level address area that can be continuously held even after the CPU is restarted.

  The host I / O completion monitoring unit 3 turns off the controller interrupt when all the host I / Os being executed in the left firmware are completed, and controls the right firmware (the firmware that controls the CPU 11 on the right side of the CPUs 1 and 11). A) is notified of pending host I / O information and controller information.

  The controller control area constructing means 4 dynamically constructs a controller control area based on the notification from the right firmware and inherits the pending host I / O.

  The CPU switching processing means 5 performs controller interrupt notification and CPU switching control (CPU 11 → CPU 1).

  The controller interrupt processing means 6 enables the interrupt notification of the controller to be enabled, and resumes the host I / O that is pending.

  The firmware download processing means 7 downloads a new farm (farm B), develops it in the right farm area, and activates the CPU 11.

  The firmware holding unit 8 holds the host I / O processing unit 2 to the firmware download processing unit 7, and these units are programs constituting the firmware A that controls the CPU 1.

  The CPU 11 normally processes control information, data, etc. via the right path (right P) in FIG. 1, which connects the host 0 and the controller module CM. 11 is an instruction to perform hot replacement of the firmware A (left farm) of the left CPU 1 in FIG. 11, and after the left firmware replacement, the right farm A is also hot-exchanged accordingly) The control information and data via P) are processed, and the controller module CM is controlled.

  The host I / O processing means 2 'continues the host I / O being executed in the right firmware at the time of the right firmware hot replacement instruction, and saves the host I / O received after the right firmware hot replacement instruction to enter the continuous state. Is. In this case, the save memory area of the host I / O is a high-level address area that can be continuously held even after the CPU is restarted.

  The host I / O completion monitoring means 3 'disconnects the controller interrupt when all of the host I / O being executed in the right firmware is completed, and the host I / O information and controller information that are pending in the left firmware. Is to be notified.

  The controller control area construction means 4 'dynamically constructs a controller control area based on the notification from the left farm and inherits the pending host I / O.

  The CPU switching processing means 5 ′ performs controller interrupt notification and CPU switching control (CPU 1 → CPU 11).

  The controller interrupt processing means 6 'controls to enable interrupt notification of the controller and resumes the host I / O that is pending.

  The firmware download means 7 ′ downloads a new farm (farm B), expands it in the left farm area, and activates the left CPU 1.

  The operation of the present invention will be described with reference to other drawings based on the operation explanatory views (No. 1) to (No. 3) shown in FIGS. 3 to 5, the left firmware (CPU 1) indicates the operation of the CPU 1 based on the left firmware A and B, and the right firmware (CPU 11) indicates the operation of the CPU 11 based on the right firmware A and B.

  At the time of firmware hot replacement, the operator activates the web browser, displays a menu for controlling the controller module CM0, selects the item of firmware replacement, and selects and instructs the item of firmware hot replacement. As a result, the left firmware active exchange instruction is transmitted to the controller module CM0.

  S1. Thus, in the left farm, the host I / O processing means 2 continues the host I / O being executed in the left farm, and saves the host I / O received after the left farm hot replacement instruction to the save memory area. Set to Pending state. Note that the save memory area is a high-level address area that can be held continuously even after the CPU is restarted.

  S2. The host I / O completion monitoring unit 3 disconnects the controller interrupt when all the host I / Os being executed in the left firmware are completed, and also continues to the right firmware CPU (P right) 11. Notify controller information such as / O information, save area address, and input / output interface.

  S3. As a result, in the right farm, the controller control area construction means 4 ′ dynamically constructs the controller control area based on the notification from the left farm in S2, and inherits the pending host I / O.

  S4. Next, in the right firmware, the CPU switching processing means 5 'performs switching processing of the controller interrupt notification from the left CPU 1 to the right CPU 11.

  S5. As a result, the controller interrupt processing means 6 'enables the controller interrupt and resumes the pending host I / O.

  S6. The same processing is performed for other controller modules, and all controls are under the right farm.

  S7. Then, the operation of the CPU 1 is stopped at the left farm.

  S8. In the right firmware, the firmware download processing means 7 'downloads the new firmware (firm B), expands it in the left firmware area, and activates the CPU 1 of the left firmware.

  S9. As a result, the left firmware rises, and the CPU 1 notifies the CPU 11 of the right firmware that preparation is complete.

  S10. In the right farm, the host I / O processing unit 2 'continues to execute the host I / O in the right farm, and the host I / O received after the right firmware hot replacement instruction is saved in the save memory area to enter the pending state. To do. Note that the save memory area is a high-level address area that can be held continuously after the CPU is restarted.

  S11. The host I / O completion monitoring means 3 'disconnects the controller interrupt when all the host I / O being executed in the right firmware is completed, and continues to the CPU (P left) 1 in the left firmware. Notifies controller information such as I / O information, save area address, and input / output interface.

  S12. As a result, in the left firmware, the controller control area construction means 4 dynamically constructs the controller control area based on the notification from the right firmware in S11 and inherits the pending host I / O.

  S13. Next, in the left farm, the CPU switching processing means 5 performs a switching process of the controller interrupt notification from the right CPU 1 to the left CPU 11.

  S14. As a result, the controller interrupt processing means 6 enables the controller interrupt and resumes the pending host I / O.

  S15. The same processing is performed for other controller modules, and all controls are under the left farm.

  S16. Then, the CPU 11 stops operating at the right farm.

  S17. In the left firmware, the firmware download processing means 7 downloads the new firmware (firm B), develops it in the right firmware area, and activates the CPU 11 of the right firmware.

  S18. As a result, the right firmware starts up, and the CPU 11 notifies the CPU 1 of the left firmware of the completion of preparation.

  S19. This S18. As shown in FIG. 1D, the firmware is all switched to the firmware B as shown in FIG. 1D. However, the input / output interface is in a state where the left CPU 1 in FIG. It is necessary to return to the state before the replacement. For this reason, the host I / O processing means 2 continues the host I / O being executed in the left farm, and after the distribution instruction to both CPUs via the web browser by the operator or based on the notification in S18 The received host I / O is saved in the save memory area to enter the pending state. Note that the save memory area is a high-level address area that can be held continuously even after the CPU is restarted.

  S20. When the host I / O completion monitoring unit 4 completes the execution of the host I / O in the left firmware, the host I / O completion monitoring unit 4 turns off the interrupt of the controller operating in the right firmware based on the configuration information before the firmware replacement. At the same time, the right firmware is notified of the pending host I / O information and controller information.

  S21. In the right farm, the controller control area construction means 4 ' The controller control area is dynamically constructed on the basis of the configuration information before the firmware exchange notified in (1), that is, the pending host I / O information, the controller information, etc., and the pending host I / O is inherited.

  S22. In the right firmware, the CPU switching processing means 5 ′ performs interrupt notification of the target controller and CPU switching (left CPU 1 → right CPU 11).

  S23. The right farm enables controller interrupts and resumes pending host I / O.

  S24. The left farm also enables controller interrupts and resumes pending host I / O.

  S25. Similar processing is performed for the other controllers, and all controls are returned to the normal state. This completes the firmware replacement.

It is the schematic of this invention. It is a functional configuration explanatory view of the present invention. It is operation | movement explanatory drawing (the 1) of this invention. It is operation | movement explanatory drawing (the 2) of this invention. It is operation | movement explanatory drawing (the 3) of this invention. It is explanatory drawing of a prior art example.

Explanation of symbols

1 Left CPU
2, 2 'host I / O processing means 3, 3' host I / O completion monitoring means 4, 4 'controller control area construction means 5, 5' CPU switching processing means 6, 6 'controller interrupt processing means 7, 7 ′ Firmware download processing means 8, 8 ′ Firmware holding unit 11 Right CPU

Claims (1)

In a storage device comprising a host device, a control unit connected to the host device, and a storage unit that performs input / output processing by the control unit,
The control unit is provided with at least left and right processors and left and right firmware holding units,
In the firmware holding unit,
The host I / O being executed by the firmware continues, and the host I / O information when performing I / O control of the storage unit for the I / O command of the host device received after the firmware hot replacement instruction is saved in the save memory area Host I / O processing means
When all the host I / O being executed by the left firmware is completed, the controller interrupt is turned off, and when the input / output control of the storage unit is performed for the I / O instruction of the host device that is pending to the right firmware Host I / O information, and a host I / O completion monitoring means for notifying controller information related to control such as a save area address and an input / output interface of a save memory area in which the host I / O information is saved ;
Based on the notification from the left firmware, the right firmware has controller control area construction means for constructing a controller control area so that it can take over and control the host I / O that is pending .
CPU switching processing means for switching the interrupt notification CPU of the controller;
Controller interrupt processing means for enabling a controller interrupt and resuming pending host I / O;
New firmware download processing means that downloads new firmware, expands it in another firmware area, and activates the CPU;
Firmware holding means to hold the downloaded new firmware,
By the firmware hot replacement instruction
The host I / O processing means continues the host I / O processing being executed by the left firmware, saves the host I / O information received after the firmware replacement instruction to the save memory area, and the host I / O completion monitoring means interrupts the cross when the host I / O running on the left firmware has been completed, notifies the host I / O information in Pendengu right firmware, and controller information,
In the right firmware, based on the host I / O information and controller information notified from the left firmware, the controller control area construction means constructs a controller control area so that the host I / O that is pending can be inherited and controlled . C PU switching process means the controller of the interrupt notification, perform the switching of the CPU, controller interrupt processing means to enable the interrupt controller, and restart the host I / O in Pendengu, new farm download processing means to download the new firmware Then, the new firmware is expanded in the left firmware area and the left CPU is activated to activate the left firmware.

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